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Submitted By: Laxman Pradhan
100715511
Submitted To: Professor Steven McGarry
Supervisors: Professor Steven McGarry Department of Electronics
Carleton University
Pattern Recognition with Memristors
Professor Matthew Holahan Department of Neuroscience
Carleton University
Author: Laxman Pradhan
Biomedical and Electrical Engineering Carleton University
Team Members: Michael Crupi Stuart Tozer
Submitted on: Monday, April 4, 2011.
This project uses memristors to model the memory and pattern recognition characteristics inherent in the visual system of the brain.
i
EXECUTIVE SUMMARY
The purpose of this project was to build neural circuitry using basic analog electronics,
specifically, using a new device called a memristor. The application focus was the visual system
of the brain. The brain contains grids of neurons which can learn pattern and then recognize then
later on when tested. This is an easy to understand application, therefore the goal of the project
was to build circuitry which could learn and recall patterns similarly to the visual system.
This was accomplished by researching the relevant biology, specifically the work of Dr.
Eric Kandel, who discovered the physiological mechanism of memory storage in the brain. His
work illuminated the fact that all memory is stored in the structure which allows neurons to
communicate, the synapse. The synapse not only communicates information between neurons, it
also uses its memory to process that information at the same time. This is what allows the human
visual system to be much more advanced than any computer based algorithm in existence today.
Dr. Kandel's work also showed that synapses experience both short term and long term memory.
Essentially, the synapse can learn something for only a few hours and then forget it. If a memory
is constantly used, the synapse will remember it forever and it will become part of the long term
memory. For this project, short term memory was modelled because it allows the demonstration
to learn multiple patterns instead of learning only one pattern forever.
The behaviour of synapses was modelled using memristors. This was idea because
memristors have many properties which are similar to synapses. This allowed a circuit to be
constructed using a memristor which behaves the same way the synapse does in terms of input
signals and output signals. Once this circuit was constructed, a circuit board with nine of them
was built. Furthermore, a series of LEDs and phototransistors were build to provide input signals
ii
to the synapse circuits. The LEDs simulate the light from the outside world entering the eyes,
while the phototransistors simulate the photoreceptors, the rods and cones, of the eyes. Together
they make up the sensory input circuit. Therefore the bulk of the project is the sensory input
circuit connected to the 9-synapse circuits.
Finally the outputs of each of the synapse circuits are sent to a summation circuit which
has a specific threshold of 3 correct inputs. If three of the inputs are correct, the summation
circuit will output a voltage equal to the positive rail. Then a voltage divider connected to a
voltage controlled switch, a transistor, turns an LED on. This LED can only be turned on if the
output of the summation circuit is the positive rail, which means the final LED will only turn on
if there are three correct inputs.
Initially a pattern of lights is shown to the sensory input circuit and that pattern is
remembered by the nine synapse circuits. Then another pattern is shown to the sensory input
circuit. If that pattern is the same, the final LED will turn on, otherwise it will not. This
behaviour is very similar to how pattern are recognized in receptor fields of the visual system.
By demonstrating this the objectives of project were met. It was proven that basic analog
electronics can be used to build a circuit which learns the way neurons do in the brain.
iii
ACKNOWLEDGEMENTS
The members of this project were Laxman Pradhan, Micheal Crupi and Stuart Tozer.
Each member proved to be instrumental in the completion of this project and the project's
success was largely a result of the hard work and dedication exhibited by each member of the
team.
The supervisors for this project were Dr. Steven McGarry from the Department of
Electronics and Dr. Matthew Holahan from the Department of Neuroscience. Both professors
provided invaluable assistance and guidance throughout to project. Their commitment to
ensuring the project was a success was above and beyond the call of duty required of them.
Their willingness to take time out of their busy schedules to help the project was a major
contributing factor in the project's success.
Finally the lab coordinator for Mackenzie 4135, Nagui Mikhail and the lab coordinator
for Minto Case 6070, Danny Lemay, were both of great help. They provided support for the
equipment within the lab as well as provided materials and guidance. Also the project group
would like to thank the Department of Electronics for funding this project with $500.
iv
TABLE OF CONTENTS
Executive Summary ......................................................................................................................... i Acknowledgements ........................................................................................................................ iii Table of Contents ........................................................................................................................... iv
Glossary ......................................................................................................................................... vi List of Tables ................................................................................................................................ vii List of Figures .............................................................................................................................. viii 1.0 Introduction ...................................................................................................................... 1
2.0 Objective .......................................................................................................................... 3
3.0 Motivation ........................................................................................................................ 4
4.0 Professional Practice ........................................................................................................ 6
4.1 Research Methods ............................................................................................................ 6
4.2 Health and Safety ............................................................................................................. 7
4.3 Documentation Practices .................................................................................................. 8
4.4 Project Management ......................................................................................................... 9
5.0 Theory ............................................................................................................................ 12
5.1 Biology ........................................................................................................................... 12
5.1.1 Neurons and Synapses ............................................................................................ 12
5.1.2 Information Processing in the Brain ....................................................................... 13
5.2 Electronics ...................................................................................................................... 15
5.2.1 Memristors .............................................................................................................. 15
5.3 Using Memristors to Model Synapses ........................................................................... 17
6.0 Initial Designs ................................................................................................................ 19
6.1 Memristor Grid ............................................................................................................... 19
6.2 Synapse Circuit .............................................................................................................. 22
6.3 Long-Term and Short-Term Memory ............................................................................ 24
6.4 Split Power Supply ......................................................................................................... 24
7.0 Final Designs .................................................................................................................. 28
7.1 Single Synapse Circuit ................................................................................................... 28
7.2 9-Synapse Circuit ........................................................................................................... 30
7.2.1 Sensory Input Circuit .............................................................................................. 35
7.2.2 Testing and Training Voltage Circuit ..................................................................... 40
7.2.3 Synapse Circuit ....................................................................................................... 41
7.2.4 Summation Circuit .................................................................................................. 46
v
8.0 Other Designs ................................................................................................................. 50
8.1 Spice Model.................................................................................................................... 50
8.2 LED Control using Microcontroller ............................................................................... 53
9.0 Results ............................................................................................................................ 56
9.1 Synapse Circuit with Memristor .................................................................................... 56
9.2 Pattern Recognition ........................................................................................................ 58
10.0 Conclusions .................................................................................................................... 60
10.1 Project Conclusion ......................................................................................................... 60
10.2 Concerns with Current Design ....................................................................................... 61
10.3 Future Designs................................................................................................................ 61
References ..................................................................................................................................... 63
Appendix A - Memristor Grid Netlist ........................................................................................... 64
Appendix B - Diode Bridge Synapse Circuit Netlist .................................................................... 67
Appendix C - Testing and Training Voltage Netlist ..................................................................... 68
Appendix D - Wheatstone Bridge Synapse Circuit Netlist ........................................................... 69
Appendix E - Summation Circuit Netlist ...................................................................................... 70
Appendix F - Original SPICE model from HP Memristor ........................................................... 71
Appendix G - New SPICE Model for Organic Memristor ........................................................... 72
Appendix H - Arduino LED Control Code ................................................................................... 74
Appendix I - C# Code for PC GUI ............................................................................................... 76
Appendix J - PC GUI WPF Interface Code .................................................................................. 83
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GLOSSARY
Neuron: a specialized type of cell found in the brain, used to communicating and processing
instructions.
Neuromorphic: electronic analog circuits that mimic neuro-biological architectures.
Neurotransmitter: a type of chemical which is released into the synapse to allow
communication between neurons.
Synapse: The structure which allows communication between neurons.
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LIST OF TABLES
Table 5-1: Comparison of behaviour between a memristor and a synapse ................................. 17Table 6-1: Simulated results for a 3x3 interconnected memristor grid. The values shown are the
voltages in V at each node. Shaded nodes are receiving an input stimulus. .............. 21Table 6-2: Original state table of synapse circuit. ....................................................................... 22Table 7-1: Correct state table which better represents the true biology of a neuron. .................. 42Table 8-1: SPICE netlist for the resistance reversion .................................................................. 51Table 9-1: Results of training and testing various patterns .......................................................... 58
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LIST OF FIGURES
Figure 1-1: Broca and Wernicke's area are responsible for speech and language [9] ................... 1Figure 3-1: The same light is shown on many receptor fields at the same time. Each receptor
field is composed of a grid of rods and cones which convert light into chemical energy [1]. ............................................................................................................... 4
Figure 3-2: Neurons process information as it is transferred, computer do not [10] ..................... 4Figure 4-1: Primary source of biology information [1] ................................................................. 6Figure 4-2: Standoffs and rubber feet used to isolate boards from environment .......................... 7Figure 4-3: Log book detailing all research and development ....................................................... 8Figure 4-4: Initial Gantt chart developed in September .............................................................. 10Figure 4-5: Updated Gantt chart developed in December ........................................................... 11Figure 5-1: Presynaptic and postsynaptic neurons converge at synapse [1]. ............................... 12Figure 5-2: Positive postsynaptic potentials create a strong output [1]. ...................................... 13Figure 5-5: Negative postsynaptic potentials create a weak output [1]. ...................................... 13Figure 5-6: After 4 days of training, the memory lasts longer than 1 day of training and also
produces a larger output [7]. ................................................................................. 14Figure 5-7: Characteristics of a memristor as described in the original paper from 1971 [3]. .... 15Figure 5-8: An electric field causes the ions to intercalate into the conduction channel. This
causes the resistance of the channel to increase or decrease depending of the ion being used [8]. ....................................................................................................... 15
Figure 5-9: A memristor device built into a 4-pin male header. .................................................. 16Figure 5-10: Measured results of one of the organic memristors ................................................ 17Figure 6-1: 4x4 memristor grid with 12 output grounds. Note that the corners will always have
the same current at both of their grounds. ............................................................. 19Figure 6-2: Original synapse circuit simulated in PSPICE. After building the circuit on a
breadboard, it was abandoned due to its complexity and instability. .................... 23Figure 6-3: One memristor for short term and another for long term memory ........................... 24Figure 6-4: Initial design of split power supply using switching inverter ................................... 24Figure 6-5: Power supply with switching inverter soldered on prototype board ......................... 25Figure 6-6: Solder work of power supply .................................................................................... 25Figure 6-7: Split power supply using a power transformer ......................................................... 26Figure 7-1: Schematic of the demonstration circuit. Each element of the main design was built
and tested here first. .............................................................................................. 29Figure 7-2: Demo synapse circuit without light cover ................................................................ 29Figure 7-3: Demo synapse circuit with light cover ...................................................................... 29Figure 7-4: Solder work of the demonstration circuit ................................................................. 30Figure 7-5: The LED and phototransistor pair of the demo circuit ............................................. 30Figure 7-6: Overall schematic of the main 9-synpase circuit ...................................................... 32Figure 7-7: Side view of main 9-synpase circuit ......................................................................... 33Figure 7-8: Top view of main 9-synpase circuit .......................................................................... 34Figure 7-9: Phototransistor with variable Vin receives light from an LED. ................................ 35Figure 7-10: Sensory input circuit with isolation box ................................................................. 36Figure 7-11: Sensory input circuit without isolation box ............................................................ 36Figure 7-12: LEDs on top used to show which inputs are on ...................................................... 36Figure 7-13: Top LED board showing solder work ..................................................................... 37
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Figure 7-14: Bottom phototransistor board showing solder work ............................................... 37Figure 7-15: Schematic of each of the nine LEDs ....................................................................... 38Figure 7-16: Schematic of a single demo LED and input LED ................................................... 38Figure 7-18: Sensory input circuit using pattern cards to choose inputs. Note the 2-pin jumpers
next to the Darlington array. ................................................................................. 39Figure 7-19: Sensory input circuit using microcontroller to choose inputs. Note the jumper wires
connected to the Darlington array. ........................................................................ 39Figure 7-17: Two Darlington Arrays which can take inputs from a 5V source or a
microcontroller using the 2-pin header row. ......................................................... 39Figure 7-20: Variable voltage source buffered using TIP41C power transistor. ......................... 40Figure 7-21: Typical 5-bit R2R ladder which can vary voltage in 1/32nd steps. ......................... 40Figure 7-22: Buffered R2R ladder used as a variable voltage source. ........................................ 40Figure 7-23: SPICE simulation of variable voltage circuit, netlist is included in the appendix .. 41Figure 7-24: Synapse circuit based on a Wheatstone bridge. ...................................................... 41Figure 7-25: Schematic of the main circuit showing the phototransistor output being used as the
input stimulus for the synapse. .............................................................................. 42Figure 7-26: Connection diagram of all 9 synapse circuits outputting to the summation circuit 43Figure 7-27: Main circuit board with 9 synapse circuits ............................................................. 44Figure 7-28: Back of main circuit board showing solder work ................................................... 44Figure 7-29: A breadboard was used to test the design before soldering .................................... 44Figure 7-30: 2-pin headers used to measure resistance of potentiometer .................................... 45Figure 7-31: 9-header pins connected to the output of the synapse amplifier ............................. 45Figure 7-32: SPICE simulation of the four possible cases as shown in Table 7-1, netlist is
included in the appendix ....................................................................................... 46Figure 7-33: Schematic of summation circuit .............................................................................. 47Figure 7-34: Summation circuit starts at the 9 resistors and finishes at the green LED .............. 47Figure 7-35: One amplifier for summation, one for inversion .................................................... 48Figure 7-36: 2N3904 NPN transistor used to drive LED and also acts like a voltage controlled
switch .................................................................................................................... 48Figure 7-37: Soldering of the summation circuit ......................................................................... 48Figure 7-38: SPICE simulation of summation circuit, netlist is included in the appendix .......... 49Figure 8-1: A cos function was added to the resistance of the memristor to revert back to its
default resistance ................................................................................................... 50Figure 8-2: Schematic of SPICE model for memory loss ........................................................... 51Figure 8-3: Classic hysteresis curve as predicted by Chua [3] simulated using new model in
SPICE. ................................................................................................................... 52Figure 8-4: Characteristics of new model being simulated in SPICE. Resistance increases when
voltage is applied and decreases when no voltage is applied. ............................... 52Figure 8-5: Proposed symbol for memristor which also indicates polarity ................................. 52Figure 8-6: Arduino being programmed in the Arduino IDE, note the switch statement being
used. ....................................................................................................................... 53Figure 8-7: PC based GUI for LED control ................................................................................. 54Figure 9-1: Training followed by an input resulting in a positive output. Memory has been
remembered. .......................................................................................................... 56Figure 9-2: Training followed by long delay and then input resulting in negative output.
Memory has been forgotten after 55s. ................................................................... 56
x
Figure 10-1: Cover of the IEEE Spectrum Magazine, December 2010: Thinking Like a Human - With Memristors ................................................................................................... 60
1
1.0 INTRODUCTION
The human brain contains approximately one hundred
billion neurons. These neurons are organized into highly
specific structures to carry out a function such as Wernike's
Area and Broca's Area which together allow for speech and
the interpretation of language [1]. From a high level
perspective, the function of almost every area of the brain has
already been described to some extent. However from a lower
level perspective, the method by which the individual neurons that make up any particular area is
unknown. For example, although it is known that the hippocampus is responsible for indexing
memories [1], it is unknown how the individual neurons in that region work together to
accomplish this goal. The trouble with discovering the low level workings of the brain is that it
must be studied in vivo. In vitro studies simply can't keep more than a few neurons alive for long
enough. Of course doing brain surgery on a living subject, whether human or animal, is not easy,
but more importantly, individual neurons are so small they cannot easily be individually
manipulated or even seen with various imaging techniques. This makes it very hard to do
experiments where there is a control and only one variable is changed at a time.
If these neural circuit could instead be built using artificial means, such as neuromorphic
circuit, then it would become very easy to experiment or built theorized designs. For example a
team of biologists could look at a brain slice and see how the neurons are connected. These
connections could then be replicated using electronics. If the neuromorphic circuit behaves
similarly to the real neural circuit, then theorized biology is most likely correct. If it does not
Figure 1-1: Broca and Wernicke's area are responsible for speech and
language [9]
2
behave similarly, then there is a problem with the biology or the circuit model. In this way
theories could be quickly validated allowing for the rapid advancement of neurology.
This new knowledge will be key to fully understanding and fighting against
neurodegenerative diseases such as Alzheimer's, Parkinson's and MS. Once again, the high level
effects of these diseases to individual sections of the brain are known however the effect on
individual neural circuits is not known. This research has the potential to accelerate the rate at
which we learn about these diseases.
Even more profound is the question of who we are. For thousands of years philosophers
have struggled to define the notion self. How does our mind think? How is it self aware? How do
we experience emotion? As far as we know, throughout the vast cosmos of the universe, these
are phenomena are only expressed by a few species here on this planet. The notion that one day
such understanding may become possible is not only exciting, it has the possibility to answer the
most important questions humans have ever asked: who are we?
3
2.0 OBJECTIVE
The initial objectives of this project were developed over the course of the first month.
Starting with a basic understanding of what memristors are, the first step was to create a circuit
which could exhibit memory. More research based on the work of Dr. Eric Kandel [2] showed
that memory in neurons was very similar to the type of memory exhibited by memristors.
Therefore the first objective was to demonstrate memory using neuromorphic circuit and
memristors.
More specific objectives continually changed for the first three months as more and more
research into memristors and neurobiology was being done. Finally the following objectives
were chosen for this project:
• Create a neuromorphic circuit which can learn similarly to neural circuits
• Demonstrate this learning by modelling the visual system
• Create a grid of 3x3 LEDs and build circuitry that could recognize the trained pattern
The completion of these objectives would then prove two things:
• Memristors have properties analogous to synapses
• Neural circuits can be built using basic analog electronics
These last two statements are very profound and are arguable more important than the three
objectives. Proving these two statements meant that future work from more seasoned and better
funded teams could yield truly ground breaking results.
4
3.0 MOTIVATION
Neuromorphic circuits are idea for applications that require highly parallel and highly
dynamic computation, such as image recognition. Computers have algorithms that can recognize
a face based on features such as distance between
the eyes, and size of mouth however these
algorithms are not nearly as good as what
humans can do. Humans can recognize a person
from afar, who is facing the other direction, with
different levels of facial hair, different
perspectives, different lighting conditions and
even after years of aging. Computer algorithms
are nowhere near the point where they can
recognize a
person as well
as a human
can. One of the
reasons for this
is because of
the static nature of programming in computers. Each feature such as eye distance must be
manually coded which means that first the feature being recognized must be fully understood by
a human who is then able to code an algorithm to characterize it.
The visual system is much more dynamic. It contains many receptor fields which are
trained to recognize specific patterns such as horizontal lines. Every time a horizontal line is
Figure 3-2: Neurons process information as it is transferred, computer do not [10]
Figure 3-1: The same light is shown on many receptor fields at the same time. Each receptor field is composed of a grid of rods and cones which convert light into chemical energy [1].
5
seen, that same receptor field is triggered and creates an output. The combination of the outputs
from the various receptor field is what goes to the brain. This means that the visual system does
much pre-processing and reduces the amount of information that reaches the brain [1]. This is
what makes humans so much more efficient at image recognition and serves as a perfect
application for this project.
Image recognition is a field which is very important, particularly for defence applications.
Systems that could determine threats such as explosives or other suspicious objects are highly
sought after by the military.
In addition to having many business applications, a more personal application is the
understanding of the human brain in order to fight neurodegenerative diseases such as
Alzheimer's, Parkinson's and MS. A detailed understanding of the neural circuitry involved the
diseases' pathology will allow a cure to be developed much sooner.
6
4.0 PROFESSIONAL PRACTICE
Since this project was the final 4th year research thesis, the goal was to approach the
project like any employer would expect in the work place. Having had experience working on
co-op terms, many of the best practices were known to the team and applied in this project. By
implementing a set of standards to which the entire team would adhere, future reports such as the
final project report, presentation and posters were much easier to complete. Even though work on
a particular topic may have been done months ago, all the relevant documentation was present to
properly detail it.
4.1 Research Methods
The first three months of this project consisted of many iterations of research, SPICE
simulations and bread boarding. Many designs were tested and rejected at various phases of
research. The final design was only determined in January 2011.
Because of the research intensive nature of the project, advice
from both supervisors, Prof. Steven McGarry from the Department
of Electronics, and Prof. Matthew Holahan from the Department of
Neuroscience was crucial. Each week, the team would research a
concept and run through some SPICE simulations of possible
circuitry. These designs would then be analysed by the supervisors to
determine its feasibility as an engineering concept and also its relevance as a biological analog.
Figure 4-1: Primary source of biology information [1]
7
Research from various sources such as Brain and Behaviour [1] and also various papers,
especially from Dr. Eric Kandel [2], were used as the primary source of biological information.
Over time, the constant review of these materials provided the team with a complete overview of
the relevant biology which greatly contributed to the success of the project.
4.2 Health and Safety
Despite the biological nature of this project, there was no human or animal
experimentation needed. All of the actual design work was electronic. As a result the safety
procedures were the same procedures for every laboratory in Carleton. The bread boarding and
testing phases of the project were completed in Mackenzie 4135 because of the presence of the
power supply and oscilloscope. The power supply itself is designed with PTC resettable fuses
and large output impedances so even short circuits do not cause any major problems.
Furthermore, all the voltages were DC and no more than +15V and -15V. Therefore the risk of
injury was minimal.
The building and soldering
phase of the project was completed in
Minto Case 6070. This lab contained
soldering irons as well as proper air
filtration units. Each group member
participated in the solder tutorial
taught by the lab coordinator and Figure 4-2: Standoffs and rubber feet used to isolate boards from environment
8
used the appropriate equipment such as safety goggles. The soldering was done using Weller
solder irons and non lead free solder. Once soldered, each joint was tested for mechanical and
electrical strength using continuity checks. This prevented unwanted short circuits. Furthermore,
the boards themselves were mounted on non-conductive acrylic to prevent the bottom of the
board from touching anything. The acrylic itself was standing on rubber feet to further protect
and isolate the boards from the possibility of electro static discharge (ESD).
4.3 Documentation Practices
Every week there was a project
meeting between all the group members and
the supervisors to assess the week's progress.
Throughout the week, all the work that had
been done was documented in a log book
maintained by each project member.
Furthermore, notes were kept for each
meeting to ensure that a clear progression of
work could be documented and proven if need be. This is an important skill for the work place
because often the engineer's log book is used as intellectual property and proof on invention in
patent disputes. For this reason, each meeting was clearly documented and dates were given for
each entry. Every design, including failed designs, were also documented in the log book.
Figure 4-3: Log book detailing all research and development
9
4.4 Project Management
Due to the research intensive nature of the project, each member of the team was
involved with almost all the phases of the project. The only clear separate came near the end
during the building phase when each member took a finalized design and build the corresponding
board. The design of the circuits and biology research was mostly collaborative. This involved
researching articles and textbooks and then discussing the implications of the findings with the
rest of the group in order to develop a useful electrical circuit.
During the research phase, a SPICE model for the memristor was developed by Laxman
Pradhan while the simulation of the various circuits was done by all group members. These
simulations proved crucial in accepting or rejecting possible designs while also saving time.
Small circuits such as the variable voltage circuit and summation circuit were also designed and
simulated by Laxman however the main circuit, the synapse circuit was designed by all group
members. Extensive testing of the memristors was also done by all group members as well as the
bread boarding of the finalized designs.
During the initial design phase, many possible circuits were rejected and not used. Of these Laxman was involved with the SPICE simulation of the memristor grid and the power supply circuit, both discussed in section 0 -
10
Initial Designs.
For the final construction, the demonstration circuit was built by all group members while
the main circuit was split up. The sensory input circuit and pattern cards were built by Stuart
Tozer and Michael Crupi while the 9-synpase circuit was built by Laxman. Finally the PC GUI
based LED control, the microcontroller program as well as the C# GUI were both programmed
by Laxman. The final testing, calibration and validation of the designed was carried out by all
group members.
The group developed possible time lines in the form of Gantt charts two throughout the
project. Although the Gantt chart was not followed very closely, it did provide the team of a
sense of the overall project and allowed the team to look at the higher level aspects of the
project.
Figure 4-4: Initial Gantt chart developed in September
11
Figure 4-5: Updated Gantt chart developed in December
12
5.0 THEORY
The research for this project was primarily from two different domains: neurons (biology)
and memristors (electronics). The first step was to research both of these domains separately and
then combine the knowledge together to create a useful application, an analog circuit that learns
similarly to a neuron.
Figure 5-1: Presynaptic and postsynaptic neurons converge at synapse [1].
5.1 Biology
5.1.1 Neurons and Synapses
The human brain contains approximately 100 billion neurons. All neurons communicate
with each other through a structure called the synapse. The neuron sending the signal, the
presynaptic neuron, releases neurotransmitters into the synapse. The receiving neuron, the
postsynaptic neuron, has receptors that bind to the neurotransmitters and produce a potential
proportional to the amount of neurotransmitter that was bound. This potential is graded and can
13
be excitatory, positive voltage, or inhibitory, negative voltage. The result is that a signal from
one neuron can create a positive or negative potential at the next neuron. Every neuron takes the
sum of all the potentials it receives at any given time and decides whether or not to output its
own signal. This decision is based on a simple threshold; if the sum of all the inputs is above a
certain threshold, the neuron will fire and output a signal, otherwise it will not. There is an
exception for some sensory input neurons; these neurons tend to have a baseline output and are
always firing. If the input is positive, they will output a stronger signal. If the input is negative,
they will output a weaker signal [1].
Figure 5-2: Positive postsynaptic potentials create a strong output [1].
Figure 5-3: Negative postsynaptic potentials create a weak output [1].
5.1.2 Information Processing in the Brain
Synapses are not just used for interneuron communication, they are also used to process
the information being transmitted. This is possible because synapses have memory. In fact they
are the source of all memory storage in the brain [2]. The synapse determines how much
potential is created at the receiving neuron for any given input. For example, given a small input
stimulus, an untrained synapse could produce a small output potential or even a negative
potential at the postsynaptic neuron. On the other hand, with the same small stimulus, a trained
synapse could produce a large positive output potential. The memory of a synapse stems from
14
the fact that a synapse remembers if it was trained or not. The process of training is known as
long term potentiation (LTP). Every time a synapse
receives an input, it exhibits LTP. As a synapse is used
repeatedly, it could become stronger, or potentiated. This
means that a small input signal produces a large output
potential [1].
The implication is that as a synapse transfers a
signal from one neuron to the next, it not only relays the
signal, but also determines the magnitude of the output.
Furthermore, the act of transferring the information
changes the magnitude of the output for the next signal
because the synapse has been slightly potentiated.
Therefore information is transferred and processed
simultaneously [1].
A high level example of this would be the act of memorization. In order to memorize
some information, say a phone number, one would have to think about it repeatedly. Every time
the number is read, the same neurons are used. Therefore the synapses between those neurons
become slightly stronger every time the number is read. Eventually the synapses can become so
strong that they become a permanent, long term memory [1].
Synapses exhibit both short and long term memory. In humans, the effects of a moderate
potentiation can be lost after a few hours. However after heavy potentiation, the effect becomes
permanent. This is the difference between short and long term memory, short term memory is a
Figure 5-4: After 4 days of training, the memory lasts longer than 1 day of
training and also produces a larger output [7].
15
transient increase in synaptic strength whereas long term memory is a permanent increase in
synaptic strength [1].
5.2 Electronics
5.2.1 Memristors
In 1971, professor Leon Chua theorized the
existence of a missing fundamental electronics component.
This device should behave similarly to a resistor, however
its resistance should increase when an electric field is
applied to it. Furthermore, the device should remember its
new resistance value once the electric field has been
removed. Since the device must remember its changing resistance, it was termed the memristor
[3].
For this project, organic based
memristors are being used. When a
voltage is applied across the device,
the ions will start to move into the
conduction channel and cause an
increased resistance. When the
Figure 5-5: Characteristics of a memristor as described in the original paper from 1971 [3].
Figure 5-6: An electric field causes the ions to intercalate into the conduction channel. This causes the resistance of the channel to
increase or decrease depending of the ion being used [8].
16
voltage is removed, the ions will remain for a time, so the new resistance will be remembered.
Since the ions have a concentration gradient, the high concentration in the channel will cause the
ions to revert back to a default state, in effect forgetting the resistance over time.
For the purpose of this project, the important characteristics of the organic memristor
device are as follows:
1. Memristor's resistance starts at a default value
2. Resistance increases as voltage is applied
3. When the voltage is removed the new
resistance is remembered for a specified
period of time
4. With no voltage applied, the resistance will
gradually revert back to its default state
Given these characteristics, the behaviour of a
synapse can be modelled using the organic
memristor.
Figure 5-7: A memristor device built into a 4-pin male header.
17
Figure 5-8: Measured results of one of the organic memristors
5.3 Using Memristors to Model Synapses
Table 5-1: Comparison of behaviour between a memristor and a synapse
Synapse and Memristor Behaviour Synapse Memristor
Initially untrained Initially low resistance Strength increases after repeated use Resistance increases after voltage is applied
New strength is remembered for some time With no voltage, resistance remains high for some time
Strength of synapse decrease after a few hours Resistance decreases after a few seconds Synaptic strength is variable based on input Resistance is variable based in input
As shown above in Table 5-1, there are many similarities between a synapse and
memristor which make the memristor the idea device for modeling synaptic behaviour.
18
Real synapses can exhibit both long term and short term behaviour. For this project, only
memristors with short term memory were used. While it is possible to make a memristor that
increases its resistance and never goes back down, this is not practical for a proof of concept
since this means that each device can only be used once. Initial designs called for two types of
memristors. One with a memory of 60s and another with a memory of 5 minutes. This would
have been a useful proof of concept for both types of memory however the idea was abandoned
due to complications as described in the next section. In the future, using two types of
memristors may be a useful method of making both short and long term memory circuits.
19
6.0 INITIAL DESIGNS
Throughout the 8 months of development, there were many ideas which did not produce
viable results. These failed designs are discussed in this section along with an explanation of why
they did not work.
6.1 Memristor Grid
The very first design was a grid of
memristors. A 3x3 grid would have four
memristors connected to each of the 9
nodes. An input current would then be
applied to each of the nodes to represent
an input stimulus. As the different
currents are applied to each node, the
values of each of the memristors would
being to change by different amounts.
After a while, each of the memristors
would have a unique value and the
distribution of current around the grid
would be unique to that particular input. Later, another input could be applied to see if it was the
same as the input that was previously remembered. If the new input was the same, the
distribution of current around the grid would have been identical. Various configurations of the
idea were tested using SPICE simulations as shown in Figure 6-1.
Figure 6-1: 4x4 memristor grid with 12 output grounds. Note that the corners will always have the same current at both of their
grounds.
20
This idea was eventually abandoned for several reasons. First, to measure the current
distribution of the network the current at each ground node would have to be measured. In
addition to the hardware requirements for doing so, the biggest problem was the large number of
values that would have to be remembered by some other system. A 3x3 grid has 8 values while a
4x4 grid has 12 values of currents being output to ground. Not only does the number of values
increase linearly with grid size, the values have to be remembered by some system other than the
circuit itself. At first the alternative was to use two such grids and build comparison circuitry for
each of the outputs. In this way, instead of remembering the various values, the currents could be
compared against each other in real time. The down side of this was that there was no way to
remember the values once the system was shut off, defeating the purpose of modelling the
memory of a synapse.
In addition to this, there were problems with the sensitivity of the system. The premise of
the design was that the current would be uniquely distributed across the grid for a given input.
However simulation results showed that this was not the case for nodes which were in the middle
of the grid. In an effort to increase the sensitivity for the inner nodes, addition connections from
the inside were made towards the outside, however the problem of sensitivity was still not fixed.
21
Table 6-1: Simulated results for a 3x3 interconnected memristor grid. The values shown are the voltages in V at each node. Shaded nodes are receiving an input stimulus.
1.66 0.0759 1.66 → 0.0759 1.491 0.0759
1.66 0.0759 1.66
1.66 0.09804 1.66
→ 0.09804 4.881 0.09804
1.66 0.09804 1.66
Table 6-1 shows the results of one of the SPICE simulations that was done with the
memristor grid. Each node of the grid was connected to a battery through a resistor which
represented an input stimulus. For the purposes of the test, the battery was either on (5V) or off
(0v). The grid on Table 6-1 shows stimulus being applied to the shaded nodes while the
unshaded nodes are not receiving stimulus. The resulting voltage measured directly at the node
were then compared. In order to unique identify an input, the voltages must be unique given a
unique input. As shown in Table 6-1, this was not the case. When the inside node received a
stimulus, the resulting voltages were very similar to when the inside node did not receive a
stimulus. Therefore the grid cannot uniquely identify all the possible inputs.
Furthermore, after additional research of the relevant biology, it was also determined that
this configuration does not represent the biology of neural circuits since synapses output positive
or negative signals to the postsynaptic neuron. This design does model the behaviour of
individual neurons.
Due to the complications mentioned above, this design was abandoned and work on a
more biologically accurate model was begun.
22
6.2 Synapse Circuit
This idea was conceived after researching the work of Dr. Eric Kandel, who discovered
the physiological mechanism of memory storage in the brain [2]. His work brought to light the
implication of LTP and its effects on neural circuits. The design of the synapse circuit required
several iterations of SPICE modeling after failed ideas were rejected. This section explains the
failed circuit while the final circuit is shown in the next section.
Originally the idea was to create a circuit that could output positive or negative voltages
based on the inputs it received, similar to a synapse which creates positive or negative potentials
at the postsynaptic neuron. Based on the biology, a state table of the desired behaviour was
created. The state table of this circuit, shown in Table 6-2, was later determined to be incorrect.
Table 6-2: Original state table of synapse circuit.
Trained? Input? Output Yes Yes +5V Yes No -5V No Yes -5V No No +5V
A circuit, shown in Figure 6-2 was created based on this state table. Upon further review
of the biology, the state table was later determined to be incorrect. In a sensory neuron, if there is
no input the output cannot be excitatory or inhibitory, instead it should be a baseline response.
The state table shown in Table 6-2 indicates that in the two cases where there is no input, there
should be an output. This is incorrect since in a neuron, given no input, there would be a baseline
output. To correct for this, a new state table was created which is discussed in the next section.
23
In addition to the incorrect
state table, the circuit required to
achieve this result was very
complicated and required many
components to be very closely
matched. During the bread boarding
phase this proved to be very
problematic. The prototype circuit would not behave similarly to the SPICE simulation. Also
problems with the voltage drop at the diode bridge and input offset voltages at the amplifier
caused additional instabilities with the circuit and produced erratic results. Due to the problems
with the circuit and the failure to follow the biology accurately, this circuit was abandoned,
however some of the ideas of this circuit were kept.
The basic idea of this circuit is that the memristor is placed in a voltage divider circuit.
When the resistance of the memristor is increased, the voltage dropped across it will also
increase. If that voltage is beyond some threshold, the amplifier should output a positive voltage.
If it is below that threshold, the amplifier should output a negative voltage. The threshold voltage
was set using a battery and the output of the voltage divider and the batter were fed into an
amplifier. The problem is that due to the fact the initial state table called for an output even when
there was no input, a diode bridge was required. This is what introduced many of the
instabilities, however the idea of comparing the voltage across the memristors in a voltage
divider was sound. The new design uses this idea and uses a better alternative for creating the
threshold voltage.
Figure 6-2: Original synapse circuit simulated in PSPICE. After building the circuit on a breadboard, it was abandoned due to its
complexity and instability.
24
6.3 Long-Term and Short-Term Memory
Initially, the design was to use two types of memristors, one to
model long-term and another to model shot-term memory. This greatly
increased the complexity of the design since the effect of both
memristors had to be accounted for in the design. Furthermore, the
complexity involved with building and characterizing two different
types of memristors proved to be too much given the imposed time constraints. As a proof of
concept, the goal was to demonstrate that synapses can be modeled using memristor based
circuits. This could be achieved without demonstrating short and long term memory.
6.4 Split Power Supply
Initially the design called for a split
power supply to be built and used to
provide +5V and -5V to the entire circuit.
Since the lab already had a split power
supply, this was more a matter of
convenience than necessity. Having a small
portable power supply would have been
ideal for the project and it also would have made demonstration much easier.
Figure 6-3: One memristor for short term and another
for long term memory
Figure 6-4: Initial design of split power supply using switching inverter
25
Figure 6-5: Power supply with switching inverter soldered on prototype board
Figure 6-6: Solder work of power supply
The first design called for an AC-DC transformer to step down the mains voltage to 12V.
From there a 7805 linear voltage regulator would create +5V while a MAX764 switching voltage
inverter was to be used to create -5V, as shown in Figure 6-4. This design would have been very
safe since the user never deals with AC voltages, instead the rectification is handled with an
approved transformer. This design was built and tested and it originally worked for
approximately one week. After that time, something happened and the circuit stopped working.
The MAX764 chip would heat up very quickly and start to smoke. It was also later discovered
that the power supply, which had been connected to the single synapse board, had destroyed the
AD620 amplifier. Therefore this design was abandoned. The built circuit board is shown in
Figure 6-5 and Figure 6-6. Note the 6-pin power connectors, these were originally planned to
connect to identical 6-pin connectors the other 3 circuit boards, however since the power supply
was abandoned, the wire was modified to simply connect to the bench supply with banana
connectors.
26
Figure 6-7: Split power supply using a power transformer
The problem was most likely caused by a short circuit. It appears as though the MAX764
chip does not have any short circuit protection. The 7805 of course does have automatic thermal
shut down so the positive rail of the power supply still works.
The next idea was to buy a power transformer and do the rectification of the board itself,
as shown in Figure 6-7. This is advantageous in power supply design because the traditional
method of creating a split power supply involve using a centre-tapped transformer. This would
have allowed large amounts of current, and the circuit would have had automatic thermal shut
down and short circuit protection from diodes. Unfortunately, there were too many safety
concerns with connecting a device built by students directly to the mains power line without an
approved transformer in the middle. As a result this design was never built.
In the future, this design could have been accomplished using two AC-AC transformers.
It is very hard to buy a single transformer which is AC-AC and has a secondary centre-tap.
However, by using two AC-AC transformers and shorting two sides together on the board, the
effect would have been a single AC-AC transformer with a secondary centre-tap. Such AC-AC
27
transformers are easy to acquire. Also since both transformers would have been approved by a
regulatory agency, there would be minimal safety concerns. Using two AC-AC transformers is
the correct method of creating power supplies for students and this is what should be done in the
future. However, since the power supply is ancillary to the project and not needed, it was decided
not to waste any more time building one.
28
7.0 FINAL DESIGNS
7.1 Single Synapse Circuit
Once the design was finalized, the first step was to create a demonstration circuit. This
demonstration circuit uses the same synapse circuit discussed in section 7.2.3 - Synapse Circuit
but only has one of them. This allowed the concept to be verified and demonstrated in a simple
setting. The behaviour of a single memristor inside the synapse circuit was clearly demonstrated
here. This circuit was built on its own board and designed to be completely stand alone from the
rest of the project. This circuit also served to determine the best design practices for the more
complicated 9-synpase circuit. Ideas such as the test header pins and clean board layout were a
result of having the experience of building this prototype.
29
Figure 7-1: Schematic of the demonstration circuit. Each element of the main design was built and tested here first.
Figure 7-2: Demo synapse circuit without light cover
Figure 7-3: Demo synapse circuit with light cover
30
The demo circuit board a basic version of every element
used in the main circuit with the exception of the summation
circuit. This allowed each element to be tested in a practical setting
before making more complicated versions of them. Figure 7-2 and
Figure 7-3 show the sensory input circuit, testing and training
voltage circuit, synapse circuit and a
transistor used as a voltage controlled
switch. Each of these elements are
discussed in more details in the
following section as they are also found
on the main 9-synapse circuit as more
complex versions. It is important to
note that the 9-synapse circuit
construction was significantly easier
because of the many errors and problems we encountered with this circuit. One of the lessons
was to always make the solder is clean as possible using wire of exactly the right length and also
using colour coded wires. As shown in Figure 7-4, power lines are red and ground is black;
other colours are then used as necessary.
7.2 9-Synapse Circuit
Figure 7-5: The LED and phototransistor pair of the demo
circuit
Figure 7-4: Solder work of the demonstration circuit
31
The completed circuit has 5 main sections. First a sensory input circuit translates a
pattern of LEDs into corresponding voltages. These voltage represent the photoreceptors in the
eyes. The voltages are then sent into the synapse circuit. The output from the photoreceptor is a
graded response based on how much light is striking it, however the range of possible values is
different for training mode and testing mode. During training mode, the value of the memristor's
resistance should change based on the input. This requires at least 2V. Therefore the possible
range of voltages for training mode was set to 0V - 4V. For training mode, a voltage of less than
0.5V was determined to not be enough to change the memristor but still measure its value
accurately. Therefore the possible range of voltages for testing mode was chosen to be 0V -
0.5V.
32
Figure 7-6: Overall schematic of the main 9-synpase circuit
In training mode, the phototransistors would output a value to the synapse circuit to
causing the memristor to learn. In testing mode, the phototransistors would output a small
voltage to compare the memristor's resistance against the threshold resistor without changing its
value. The amplifier of the Wheatstone bridge was set very high to simplify the results.
Therefore the output can only ever be +5V, 0V or -5V. Each of these voltages was then sent to a
summation circuit which was designed to turn on a transistor only if three or more of the inputs
were +5V. Every negative input would cancel out one of the positive inputs, so the final output
of the summation circuit will only be positive if the inputs meet some threshold. In this case, the
33
threshold was determined to be 3 correct inputs. This is very similar to the way a neuron work as
shown in Figure 5-2 and Figure 5-3; the output of retinal neurons are connected to a summation
neuron. If that neuron receives enough positive inputs, it will output a signal, otherwise it will
output nothing. This behaviour is modelled using a summation circuit which has a gain set so
that the output will be enough to turn on a transistor only if there are three correct inputs.
Figure 7-7: Side view of main 9-synpase circuit
34
Figure 7-8: Top view of main 9-synpase circuit
The various circuit boards were mounted on a piece of acrylic using standoffs. This
allowed the boards to be laid out cleanly. Furthermore, the use of connectors between the boards
ensured that the many wires were cleanly connected.
35
7.2.1 Sensory Input Circuit
The sensory input to this circuit could have been anything. In
order to make a specific application, it was decided that the easier way to
demonstrate the objective was to model the visual system. The visual
system is responsible for taking light and converting it into neural signals.
Images are remembered by training synapses to always expect some
particular input. To model this type of input a series of LEDs and
phototransistors were used. Each LED and phototransistor pair were
isolated to simplify results and ensure that experiments could be closely
controlled. This meant that one LED could only affect one phototransistor. This was done by
putting each LED-phototransistor pair inside a tube to isolate light from other LEDs as well as
the outside world.
When in training mode, Vin = 4V in Figure 7-9. Given a strong light input, the output
voltage would become very close to Vin. When in testing mode, Vin = 0.5V and the output
voltage could therefore become at most 0.5V, given a strong light input. Nine circuits such as
this were created to simulate a 3x3 grid of retinal cells. Each of the 9 outputs was connected to a
synapse circuit.
Figure 7-9: Phototransistor with variable Vin receives light from an LED.
36
Figure 7-10: Sensory input circuit with isolation box
Figure 7-11: Sensory input circuit without isolation box
Figure 7-12: LEDs on top used to show which inputs are on
37
Figure 7-13: Top LED board showing solder work
Figure 7-14: Bottom phototransistor board showing solder work
The sensory input circuit consists of two boards separated by standoffs and an isolation
box. The top board contains white bulb LEDs facing downwards and red square LEDs facing
upwards. The red square LEDs are used only for feedback and demonstration purposes. They are
wired such that when the bottom LED is on, the top demonstration LED is also on. This allows
the user to know which inputs are on. The bottom board contains nine phototransistors, one for
each white bulb LED. The bottom board also contains the variable voltage circuit to change
between training and testing mode. This is discussed in the next section. Finally the bottom
board also has a 12 pin header used to efficiently connect the outputs to the main synapse circuit
board.
38
Figure 7-15: Schematic of each of the nine LEDs
Figure 7-16: Schematic of a single demo LED and input LED
The demo LED squares are actually 4 separate LEDs built into a single package.
Therefore, to properly illuminate them requires a significant amount of current. Furthermore, the
white input LED must also be illuminated at the same time. This is too much current for a
microcontroller to supply, so the LEDs were driven using Darlington transistor arrays. The part
ULN2803AN is 10 pin chip with 8 Darlington transistors; therefore two were needed to drive the
9 LEDs. A pin of the microcontroller was used to drive the input base of the transistor while the
39
output was connected to the LEDs. This is shown in Figure 7-15 and Figure 7-16. Each matrix-
LEDcircuit box in Figure 7-15 is the schematic shown in Figure 7-16.
Lastly, the input can be
controlled via two methods.
Originally the design called for a
microcontroller to be able to turn the
LEDs on and off using its digital
outputs. This design was successfully
implemented, however there was some concern that observers might think the LED pattern is
being saved in the microcontroller and not the memristors. For this reason the isolation box has a
slot which allows patter cards to be inserted. The pattern cards have holes cut in them to only
allow the light from certain LEDs to reach the phototransistors. In this mode, all the LEDs are
turned on at the same time. To accomplish this, the input to the Darlington transistor arrays used
2-pin jumpers which could be connected to a 5V source or a microcontroller.
Figure 7-18: Sensory input circuit using pattern cards to choose inputs. Note the 2-pin jumpers next to the
Darlington array.
Figure 7-19: Sensory input circuit using microcontroller to choose inputs. Note the jumper wires connected to the
Darlington array.
Figure 7-17: Two Darlington Arrays which can take inputs from a 5V source or a microcontroller using the 2-pin header row.
40
7.2.2 Testing and Training Voltage Circuit
As mentioned above, the circuit required
two voltage. One which could change the value of
the memristor and another which could read the
value of the memristor without changing it. The
variable voltage of 4V and 0.5V was created by
using a buffered R2R ladder. An R2R ladder is
typically used to make a DAC where a series of
voltage dividers allow the final output voltage to
by finely controlled. The resistors in the voltage
divider typically have values of R and 2R as
shown in Figure 7-21. This allows voltages to be
created in even steps by applying the maximum
voltage to each successive voltage divider. Since
this application required only two different
voltages, the design was modified somewhat. The
least significant bit was permanently connected to
5V while the second bit was connected to a switch
and a microcontroller digital pin as shown in
Figure 7-22. If either the switch or the
microcontroller connected 5V to the R2R ladder,
the output would become 4.7V. If the second bit was connected to 0V, the output would be 1.2V.
The output of the R2R ladder was then buffered with a power transistor configured as a voltage
Figure 7-22: Buffered R2R ladder used as a variable voltage source.
Figure 7-20: Variable voltage source buffered using TIP41C power transistor.
Figure 7-21: Typical 5-bit R2R ladder which can vary voltage in 1/32nd steps.
41
follower. Since the transistor had a drop of 0.7V, the final output of the circuit was either 4V of
0.5V. Therefore, the microcontroller or the switch could change the circuit to training or testing
mode.
Figure 7-23: SPICE simulation of variable voltage circuit, netlist is included in the appendix
7.2.3 Synapse Circuit
After many months of researching
biology and simulating possible circuits, this
final design was determined to be the most
biologically accurate for the synapse circuit. The
circuit shown in Figure 7-24 uses a Wheatstone
bridge to compare the resistance of the
memristor against that of another threshold
resistor. Initially the circuit would receive a large input voltage so that the memristor could learn,
thereby increasing its resistance. Later, the memristor would be tested at a lower voltage. When
tested, if the resistance of the memristor was above that of the threshold resistor, the amplifier
would output a positive voltage. Given no input, the memristor's resistance would gradually
Figure 7-24: Synapse circuit based on a Wheatstone bridge.
42
decrease over time and fall below that of the threshold resistor's resistance. When this occurred,
the amplifier output would become negative. The state table of this circuit is shown in Table 7-1.
Table 7-1: Correct state table which better represents the true biology of a neuron.
Trained? Input? Output Yes Yes +5V Yes No 0V No Yes -5V No No 0V
As shown on the state table, if
there is no input being received, there will
be no output (0V). This is because the
Wheatstone bridge does not have any
voltage applied to it so the inputs to the
amplifier are both 0V. This means that the
output should also be 0V. The baseline
response of the neuron is also being represented by 0V, so this behaviour is in line with the
biology. If the circuit is receiving an input, the output will depend on whether or not the
memristor has been trained. If the memristor has been trained, its resistance will be high and the
output will be +5V. If the memristor has not been trained, its resistance will be low and the
output will be -5V. In all other cases, the output will be the baseline response. Therefore using
memristors, a very simple circuit can be used to model the behaviour of a synapse.
Figure 7-25: Schematic of the main circuit showing the phototransistor output being used as the input stimulus for the
synapse.
43
Figure 7-26: Connection diagram of all 9 synapse circuits outputting to the summation circuit
As shown in Figure 7-25, the output of the phototransistor is used as the input to the
Wheatstone bridge of the synapse circuit. The synapse circuit uses an AD620 instrumentation
amplifier because of its high performance characteristics as a differential amplifier. This
amplifier has a very good CMRR of 100dB, 50µV max input offset voltage and easily adjustable
gain [4]. As shown in Figure 7-25 the gain of the amplifier is set using a single resistor. In this
case the gain is set to 5000 so that the output can only be +5V, 0V or -5V. Although it is
expensive at $7 per part, the ease of use and reliability made it idea for a proof of concept. Future
designs can most likely use a less expensive part which has multiple amplifiers built into the
same package to reduce cost. Also instrumentation amplifiers are not needed, only differential
amplifiers are needed.
44
Figure 7-27: Main circuit board with 9 synapse circuits
Figure 7-28: Back of main circuit board showing solder work
Since each memristor was slightly different,
the threshold had to be manually adjusted. For this
reason the threshold resistor was chosen to be a 5KΩ
20-turn potentiometer, shown in Figure 7-27 as the
blue parts. To adjust the potentiometer, the output of
the amplifier for each synapse circuit was connected
to an oscilloscope. The memristor was then trained for
60s. The potentiometer was adjusted so that only after 60s would the output of the amplifier
change from -5V to +5V. In this way each memristor could be adjusted to have approximately
the same amount of memory. Because of the amount of testing and adjustment that needed to be
done, headers were specifically added to ensure that this process was as easy as possible. 2-pin
headers were connected between the wiper and the unconnected pin of the potentiometer so that
Figure 7-29: A breadboard was used to test the design before soldering
45
the resistance of the potentiometer could be measured. Measuring the resistance using the
connected pin is not possible due to parallel current paths. Therefore, before soldering, the max
value of each potentiometer was measured, so that this way the resistance could be measured by
measuring the resistance between the two header pins and then subtracting that from the max
resistance. In addition to this, the output of the amplifier could easily be measured because a row
of 9 header pins was installed.
Figure 7-30: 2-pin headers used to measure resistance of potentiometer
Figure 7-31: 9-header pins connected to the output of the synapse amplifier
This board also featured a 12-pin header and another 6-pin header. The 6-pin header was
connected to the power supply and received +5V, GND and -5V. This power was used
throughout the circuit and also sent to the 12-pin header. The 12-pin header received the outputs
of sensory input circuit and also sent power to the sensory input circuit. This allowed nice clean
wire connections between the boards. Note that 6-pin headers were used for power since 2 row
4-pin headers were not available. The unused 3-pins proved useful for branching power off to the
multiple boards as well as providing mechanical strain relief for the wire itself.
46
Figure 7-32: SPICE simulation of the four possible cases as shown in Table 7-1, netlist is included in the appendix
7.2.4 Summation Circuit
A simple op-amp based summation circuit was used add the outputs of each synapse
together. The gain of the amplifier was set such that the output would hit the positive rail only if
3 or more of the inputs were +5V. In any other case, the output would not hit the positive rail of
the amplifier. The output of this amplifier was then used to switch a transistor. A voltage divider
was configured such that the when the amplifier hit the positive rail, the output of the voltage
divider was 0.75V, exactly enough to bias the transistor. The transistor was then used to drive an
LED which indicated if the summation circuit was receiving 3 correct inputs or not. Since the
summation amplifier was inverting, another amplifier was used to invert the signal again. This is
shown in Figure 7-33.
47
Figure 7-33: Schematic of summation circuit
Figure 7-34: Summation circuit starts at the 9 resistors and finishes at the green LED
48
Figure 7-35: One amplifier for summation, one for inversion
Figure 7-36: 2N3904 NPN transistor used to drive LED and also acts like a voltage controlled switch
This summation circuit behaves very similarly to the summation neuron shown in Figure
5-2 and Figure 5-3. It has a threshold below which no signal is produced and the LED remains
off. Unless at least three of the inputs are correct, the LED will not turn on.
Figure 7-37: Soldering of the summation circuit
49
Figure 7-38: SPICE simulation of summation circuit, netlist is included in the appendix
50
8.0 OTHER DESIGNS
8.1 Spice Model
The first step of the project was to be able to
simulate the memristor circuits. This was necessary
since there were dozens of different designs that
needed to be tested and building them on bread boards
would not have been feasible. However the problem
was that the memristor is a very new device and
doesn't come standard in any PSPICE simulation
library. Therefore a model for the memristor was created manually.
Some groups have already published SPICE models based on the TiO2 memristor created
by HP both with [5] and without SPICE netlists [6]. These papers explain the concept well but
fail to characterise a key part of the organic based memristors, they forget their resistance over
time. This functionality was required for this project.
To create the SPICE model, first the model from Biolek et al.'s paper was used [5]. Once
this was working correctly, it was modified to forget resistance over time. This is not easy to do
in SPICE since it required keeping track of time. The general idea was that a variable would be
used to keep track of the amount of time the device had no voltage applied to it. The longer the
device had no voltage, the close the resistance would be to its default value. In essence, a voltage
controlled timer was needed for each memristor. This was created using a 1A voltage controlled
current source connected to a 1F capacitor. When the voltage across the device was 0V, the
Figure 8-1: A cos function was added to the resistance of the memristor to revert back to its
default resistance
51
current source would turn on. Because the capacitor and current source are both 1F and 1A, the
voltage across the capacitor at any given time would indicate the amount of time in seconds that
the device had no voltage. This timer was then used to bring the voltage back to its default value
using a cos function. A cos function was scaled such that when the wave crossed the X axis the
X value would be the initial resistance. Therefore, for values less than the initial resistance the
output of the function would be positive. For values greater than the initial resistance, the output
of the function would be a negative value. This is shown graphically in Figure 8-1. This function
was then added to the resistance of the device using the time variable so that for every second
that the device did not have a voltage across it, the resistance would either increase or decrease
towards the initial value.
Table 8-1: SPICE netlist for the resistance reversion
Resistance Loss Portion of SPICE model *********************************** * Memory Loss * *********************************** * Create a capacitor to store the amount of time from the last voltage input * a current source charges the capacitor when no voltage is applied across the memristor * when there is a voltage across the memristor, the switch discharges the capacitor * the value of the capacitor is the amount the resistance will drift back to its default value Gt 0 t value= if(abs(V(plus,minus)) <= 0.001, 1, 0) Ct t 0 1 IC=0 Raut t 0 1T St t 0 roff1 0 SMOD Eroff roff1 0 value= abs(V(plus,minus)) .MODEL SMOD VSWITCH(VON=0.01mV VOFF=0V RON=0.00001 ROFF=1T)
In order to reset the timer back
to 0s when a voltage was applied to the
device, a voltage controlled switch was
used to ground the capacitor. When the
voltage across the memristor was Figure 8-2: Schematic of SPICE model for memory loss
52
greater than 0V, the switch would close, grounding and discharging the capacitor. Therefore in
this manner, the capacitor's voltage would remain 0V when there was a voltage across the
memristor. Therefore, the voltage across the capacitor would always indicate the amount of time
in seconds since the memristor last had a voltage applied. Finally, in order to avoid convergence
problems with the simulation, a 1TΩ resistor was connected across the capacitor. The SPICE
code required to achieve this is shown in Table 8-1 and this is further illustrated graphically in
Figure 8-2.
Another addition made to the model was a very small current source, 0.000001pA, which
is used to measure the resistance of the memristor without changing its value even when there is
no voltage applied to it. This is required since the resistance must be known when there is no
voltage applied in order to gradually revert back to its default resistance. The complete SPICE
model is attached as an appendix.
Figure 8-3: Classic hysteresis curve as predicted by Chua [3] simulated using new
model in SPICE.
Figure 8-4: Characteristics of new model being simulated in SPICE. Resistance increases when voltage is applied and decreases when no
voltage is applied.
The final step was to create a new symbol for the device.
Chua's original paper proposed a symbol and this was copied for Figure 8-5: Proposed symbol for memristor which also indicates
polarity
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this design. As slight variation was made where a solid block was added to one side so that the
polarity of the device could be determined.
8.2 LED Control using Microcontroller
The LEDs of the sensory input circuit were controlled using two different methods:
pattern cards and the microcontroller based PC interface. To make the PC interface, a GUI was
made using Windows Presentation Foundation (WPF) and C# in Visual Studio 2010. The GUI
was designed to communicate with the microcontroller, an Arduino Mega, via a USB emulated
COM port. The microcontroller was then programmed to turn on specific lights given a specific
command. The commands were all single bytes which were coded with the LED number
followed by the state. For example, '31' meant LED 3 should be on, while '30' meant that LED 3
should be off.
The Arduino program was simply a
switch case statement where each possible
input would control a digital IO port and the
default state was to do nothing, as shown in
Figure 8-6. An Arduino Mega was chosen for
this application because 9 LEDs, the training
and testing voltage and also the return
feedback from the LEDs combined with the
serial communication meant that many IO Figure 8-6: Arduino being programmed in the Arduino IDE, note the switch statement being used.
54
pins were needed. The Arduino Mega could easily handle this, however the normal Arduino
might have needed additional IO pins which would have necessitated shift registers. Since the
microcontroller section is ancillary to the main project, it was decided to keep this section as
simple as possible while ensuring that there were plenty of digital IO and analog port available.
The PC GUI was more complicated
since it had to be designed to flash patterns.
To do this the program was created to be
scalable. The first step was the create a low
level function that would turn any single
LED on. The next step was to create a
function which could take in a 9-element
Boolean array and set each of the 9 LEDs to
the corresponding state. This function used to the first function to set each individual LED and
then looped through the array. Finally a function to flash a pattern was created. This function
used the Boolean array function several times followed by a sleep statement to delay between
flashes. This design ensured that the hard part, the serial communication, was only being done by
one function. This was necessary because the serial communication had to be properly designed
using try-catch statements as well as a update a status register. The status register was another 9-
element array which always held that current state of each LED so that it can be checked by
other parts of the program. The ensure that this status array was always in sync with actual
LEDs, it was updated every time a serial communication was successful.
Figure 8-7: PC based GUI for LED control
55
The GUI itself was created using WPF which is the newest method of creating GUIs
based on the Windows 7 theme. Controls for selecting the appropriate COM port, turning on
individual LEDs, and flashing a series of test patterns were all added as shown in Figure 8-7.
56
9.0 RESULTS
Once the final circuit had been built, the results yielded both quantitative and qualitative
results. These results were later determined to correspond to the desired objectives. Therefore the
results prove that the overall concept of the project was successful. All the results were recorded
and kept for future use.
9.1 Synapse Circuit with Memristor
The first result was with the bread boarded
version of the single synapse circuit, and later the
soldered version of that same circuit. The purpose of
the circuit was to show that the state table motioned
in Table 7-1 was achievable. Indeed, it was proven
to be possible. Given an incorrect input, the circuit
would output -15V, the negative rail, and given a
correct input the circuit would output +15V, the
positive rail. This test was repeated many time with
different memristors and the circuit was later used to
help with the characterization of all the new
memristors.
Using this circuit, the memristor
characteristics could be properly measured. For
Figure 9-1: Training followed by an input resulting in a positive output. Memory has been
remembered.
Figure 9-2: Training followed by long delay and then input resulting in negative output. Memory
has been forgotten after 55s.
57
example, initially the memristors had an ion mobility which was too fast. This meant that the
resistance increased and then decreased too quickly to be useful for a demonstration of memory.
Later version of the memristor had a lower ion mobility to fix this problem.
The desired length of memory for each memristor was 60s given that they had been
trained for 60s. This allowed for feasible demonstrations of the memory while still being capable
of remembering new patterns.
The single synapse circuit was later expanded upon to create a circuit with 9-synapse
circuits. These circuit used exactly the same design as the single synapse circuit. The results
from each individual synapse circuit was identical to that of the single synapse circuit. This
proved crucial in debugging problems, since the desired behaviour of each circuit was known. If
the behaviour deviated, the problem could quickly be determined and fixed.
Figure 9-1 and Figure 9-2 demonstrate the results of a single synapse circuit. In Figure
9-1, the memristor is being trained with a large input voltage (red) and the voltage across the
memristor is shown in blue. The input is then removed for 15s and a smaller test voltage is
applied. The circuit then outputs a positive signal (+15V). In Figure 9-2, the same memristor is
being trained by a large input voltage (red) and then the stimulus is removed for a long time
(55s). During this time, the memristor has forgotten that it was trained. Therefore when the
smaller testing voltage is later applied, the output is negative (-15V) since the memristor does not
know it was trained. In this way, each memristor was determined to have a memory of
approximately 60s. Note that in Figure 9-1, even given the input testing voltage, the voltage
across the memristor beings to fall after approximately 55s. This is because the testing voltage is
designed to not teach the memristor, only test its resistance.
58
9.2 Pattern Recognition
The overall circuit yielded results related to the effectiveness of the pattern recognition.
After testing various configuration of training and testing, it was determined that correct patterns
were identified with an accuracy of 100% and incorrect patterns were rejected with an accuracy
of 100%. To gather these results, a particular pattern was trained and then variation of that
pattern were tested. Variations that were close to the original pattern were intentionally tested to
determine the accuracy of the results. Table 9-1 summarizes a few key results.
Table 9-1: Results of training and testing various patterns
Training Testing LED Indicator
1, 7, 9 2, 6, 8 OFF 3, 7, 9 OFF 1, 7, 9 ON
2, 4, 8 3, 7, 9 OFF 2, 6, 8 OFF 2, 4, 8 ON
1, 5, 9 3, 5, 7 OFF 2, 4, 5 OFF 1, 5, 9 ON
5, 6, 9 4 , 5, 7 OFF 2, 5, 6 OFF 5, 6, 9 ON
Table 9-1 shows which LEDs were on during the training phase. For each trained pattern,
at least three test patterns were shown. One of the shown patterns would be correct, while
the other two would be close to correct. The result was then visually seen by the final
green LED of the summation circuit. If the green LED was on, the circuit indicated that
the pattern being tested was the same as the pattern that was trained. In all other cases the
green LED should be off.
59
As shown in Table 9-1, the desired result was achieved in all cases. The LED
only turned on for inputs which were completely correct and did not turn on in any other
case. This means that the circuit not only had a high level of sensitivity it also had a high
level of specificity.
To test various pattern quickly, as well as for demonstration purposes, a PC based
GUI was created to rapidly cycle through various patterns. The results of the automated
testing were the same as the manual testing, correct pattern were identified by the green
LED while incorrect patterns were rejected.
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10.0 CONCLUSIONS
10.1 Project Conclusion
The objectives of the project were defined as follows:
• Create a neuromorphic circuit which can learn similarly to neural circuits
• Demonstrate this learning by modelling the visual system
• Create a grid of 3x3 LEDs and build circuitry that could recognize the trained pattern
Each of these objectives was successfully completed. The 3x3 grid of LED inputs and
synapse circuit successfully learned and compared patterns. This simulated the type of learning
that occurs in the visual system of the human brain. Finally since this circuit is designed to
simulate the learning that occurs in neurons of the brain, it is a neuromorphic circuit. The
completion of these objectives proved that memristors can be used to model the behaviour of
synapses and neural circuits can be modelled using very basic analog electronics.
Figure 10-1: Cover of the IEEE Spectrum Magazine, December 2010: Thinking Like a Human - With Memristors
61
This project serves as a very basic proof of concept indicating that it is possible to
computers that think like humans. This project was started in June of 2010 and six months later,
the IEEE Spectrum magazine published an article detailing a DARPA funded project intended to
do just that. It is clear that interest in this field is only beginning to flourish and this project
represents the first foray into this new world.
10.2 Concerns with Current Design
Even though the project was a success there are some concerns with the current design.
The first is that the memristors tend to dry up after 2 weeks. At this point, the memristors simply
behave like resistors and don't exhibit any ion mobility. This problem is most likely due to the
epoxy used to seal the device. It can probably be fixed through experimentation.
The second problem is that the memristor values tend to drift. Every few days, the
threshold resistors need to be adjusted because the initial resistance of the memristor changes.
This is most likely caused by the same problem as before, the epoxy does not create a perfect
seal. If the epoxy is improved, this problem should also be fixable.
10.3 Future Designs
There are many possible avenues of research to pursue in order to improve this project.
The most obvious would be in increase the complexity in some way. For example, instead of
62
isolating the LEDs to a single photoreceptor, the light from one LED could be allowed to shine
on multiple photoreceptors. Photoreceptors keyed to a specific wavelength could be used to
distinguish between colours. Multiple grids could be used to identify specific patterns such as
one grid dedicated to horizontal lines and another dedicated to vertical lines. Using multiple
grids could allow for much more complicated image recognition. Also, the amplifiers could be
set with a lower gain so that instead of simple having strong and weak responses, graded
responses could be possible. Lastly, the size of the grids themselves can be increased to allow for
more resolution. This could be accomplished by using a camera's CCD instead of an array of
phototransistors.
A more interesting possibility would be to make the design more biologically accurate. In
this design, the strength of the output is determined by the magnitude of the voltage. In real
neurons, the strength of the output is determined by the frequency of pulses being emitted, where
each pulse has the same magnitude and shape. Since neurons are frequency based, the circuit
could be made that way as well. Using a memristor as part of the RC circuit of a 555 timer, the
frequency of pulses can be made to increase or decrease as the resistance of the memristor
changes. This is most likely the best step forward before complexity is increased through size.
63
REFERENCES
[1] B. Kolbe, An Introduction to Brain and Behavior, 2nd ed.: Worth Publishers, 2005.
[2] E.R. Kandel, "The Molecular Biology of Memory Storage: A Dialogue Between Genes and Synapses," Science, vol. 294, no. 5544, pp. 1030-1038, November 2001.
[3] L.O. Chua, "Memristor - The Missing Circuit Element," IEEE Transactions on Circuit Theory, vol. 18, no. 5, pp. 507-519, September 1971.
[4] Analog. (2011, March) AD620 Instrumentation Amplifier. [Online]. http://www.analog.com/en/other-products/militaryaerospace/ad620/products/product.html
[5] Z. Biolek, D. Biolek, and V. BIOLKOVÁ, "SPICE Model of Memristor with Nonlinear Dopant Drift," Radioengineering, vol. 18, no. 2, pp. 210-214, June 2009.
[6] M. Mahvash and A.C. Parker, "A Memristor SPICE Model for Designing Memristor Circuits," IEEE Circuits and Systems, vol. 1, no. 4, pp. 989-992, August 2010.
[7] C.H. Bailey, D. Bartsch, and E.R. Kandel, "Toward a molecular definition of long-term memory storage," Proceedings of the National Academy of Sciences of USA, vol. 98, no. 24, pp. 13445-13452, November 1996.
[8] S.P. McGarry and N.G. Tarr, "Fabrication and Modelling of Screen-Printed Active Electrolytic Polymer Devices," Semiconductor Science and Technology, vol. 23, no. 5, April 2008.
[9] V.W. Hevern. (2005, February) PSY 340 Brain and Behavior: 4.3 Research Methods. [Online]. http://web.lemoyne.edu/~hevern/psy340_11S/lectures/psy340.04.3.research.meth.outline.html
[10]
M Versace and B Chandler, "The Brain of a New Machine," IEEE Spectrum, pp. 30-37, December 2010.
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APPENDIX A - MEMRISTOR GRID NETLIST
X_MR1 1-1 N006571 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=15k D=10N + UV=10F P=10 X_MR2 1-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=5k D=10N UV=10F + P=10 X_MR3 1-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N UV=10F + P=10 X_MR4 1-1 N007141 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=2k D=10N + UV=10F P=10 X_MR8 2-1 N011451 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=2756 D=10N + UV=10F P=10 X_MR7 2-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=7.35k D=10N + UV=10F P=10 X_MR5 2-1 N010971 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR6 2-1 N007141 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=5.34k + D=10N UV=10F P=10 X_MR12 3-1 N013621 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=15k D=10N + UV=10F P=10 X_MR9 3-1 N013141 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR10 3-1 N011451 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR11 3-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR14 1-2 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=6.34k D=10N + UV=10F P=10 X_MR16 1-2 N015791 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=7k D=10N + UV=10F P=10 X_MR15 1-2 N006571 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=500 D=10N + UV=10F P=10 X_MR13 1-2 N015311 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=200 D=10N + UV=10F P=10 X_MR17 2-2 N017481 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=700 D=10N + UV=10F P=10 X_MR18 2-2 N015791 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=8.54k + D=10N UV=10F P=10 X_MR19 2-2 N010971 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR20 2-2 N017961 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR23 3-2 N013141 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=5674 + D=10N UV=10F P=10 X_MR24 3-2 N020151 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR22 3-2 N017961 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR21 3-2 N019671 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR27 1-3 N015311 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=2345 + D=10N UV=10F P=10 X_MR26 1-3 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR25 1-3 N13119 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR28 1-3 N022341 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=5k D=10N + UV=10F P=10 X_MR31 2-3 N017481 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=3475
65
+ D=10N UV=10F P=10 X_MR30 2-3 N022341 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR32 2-3 N024511 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR29 2-3 N13115 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR35 3-3 N019671 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=8764 + D=10N UV=10F P=10 X_MR34 3-3 N024511 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR33 3-3 N13111 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR36 3-3 N026701 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 V_V1 5V 0 5Vdc X_MR40 2-3 1-2 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=2.45k D=10N + UV=10F P=10 X_MR41 2-2 1-1 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR43 1-4 N13119 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR39 1-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR42 1-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR44 1-4 N125961 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=9k D=10N + UV=10F P=10 X_MR48 2-4 N128991 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=10k D=10N + UV=10F P=10 X_MR45 2-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR47 2-4 N13115 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR46 2-4 N125961 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=13k D=10N + UV=10F P=10 X_MR51 3-4 N13111 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR49 3-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=400 D=10N + UV=10F P=10 X_MR50 3-4 N128991 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=500 D=10N + UV=10F P=10 X_MR52 3-4 N130741 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR54 4-1 N013621 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=200 D=10N + UV=10F P=10 X_MR56 4-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR53 4-1 N132111 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR55 4-1 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=6.54k D=10N + UV=10F P=10 X_MR60 4-2 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR57 4-2 N133861 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR58 4-2 N020151 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=15k D=10N + UV=10F P=10 X_MR59 4-2 N132111 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR61 4-3 N13827 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=14457 + D=10N UV=10F P=10
66
X_MR63 4-3 N133861 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR64 4-3 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR62 4-3 N026701 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=16k D=10N + UV=10F P=10 X_MR68 4-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR67 4-4 N13827 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR66 4-4 N130741 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=1509 + D=10N UV=10F P=10 X_MR65 4-4 0 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR69 2-4 1-3 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR70 3-2 2-1 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR71 3-3 2-2 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=187 D=10N + UV=10F P=10 X_MR72 3-4 2-3 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR73 4-2 3-1 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR74 4-3 3-2 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 X_MR75 4-4 3-3 MEMRISTOR PARAMS: RON=100R ROFF=16K RINIT=11K D=10N + UV=10F P=10 R_R19 3-4 5V 10k TC=0,0 R_R20 4-4 5V 100 TC=0,0 R_R21 4-3 5V 100 TC=0,0 R_R22 4-2 5V 100 TC=0,0 R_R23 4-1 5V 10k TC=0,0 R_R24 3-1 5V 10k TC=0,0 R_R25 3-2 5V 10k TC=0,0 R_R26 3-3 5V 10k TC=0,0 R_R27 2-4 5V 100 TC=0,0 R_R28 2-3 5V 10k TC=0,0 R_R29 2-2 5V 10k TC=0,0 R_R30 2-1 5V 10k TC=0,0 R_R31 1-1 5V 10k TC=0,0 R_R32 1-2 5V 100 TC=0,0 R_R33 1-3 5V 10k TC=0,0 R_R34 1-4 5V 10k TC=0,0
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APPENDIX B - DIODE BRIDGE SYNAPSE CIRCUIT NETLIST
R_R1 0 $N_0001 1k E_U1 $N_0001 0 VALUE LIMIT(V($N_0002,$N_0003)*1E6,-15V,+15V) R_R3 neginput $N_0004 10k E_U2 neginput 0 VALUE LIMIT(V(0,$N_0004)*1E6,-15V,+15V) R_R4 $N_0004 $N_0005 10k R_R6 $N_0007 $N_0006 10k V_V8 $N_0006 0 1 R_R7 $N_0007 0 10k V_V7 $N_0005 0 3 V_V5 $N_0003 $N_0008 250mV D_D8 $N_0008 0 D1N4002 D_D6 0 $N_0002 D1N4002 D_D5 $N_0009 $N_0002 D1N4002 D_D7 $N_0008 $N_0009 D1N4002 R_R2 $N_0009 posinput 500 V_V4 posinput 0 3 R_MRlong $N_0010 $N_0009 1000 R_MRshort neginput $N_0010 250
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APPENDIX C - TESTING AND TRAINING VOLTAGE NETLIST
R_R1 0 N00142 22k TC=0,0 R_R2 N00142 N00692 4.7k TC=0,0 R_R3 N00142 N00163 3.3k TC=0,0 R_R4 N00692 0 2.6k TC=0,0 V_V1 N00163 0 5V R_R5 0 N02995 1k TC=0,0 Q_Q2 N00163 N00692 N02995 TIP41C
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APPENDIX D - WHEATSTONE BRIDGE SYNAPSE CIRCUIT NETLIST
R_R13 $N_0002 $N_0001 250 R_R14 $N_0001 0 800 E_U4 $N_0004 0 VALUE LIMIT(V($N_0003,$N_0001)*1E6,-15V,+15V) R_R16 $N_0006 $N_0005 250 R_R17 $N_0005 0 800 E_U5 $N_0008 0 VALUE LIMIT(V($N_0007,$N_0005)*1E6,-15V,+15V) R_RF3 $N_0003 $N_0002 250 R_MR3 0 $N_0003 1000 R_R3 0 $N_0004 1k R_RF4 $N_0007 $N_0006 250 R_MR4 0 $N_0007 250 R_R8 $N_0010 $N_0009 250 R_R9 $N_0009 0 800 V_V4 $N_0010 0 3 E_U1 $N_0012 0 VALUE LIMIT(V($N_0011,$N_0009)*1E6,-15V,+15V) R_R1 0 $N_0012 1k R_R10 $N_0014 $N_0013 250 R_R11 $N_0013 0 800 V_V9 $N_0014 0 3 E_U3 $N_0016 0 VALUE LIMIT(V($N_0015,$N_0013)*1E6,-15V,+15V) R_RF2 $N_0015 $N_0014 250 R_RF1 $N_0011 $N_0010 250 R_MR1 0 $N_0011 1000 R_MR2 0 $N_0015 250 R_R2 0 $N_0016 1k V_V10 $N_0002 0 0 V_V11 $N_0006 0 0 R_R4 0 $N_0008 1k
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APPENDIX E - SUMMATION CIRCUIT NETLIST
D_D1 $N_0001 $N_0002 D1N4002 V_V1 $N_0001 0 5V
E_U1 $N_0004 0 VALUE LIMIT(V(0,$N_0003)*1E6,-5V,+5V) E_U2 $N_0006 0 VALUE LIMIT(V(0,$N_0005)*1E6,-5V,+5V)
R_R2 $N_0008 $N_0007 560 V_V3 $N_0009 0 5
R_R7 $N_0009 $N_0003 3.3k R_R8 $N_0010 $N_0003 3.3k
V_V2 $N_0010 0 5 R_R5 $N_0003 $N_0004 1.2k R_R9 $N_0008 $N_0006 10k R_R4 $N_0004 $N_0005 12k R_R3 $N_0005 $N_0006 12k
Q_Q1 $N_0011 $N_0007 0 Q2N3904 R_R1 $N_0011 $N_0002 220 R_R10 0 $N_0008 2.8k
R_R6 $N_0012 $N_0003 3.3k R_R12 $N_0013 $N_0003 3.3k
V_V6 $N_0013 0 0 V_V4 $N_0012 0 0
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APPENDIX F - ORIGINAL SPICE MODEL FROM HP MEMRISTOR
* HP Memristor SPICE Model
**http://www.radioeng.cz/fulltexts/2009/09_02_210_214.pdf ************************** * Ron, Roff - Resistance in ON / OFF States * Rinit - Resistance at T=0 * D - Width of the thin film * uv - Migration coefficient * p - Parameter of the WINDOW-function * for modeling nonlinear boundary conditions * x - W/D Ratio, W is the actual width of the doped area (from 0 to D) * Vs 1 0 AC 1 SIN(0V 1.2V 1Hz) Xmem 1 0 memristor *------------------------------------------------------ * Memristor Sub Circuit * *------------------------------------------------------ .SUBCKT memristor Plus Minus PARAMS: + Ron=100R Roff=16K Rinit=11K D=10N uv=10F p=10 *********************************************** * DIFFERENTIAL EQUATION MODELING * *********************************************** * resistor used for convergence (not shown in paper) Gx 0 x value= I(Emem)*uv*Ron/D^2*f(V(x),p) Cx x 0 1 IC=(Roff-Rinit)/(Roff-Ron) Raux x 0 1T *********************************** * RESISTIVE PORT OF THE MEMRISTOR * *********************************** Emem plus aux value=-I(Emem)*V(x)*(Roff-Ron) Roff aux minus Roff *********************************************** *Flux computation* *********************************************** Eflux flux 0 value=SDT(V(plus,minus)) *********************************************** *Charge computation* *********************************************** Echarge charge 0 value=SDT(I(Emem)) *********************************************** * WINDOW FUNCTIONS * FOR NONLINEAR DRIFT MODELING * *********************************************** *window function, according to Joglekar .func f(x,p)=1-(2*x-1)^(2*p) *proposed window function ;.func f(x,i,p)=1-(x-stp(-i))^(2*p)
.ENDS memristor
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APPENDIX G - NEW SPICE MODEL FOR ORGANIC MEMRISTOR
* New model based on HP Memristor SPICE Model **http://www.radioeng.cz/fulltexts/2009/09_02_210_214.pdf * This model takes into account the ionic drift when no voltage is applied * this simulates the short term memory of a neuron, which forgets over time * changing the time constant on the drift will allow the memristor to forget * faster or slower ************************** * Ron, Roff - Resistance in ON / OFF States * Rinit - Resistance at T=0 * D - Width of the thin film * uv - Migration coefficient * p - Parameter of the WINDOW-function * for modeling nonlinear boundary conditions * x - W/D Ratio, W is the actual width of the doped area (from 0 to D) * revert - scaling factor fo how quickly the memristor reverts back to its initial resistance * *------------------------------------------------------ * Memristor Sub Circuit *------------------------------------------------------ .SUBCKT memristor-synapse Plus Minus PARAMS: + Ron=100R Roff=16K Rinit=11K D=10N uv=10F p=10 revert=5 *********************************************** * DIFFERENTIAL EQUATION MODELING * *********************************************** Gx 0 x +value= (I(Emem) * (uv*Ron/D^2) * f(V(x),p)) - ( (revert*V(t))* cos(3.1415926535897*V(res)/(2*Rinit)) ) Cx x 0 1 IC=(Roff-Rinit)/(Roff-Ron) * resistor used for convergence (not shown in paper) Raux x 0 1T *********************************** * RESISTIVE PORT OF THE MEMRISTOR * *********************************** Emem plus aux value=-I(Emem)*V(x)*(Roff-Ron) Roff aux minus Roff *********************************** * Find Resistance * *********************************** * used to calculate the resistance accross the memristor internally * V(res) will give the resistance in ohms (shown in volts) Itest plus minus 0.000001p Eres res 0 value= V(plus,minus)/(I(Emem)) *********************************** * Memory Loss * *********************************** * Create a capacitor to store the amount of time between the last voltage pulse and the current one * a current source charges the capacitor when no voltage is applied accross the memristor * when there is a voltage accross the memristor, the switch discharges the capacitor * the value of the capacitor is the amount the resistance will drift back to its default value Gt 0 t value= if(abs(V(plus,minus)) <= 0.001, 1, 0) Ct t 0 1 IC=0 Raut t 0 1T St t 0 roff1 0 SMOD
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Eroff roff1 0 value= abs(V(plus,minus)) .MODEL SMOD VSWITCH(VON=0.01mV VOFF=0V RON=0.00001 ROFF=1T) *********************************************** * Flux computation * *********************************************** *Eflux flux 0 value=SDT(V(plus,minus)) *********************************************** * Charge computation * *********************************************** *Echarge charge 0 value=SDT(I(Emem)) *********************************************** * WINDOW FUNCTIONS * FOR NONLINEAR DRIFT MODELING * *********************************************** *window function, according to Joglekar .func f(x,p)=1-(2*x-1)^(2*p) *proposed window function ;.func f(x,i,p)=1-(x-stp(-i))^(2*p) .ENDS memristor-synapse *------------------------------------------------------
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APPENDIX H - ARDUINO LED CONTROL CODE
/* This program Reads values from the PC and turns on the corresponding
LEDs. The LED codes are the LED number followed by the the LED status: ex. "31" -> LED 3 ON "30" -> LED 3 OFF "65" turns on the Arduino pin 13 LED, "66" turns is off. This is used to test. */ int inByte = 0; // incoming serial byte int LED1 = 53; int LED2 = 51; int LED3 = 49; int LED4 = 47; int LED5 = 45; int LED6 = 43; int LED7 = 41; int LED8 = 39; int LED9 = 37; void setup() // start serial port at 9600 bps: Serial.begin(9600); // test pin pinMode(13, OUTPUT); //LEDs pinMode(LED1, OUTPUT); pinMode(LED2, OUTPUT); pinMode(LED3, OUTPUT); pinMode(LED4, OUTPUT); pinMode(LED5, OUTPUT); pinMode(LED6, OUTPUT); pinMode(LED7, OUTPUT); pinMode(LED8, OUTPUT); pinMode(LED9, OUTPUT); void loop() // if there is valid data on the serial port buffer if (Serial.available() > 0) // get incoming byte: inByte = Serial.read(); // determine what to do based on byte code // either turn LED on or OFF switch (inByte) case 10: digitalWrite(LED1, LOW); break; case 11: digitalWrite(LED1, HIGH); break; case 20: digitalWrite(LED2, LOW); break; case 21: digitalWrite(LED2, HIGH); break; case 30: digitalWrite(LED3, LOW); break;
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case 31: digitalWrite(LED3, HIGH); break; case 40: digitalWrite(LED4, LOW); break; case 41: digitalWrite(LED4, HIGH); break; case 50: digitalWrite(LED5, LOW); break; case 51: digitalWrite(LED5, HIGH); break; case 60: digitalWrite(LED6, LOW); break; case 61: digitalWrite(LED6, HIGH); break; case 70: digitalWrite(LED7, LOW); break; case 71: digitalWrite(LED7, HIGH); break; case 80: digitalWrite(LED8, LOW); break; case 81: digitalWrite(LED8, HIGH); break; case 90: digitalWrite(LED9, LOW); break; case 91: digitalWrite(LED9, HIGH); break; // Test Case case 65: digitalWrite(13, HIGH); break; case 66: digitalWrite(13, LOW); break; // default case default: break; Serial.print(inByte, BYTE);
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APPENDIX I - C# CODE FOR PC GUI
using System; using System.IO.Ports; using System.Collections.Generic; using System.Linq; using System.Text; using System.Windows; using System.Windows.Controls; using System.Windows.Data; using System.Windows.Documents; using System.Windows.Input; using System.Windows.Media; using System.Windows.Media.Imaging; using System.Windows.Navigation; using System.Windows.Shapes; using System.Threading; namespace lightGUI /// <summary> /// Interaction logic for MainWindow.xaml /// </summary> public partial class MainWindow : Window private SerialPort port; private string[] availablePorts; private bool[] ledStatus; public MainWindow() InitializeComponent(); btn_1.IsEnabled = false; btn_2.IsEnabled = false; btn_3.IsEnabled = false; btn_4.IsEnabled = false; btn_5.IsEnabled = false; btn_6.IsEnabled = false; btn_7.IsEnabled = false; btn_8.IsEnabled = false; btn_9.IsEnabled = false; ledStatus = new bool[10]; availablePorts = System.IO.Ports.SerialPort.GetPortNames(); foreach (string i in availablePorts) cboPorts.Items.Add(i); cboPorts.SelectedIndex = cboPorts.Items.Count - 1; //port.DataReceived += new SerialDataReceivedEventHandler(port_DataReceived); private void button1_Click(object sender, RoutedEventArgs e) port.Close(); this.Close();
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private void btn_LEDon_Click(object sender, RoutedEventArgs e) port.Write(new byte[] 65 , 0, 1); private void btn_LEDoff_Click(object sender, RoutedEventArgs e) port.Write(new byte[] 66 , 0, 1); private void button4_Click(object sender, RoutedEventArgs e) port = new SerialPort(cboPorts.SelectedItem.ToString(), 9600); // Makes sure serial port is open before trying to write try if (!(port.IsOpen)) port.Open(); catch (Exception ex) MessageBox.Show("Error opening to serial port :: " + ex.Message, "Error!"); btn_1.IsEnabled = true; btn_2.IsEnabled = true; btn_3.IsEnabled = true; btn_4.IsEnabled = true; btn_5.IsEnabled = true; btn_6.IsEnabled = true; btn_7.IsEnabled = true; btn_8.IsEnabled = true; btn_9.IsEnabled = true; private void port_DataReceived(object sender, SerialDataReceivedEventArgs e) // Event for receiving data // Read the buffer to text box. //this.Invoke(new EventHandler(DoUpdate)); private void DoUpdate(object s, EventArgs e) // label1.Visibility = Visibility.Hidden; private void voidClick(object sender, RoutedEventArgs e) private void btn_1_Click(object sender, RoutedEventArgs e)
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if (ledStatus[1]) LED(1, false); else LED(1, true); private void btn_2_Click(object sender, RoutedEventArgs e) if (ledStatus[2]) LED(2, false); else LED(2, true); private void btn_3_Click(object sender, RoutedEventArgs e) if (ledStatus[3]) LED(3, false); else LED(3, true); private void btn_4_Click(object sender, RoutedEventArgs e) if (ledStatus[4]) LED(4, false); else LED(4, true); private void btn_5_Click(object sender, RoutedEventArgs e) if (ledStatus[5]) LED(5, false); else LED(5, true); private void btn_6_Click(object sender, RoutedEventArgs e) if (ledStatus[6])
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LED(6, false); else LED(6, true); private void btn_7_Click(object sender, RoutedEventArgs e) if (ledStatus[7]) LED(7, false); else LED(7, true); private void btn_8_Click(object sender, RoutedEventArgs e) if (ledStatus[8]) LED(8, false); else LED(8, true); private void btn_9_Click(object sender, RoutedEventArgs e) if (ledStatus[9]) LED(9, false); else LED(9, true); private void btn_L_Click(object sender, RoutedEventArgs e) bool[] offState = false, false, false, false, false, false, false, false, false; bool[] train = false, true, false, true, true, false, false, false, false; // turn all LEDs off LEDpattern(offState); // train memristors LEDpattern(train);
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private void btn_L_test_Click(object sender, RoutedEventArgs e) // correct bool[] state1 = false, true, false, true, true, false, false, false, false; bool[] state2 = false, false, false, true, true, false, false, false, true; bool[] state3 = false, true, false, false, true, false, false, false, true; // correct bool[] state4 = false, true, false, true, true, false, false, false, false; bool[] state5 = false, false, true, false, true, false, false, false, true; bool[] state6 = false, false, false, false, true, false, false, true, true; // correct bool[] state7 = false, true, false, true, true, false, false, false, false; bool[] state8 = false, false, true, true, false, false, true, false, false; bool[] state9 = false, false, true, false, true, false, true, false, false; // correct bool[] state10 = false, true, false, true, true, false, false, false, false; bool[] state11 = false, true, true, false, true, false, false, false, false; bool[] state12 = true, false, true, false, false, false, true, false, false;
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// correct bool[] state13 = false, true, false, true, true, false, false, false, false; int waitTime = 1500; // Flash Pattern LEDpattern(state1); Thread.Sleep(waitTime); LEDpattern(state2); Thread.Sleep(waitTime); LEDpattern(state3); Thread.Sleep(waitTime); LEDpattern(state4); Thread.Sleep(waitTime); LEDpattern(state5); Thread.Sleep(waitTime); LEDpattern(state6); Thread.Sleep(waitTime); LEDpattern(state7); Thread.Sleep(waitTime); LEDpattern(state8); Thread.Sleep(waitTime); LEDpattern(state9); Thread.Sleep(waitTime); LEDpattern(state10); Thread.Sleep(waitTime); LEDpattern(state11); Thread.Sleep(waitTime); LEDpattern(state12); Thread.Sleep(waitTime); LEDpattern(state13); Thread.Sleep(waitTime); private void LED(int led, bool state) // byte will hold command for MCU byte[] message; if (state) // if LED needs to be on, take LED number, nultiply by 10 and add one // ie. LED9 -> 9*10 = 90, 90 + 1 = 91 message = BitConverter.GetBytes( (led*10) + 1 ); else // if LED should be off, just mutiply by 10 // ie. LED5 -> 5*10 = 50 message = BitConverter.GetBytes(led*10); try // send message to MCU to turn LED on or off port.Write(message, 0, 1);
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catch (Exception ex) MessageBox.Show("Error writing to serial port :: " + ex.Message, "Error!"); // set the LED status variable to the correct state ledStatus[led] = state; private void LEDpattern(bool[] LEDs) for (int i = 1; i <= 9; i++) LED(i, LEDs[i-1]); Thread.Sleep(10); // delay each iteration by 10ms private void btn_allOn_Click(object sender, RoutedEventArgs e) bool[] ptn_allOn = true, true, true, true, true, true, true, true, true; LEDpattern(ptn_allOn); private void btn_allOff_Click(object sender, RoutedEventArgs e) bool[] ptn_allOn = false, false, false, false, false, false, false, false, false; LEDpattern(ptn_allOn);
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APPENDIX J - PC GUI WPF INTERFACE CODE
<Window x:Class="lightGUI.MainWindow"
xmlns="http://schemas.microsoft.com/winfx/2006/xaml/presentation"
xmlns:x="http://schemas.microsoft.com/winfx/2006/xaml"
Title="LED Control GUI" Height="303" Width="441">
<Window.Background >
<ImageBrush ImageSource="windowBackground.jpg" ></ImageBrush >
</Window.Background >
<Grid>
<Button Content="Exit" Height="29" HorizontalAlignment="Left" Margin="297,221,0,0"
Name="button1" VerticalAlignment="Top" Width="115" Click="button1_Click" />
<ComboBox Height="21" HorizontalAlignment="Left" Margin="12,229,0,0" Name="cboPorts"
VerticalAlignment="Top" Width="133" />
<Button Content="Open" Height="28" HorizontalAlignment="Left" Margin="160,222,0,0"
Name="button4" VerticalAlignment="Top" Width="92" Click="button4_Click" />
<Button Content="1" Height="55" HorizontalAlignment="Left" Margin="12,13,0,0"
Name="btn_1" VerticalAlignment="Top" Width="55" Click="btn_1_Click" />
<Button Content="2" Height="55" HorizontalAlignment="Left" Margin="73,13,0,0"
Name="btn_2" VerticalAlignment="Top" Width="55" Click="btn_2_Click" />
<Button Content="3" Height="55" HorizontalAlignment="Left" Margin="134,13,0,0"
Name="btn_3" VerticalAlignment="Top" Width="55" Click="btn_3_Click" />
<Button Content="4" Height="55" HorizontalAlignment="Left" Margin="12,74,0,0"
Name="btn_4" VerticalAlignment="Top" Width="55" Click="btn_4_Click" />
<Button Content="5" Height="55" HorizontalAlignment="Left" Margin="73,74,0,0"
Name="btn_5" VerticalAlignment="Top" Width="55" Click="btn_5_Click" />
<Button Content="6" Height="55" HorizontalAlignment="Left" Margin="134,74,0,0"
Name="btn_6" VerticalAlignment="Top" Width="55" Click="btn_6_Click" />
<Button Content="7" Height="55" HorizontalAlignment="Left" Margin="12,135,0,0"
Name="btn_7" VerticalAlignment="Top" Width="55" Click="btn_7_Click" />
<Button Content="8" Height="55" HorizontalAlignment="Left" Margin="73,135,0,0"
Name="btn_8" VerticalAlignment="Top" Width="55" Click="btn_8_Click" />
<Button Content="9" Height="55" HorizontalAlignment="Left" Margin="134,135,0,0"
Name="btn_9" VerticalAlignment="Top" Width="55" Click="btn_9_Click" />
<Button Height="55" HorizontalAlignment="Left" Margin="297,99,0,0" Name="btn_L"
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VerticalAlignment="Top" Width="55" Click="btn_L_Click">
<Button.Background><ImageBrush ImageSource="pat_L.jpg" /></Button.Background>
<Button.Foreground><ImageBrush ImageSource="pat_L.jpg" /></Button.Foreground>
</Button>
<Button Height="55" HorizontalAlignment="Left" Margin="223,13,0,0" Name="btn_allOn"
VerticalAlignment="Top" Width="55" Click="btn_allOn_Click">
<Button.Background>
<ImageBrush ImageSource="pat_allOn.jpg" />
</Button.Background>
<Button.Foreground>
<ImageBrush ImageSource="pat_allOn.jpg" />
</Button.Foreground>
</Button>
<Button Height="55" HorizontalAlignment="Left" Margin="297,13,0,0" Name="btn_allOff"
VerticalAlignment="Top" Width="55" Click="btn_allOff_Click">
<Button.Background>
<ImageBrush ImageSource="pat_allOff.jpg" />
</Button.Background>
<Button.Foreground>
<ImageBrush ImageSource="pat_allOff.jpg" />
</Button.Foreground>
</Button> <Button Height="55" HorizontalAlignment="Left" Margin="223,99,0,0"
Name="btn_diag" VerticalAlignment="Top" Width="55">
<Button.Background>
<ImageBrush ImageSource="pat_diag.jpg" />
</Button.Background>
<Button.Foreground>
<ImageBrush ImageSource="pat_diag.jpg" />
</Button.Foreground>
</Button>
<Button Content="Test" HorizontalAlignment="Left" Margin="223,148,0,96"
Name="btn_diag_test" Width="55" />
<Button Content="Test" HorizontalAlignment="Left" Margin="297,148,0,96" Name="btn_L_test"
Width="55" Click="btn_L_test_Click" /> </Grid></Window>