Meptec Report 9.3

8/8/2019 Meptec Report 9.3

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Roadmapsfor the Next Generation of

Semiconductor PackagingA Users Perspective ofEvolving Technologies

MEMBER COMPANY PROFILE

Headquartered at DuPont Electronic Tech-nologies in Research Triangle Park, NC isa new kind of team with intent to becomethe leader in how integrated circuits areconnected to the external world. Drawingon the companys broad science capabilitiesand long established positions in both semi-conductor fabrication and circuit materials,DuPont Semiconductor Packaging and

Circuit Materials (DSPCM) is taking aunique approach, and developing a portfolioof new processing and permanent materialsfor producing high reliability chip scale, flipchip, and wafer level packages. page 26

INDUSTRY NEWS

ASAT Holdings Limited has announced that theCompanys board of directors has appointedRobert Gange as president and chief executiveofficer, effective immediately. Mr. Gange suc-ceeds Harry Rozakis. page 16

Tessera Technologies, Inc. has announced thatit has completed a successful chip-scale pack-aging (CSP) technology transfer to North

Dakota State University (NDSU) and haspartnered with NDSU in the development of afully functional microelectronics center at theuniversity. page 17

DuPont Fluoroproducts has announced plans toconstruct a new manufacturing facility to pro-duce nitrogen trifluoride (NF3), a key chambercleaning and etch gas used in semiconductorchip manufacturing and flat panel displays.The plant will be located in Changshu, JiangsuProvince in China. page 19

Dynacraft Industries, one of the largest manu-

facturers of leadframes for the semiconductorindustry, announced that they recently signeda patent license and technology transfer agree-ment with Samsung Techwin. page 20

Semiconductor equipment bookings increase

11% above July 2005 level. page 22

With a unified appro-

ach to the market,

a growing product

offering, and a clear

view to the technology trends

driving needs for new materials,

the outlook is bright for DuPont

Semiconductor Packaging and

Circuit Materials, and for its cus-

tomers.

Book-to-Bill

RatioFORAUGUST 1.05

Book-to-Bill

RatioFORAUGUST 1.05

One Day Technical Symposium and ExhibitsComing to San Jose November 17th ... page 5

Volume 9, Number 3

QUARTER THREE 2005

A Publication of The MicroElectronics Packaging & Test Engineering Council

www.meptec.org Q3 2005 / MEPTEC REPORT 1

The second annual IWLPC returns to theDouble Tree Hotel in San Jose for two days,November 3th and 4th. page 8


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W

elcome to our Q3 issue. Itsbeen a tumultuous last fewmonths for many citizens whosuffered so much in the terrible

aftermath of Hurricanes Katrinaand Rita. Jim Walker ofGartner Dataquest,who presents to our members at our annualpackaging forecast luncheon each September,used the storm analogy to present his forecastin his presentation. Entitled Riding Out theHurricane: Sink, Swim or Surf, Jim gave usthe outlook on the global economy, electronicequipment, semiconductor, and packaging/testservices market, and the packaging forecast. Ifyoud like a copy of Jims presentation pleasecontact MEPTEC. We appreciate his personal,as well as Gartner Dataquests, continued sup-port over the years.

Our next event will be held on November17, 2005 at the Hyatt San Jose hotel in SanJose, California Roadmaps for the NextGeneration of Semiconductor Packaging: AUsers Perspective of Evolving Technologies.MEPTEC Advisory Board members MarcPapageorge of Semiconductor OutsourcingSolutions and Abhay Maheshwari of Xilinx,are chairing this unique event. Building onMEPTECs successful Packaging Industry

Roadmaps symposium in 2003, this event willcontinue looking ahead and predicting newrequirements for semiconductor packaging,

assembly and test. Representatives from manydifferent sectors of the industry participatedin the 2003 event: subcontractors, IDMs, andsuppliers. The differentiating factor for the2005 event will be the perspective of the pre-senters: well hear from the users themselves.See page 5 for information on attending, exhib-iting or sponsoring.

As usual, we also offer a follow-up lookon a past symposium. In August we held anevent on Semiconductor Packaging Strate-gies: Improving Costs, Productivity, and TotalServices to Customers. Chaired by MEPTECAdvisory Board member Joel Camarda ofCamarda Associates, the event brought togeth-er factory managers, process specialists, logis-tic managers and technical gurus from manydifferent companies to discuss how they haveimproved costs, efficiencies, and total serviceto customers. See page 6 for Jody Mahaffeyswrite-up on The Evolution of PackagingCompanies.

Our feature article this issue is fromJim Rates of Chip Supply, Inc., a longtimeMEPTEC Corporate member company. In A

Die Processors View of the Evolution of Bare Die RequirementsJim gives us some history

on the introduction of Known Good Die andthe reasons behind the demand for KGD, anddiscusses WLCSP, CSP and SIP. See page 28for this informative piece.

Our other feature article came about froma seminar that MEPTEC held recently calledWinning Strategies for New Product Launch-es, taught by Doug Molitor and Charles DiLi-

sio of D-Side Advisors. This was somewhatof a diversion for MEPTEC, since we usuallyhold technical symposiums. With more of abusiness slant, the seminar provided new ideasand strategies to help our members becomemore market-savvy. Part of the seminar thatwas led by Charles DiLisio included a sectionon Marketing Mavens. Charles describesMavens as a system thinker, the guy wholooks out to the future and innovates newproducts. He states that Mavens exist in everyorganization, and he shows us how to identifyand utilize them. A very interesting concept;read all about it in his article Markets HaveChanged but Marketing Has Not on page 30.

Our Editorial this issue is contributed bylongtime MEPTEC Advisory Board memberJoel Camarda ofCamarda Associates. As thesymposium chair for the August event on Pack-aging Strategies, Joel was inspired to writeThe Profitability Challenge Or Darwinismin the Semiconductor Industry. It is enlighten-ing to read Joels thoughts on business climatesand models, market shares, and how thingshave changedor, to quote Joel, So whatsnew? See page 38 for this evocative piece.

Our Industry Analysis coverage this issue is

Issue Highlights

Executive Director 4MEPTEC Events Follow-up 6Industry Analysis 10University News 13Industry News 16MEPTEC Technitorial 24Member Company Profile 26Feature Articles

A Die Processors View of 28the Evolution of Bare DieRequirements

Winning Strategies for 30New Product Launches

Thermal Management of 32LGA Packages

Calendar 37Editorial 38

continued on page 9

Council Update

Volume 9, Number 3A Publication of

The MicroElectronics Packaging& Test Engineering Council

801 W. El Camino Real, No. 258Mountain View, CA 94040

Tel: (650) 988-7125Fax: (650) 962-8684

Email: [email protected]

Published ByMEPCOM

EditorBette Cooper

Design and ProductionGary Brown

Sales and MarketingKim Barber

Contributing EditorJody Mahaffey

MEPTEC Advisory BoardPhil Marcoux

MEPTEC Executive DirectorSensArray

Seth AlaviSunSil

Joel CamardaCamarda Associates

Gary CatlinPlexus

Rob ColeMiTech USA

John CraneJ. H. Crane & Associates

Jeffrey C. DemminTessera

Mark DiOrioMTBSolutions, Inc.

Bruce EuzentAltera Corporation

Skip Fehr

Julia GoldsteinAdvanced Packaging Magazine

Chip GreelyQualcomm

Anna GualtieriSPEL Semiconductor Ltd.

Bance HomConsultech International, Inc.

Ron JonesN-Able Group International

Pat KennedyGEL-PAK

Nick LeonardiCMC Interconnect Technologies

Abhay MaheshwariXilinx

Mary OlssonGartner Dataquest

Marc PapageorgeSemiconductor Outsourcing Solutions

Doug Pecchenino

Ray PetitPacific Rim Technology

Jerry SecrestSecrest Research

Jim WalkerGartner Dataquest

Russ WinslowSix Sigma

TEC Report Vol. 9, No. 3. Published quarterly byCOM, 801 W. El Camino Real, Mountain View, CA0. Copyright 2005 by MEPTEC/MEPCOM. All rightsved. Materials may not be reproduced in whole or inwithout written permission.

TEC Report is sent without charge to members of

TEC. For non-members, yearly subscriptions are avail-for $75 in the United States, $80US in Canada andco, and $95US elsewhere.

dvertising rates and information contact Kim Barber,& Marketing at (408) 309-3900, Fax (650) 962-8684.



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The tragedy that has befallenthe U.S. following HurricaneKatrina, and the upcomingholidays for Thanksgiving inmany countries causes me to

reflect on the great need for cooperationin the world.

Hurricane Katrina is but one exam-ple where a calamity on a mighty entity,in this case the Louisiana-Mississip-pi Region of the United States, hasexposed the weaknesses that a country,

a region, and even a company havewhen the unforeseen strikes.The tsunami in Southeast Asia is

another heart-wrenching example.Within our own semiconductor

packaging industry the fire in May 2005in ASEs Chungli Taiwan factory sent awave of fear that the IC industry wouldbe adversely affected.

At MEPTECs Semiconductor

Packaging Strategies symposium inAugust 2005, Maniam Alagaratnam,VP of Package Development for LSILogic discussed the critical need forcooperation with co-design and co-development of packaging with the ICprocess. Hes very qualified to speak onthis given his challenging experienceswith the early Low-K layers and wirebonds on his ICs.

Dropping the walls of competition,dismissing the differences in politics

and ideologies, and paving over thechasms between religions after eventslike these are the only way I can thinkof for the world to continue to strive tobe a better place.

ASE, with the support of its equip-ment suppliers and customers, wasable to emerge from the fire with littleadverse impact. Thanks to the swellingmarket for entry-level personal comput-

ers, theyve even been able to report a10 to 15% increase in sales. LSI Logic,with the help of its Low-K supplierand the very talented engineers underManiam, was able to avoid adversity.

Sadly, many of the victims of Hur-ricane Katrina and the Southeast AsiaTsunami wont be as fortunate as ASEsrapid rebound. They still need our helpand cooperation. Please, as you cel-ebrate Thanksgiving in your country,dont forget these victims. There are

several respectable agencies listed onthe web that can direct you to how andwhat you can do.

Happy Thanksgiving and keep push-ing cooperation!

Phil MarcouxExecutive Director, MEPTEC

Theres a Great Needfor Cooperation

MEPTEC Executive Director

4 MEPTEC Report/ Q3 2005 www.meptec.org


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MEPTECPresentsMicroElectronics Packaging and Test Engineering Council Join Us!

A O N E - D A Y T E C H N I C A L S Y M P O S I U M & E X H I B I T S

Roadmaps for the Next Generation ofSemiconductor Packaging

A User's Perspective of Evolving Technologies

Too often, technology is developed for the sake of technology itself and not from the point of view of the ultimate customerwhose usage and requirements may dictate developments that are tailored towards actual applications. What lies in the

future is not clear to the users and even less so to the development community. As the device technology evolves into next

generation, the interfaces that make these devices useful to the external environment have to evolve as well. What future designand integration manufacturing tools are needed?

Building on MEPTECs successful Packaging Industry Roadmaps symposium in 2003, this event will continue looking ahead and

predicting new requirements for semiconductor packaging, assembly, and test. Representatives from many different sectors of the

industry sub-contractors, IDMS, and suppliers participated in the 2003 event. The differentiating factor for the 2005 event will bethe perspective of the presenters: well hear from the users themselves.

This forum will be a gathering of those ultimate customers and geared towards discussing future horizons in device applications

from their point of view. It will provide insight into requirements for the materials, processes, equipment, infrastructure test, andmethodologies required to improve and clear the path for future needs in the electronic packaging and assembly industry.

The attendees of this symposium will:

Learn about successful implementation strategies for evolving assembly and packaging technologies

Examine creative solutions to electrical and thermal performance design requirements

Increase knowledge of how to achieve successful end-product integration for next generation devices

Look at ways to improve integration and ease of use on for new materials

Gain better understanding of new applications to develop reliable device package approaches

Presenters will come from the following product/device sectors:

ASIC/PLD Memory Microprocessor Emerging devices (MEMS, optoelectronics, etc.)

Analog

Graphics

FPGA

N O V E M B E R 1 7 , 2 0 0 5 S A N J O S E , C A L I F O R N I A

Register Online Today at www.meptec.org

GOLD SPONSORPLATINUM SPONSOR SILVER SPONSORS

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From DIP to SiP, from cans towafer scale, new packages arebeing developed to meet orexceed the device requirementsnecessary to stay in the game.

But what about the packaging indus-tryis it keeping up too? With changescoming so quickly, it is imperativefor the packaging industry to continueto evolve and change their businessstrategies to keep up. With advances incapital equipment, packaging concepts,factory logistics, and supply chain man-agement issues, determining where tochange and how to change is not aneasy task. Of course the ultimate goalhas to be to keep the customer happy,while continually trying to improvecosts and productivity. To help com-panies find the best approach to thiscomplex evolution, MEPTEC broughttogether key factory managers, processspecialists, logistics managers and tech-nology gurus for a Packaging Strategiestechnical symposium to discuss howcompanies can change and grow, andultimately keep up with the demandsof the technology world. Some of thespeakers from the symposium gave usa little insight into the topics that were

discussed.Luu Nguyen, Senior EngineeringManager for National Semiconduc-tor, was a speaker in the Cost Reduc-tion & Process Automation Sessionof the symposium. He feels that com-panies must change their packagingstrategies to maintain flexibility in theface of an ever-changing competitivelandscape. William (Bill) Chen, Senior Tech-nical Advisor for ASE (US), believesthat packaging strategies need to

respond to the consumerization of theelectronics market, which has resultedin packaging becoming a primary dif-ferentiator for consumer electronics.

Chen presented in the Cost Reduction& Process Automation Session.

It is not so much a matter of chang-ing strategies, said Joel Camarda ofCamarda Associates, our business

is dynamic, not static, and thereforebusiness strategies must constantlyevolve, adapt, and progress. From themanufacturers perspective (captive andcontract), efficiencies must constantlyimprove for cost, quality, and service.Camarda was Session Chair for theSuper-Factory Management Sessionof the symposium. Mark Stromberg, SemiconductorEquipment Market Analyst for Gart-ner/Dataquest and presenter in theCost Reduction & Process AutomationSession of the symposium, said that itis not just packaging companies thatneed to change their strategies, butdevice makers as well. Device makersneed to adapt to an ever-changing pack-aging market. Multi-device packages,Wafer-Level Packaging (both in waferfab and in packaging facilities) andthe rise of packaging subcontractors asmajor market players are all key driversaffecting packaging strategies. Jeff Demmin, Director of Ad-

vanced Programs for Tessera Tech-nologies acted as Session Chair forthe Package R&D Session. He believesthe product miniaturization that resultsfrom todays advanced packaging tech-nologies is absolutely critical to thesuccess of most products in the market-place, so companies have to focus onfinding the best solutions wherever theymight be. Finding that best solutionmay require changes to a companysbusiness strategies.

Whether its evolution or revolution,

everyone agreed that changes in gen-eral business strategies are necessary.There appears to be several technologyand/or software advances being made

to help facilitate these changes andprovide more cost-effective packag-ing through process automation, yieldimprovements, etc. Skip Fehr, Indus-try Consultant and Session Chair for the

Cost Reduction & Process AutomationSession, stated that he has seen evolu-tion in the last couple years in this area,but no revolution.

Nguyen also said that he has seensome evolutionary advances in processdevelopment, process automation, ITmanagement (e.g., Web-based visibilityand control), etc., but no single cure-allsolution.

Software and automation tools areextremely important elements whichmake the industry more efficient andproductive, added Chen. The para-digm change today is for greater cus-tomization in products and zero inven-tories in the supply chain. For thesereasons, process automation and yieldimprovement must be considered at thesystem level.

Many of these advances in processautomation and software tools are beingused by what some people are call-ing the Super Factory. According toFred Hartung, Senior Director Global

Logistics for Solectron Corpora-tion, The new super factories arecompact in terms of their layout, takinginto consideration the flow of mate-rial, resources and the capital equip-ment. The factories are flexible andlend themselves to changes in orienta-tion and easy work flow. They are ableto adapt to the changes in customersrequirements or changes in the environ-ment. Hartung presented in the GlobalLogistics Session.

Bill Chen believes the super fac-

tory for today and the future should bea super-intelligent factory. We need toadd super-intelligence to our factoriesso we add maximum value to our cus-

MEPTEC Events Follow-up


The Evolution of

Packaging CompaniesJody Mahaffey

JDM Resources

S A N J O S E C A L I F O R N I A

SemiconductorPackaging Strategies:Improving Costs, Productivity, andTotal Service to Customers

SemiconductorPackaging Strategies:Improving Costs, Productivity, andTotal Service to Customers

8.25.058.25.05Presentedby

A M E P T E C O N E - D A Y T E C H N I C A L S E S S I O N


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tomers products, said Chen. A superfactory should be lean and intelligentwith a diverse menu of products wherethe factory manufacturing process addsvalue, so packaging becomes the pri-

mary differentiator.Many of the presenters believe that

more changes are necessary to helpthese factories operate more produc-tively, and therefore, more cost effec-tively. Hartung pointed out, Supplychains need to be flexible in order tomeet changing sourcing origins of sup-plies and end-market destinations. Fac-tories need to be able to adapt to shorterlife cycles of products. This requiresshrinking the value stream and buildingnimble factories which imbibe the spirit

of change and adopt flexible manufac-turing so as to respond to customersfaster.

Skip Fehr also pointed out that morestandardization would be of help, Butwhile there will be more process stan-dardization, I believe there will less pack-age standardization. Factories need tobe set up to handle quicker changes, butneed to establish automation tooling thatallows changes with minimum issues.

There was general consensus fromthe presenters that as process automa-tion improves and more logistics sys-tem controls are developed for superfactories, there should be an increasein outsourcing. Mark Stromberg feelsthat, As the super factory conceptemerges and capital costs continue torise, there will be fewer players that canplay the manufacturing game. Otherdevice IP companies will be forced intothe outsource model.

Hartung agrees that these devel-opments will lead to an increase in

outsourcing as corporations are able totake advantage of cost benefits throughthe use of flexible supply chains, chang-ing sourcing and markets offered bysuper factories.

But as Nguyen pointed out, Thereare a number of factors which con-trol the decision to outsource, suchas a companys packaging infrastruc-ture (development, support, capacity,etc.), its packaging portfolio, its coststructure, etc. Ultimately, outsourcingis each companys business decision.

While trends continue to lead tomore outsourcing for packaging, whodevelops the next generation of pack-aging is still up for discussion. Chen

believes that the packaging R&D busi-ness needs to be a collaboration betweenmaterial suppliers, equipment suppliers,purchasing subcontractors, customers,and research institutions with the SATS

community continuing to take a leader-ship role in the development and imple-mentation of next-generation packages.He elaborated, With packaging, R&Dmust become an important joint focusfor our entire community. It is vital thatfor everyone to succeed, everyone mustget involved.

Demmin stated that packaging R&Dcould belong in any or all of the busi-ness sectors involved. He said that,Packaging sub-contractors can chooseto provide advanced R&D, or they

could choose to provide the lowest costor quickest turnaround, for example.IDMs could also choose to provideadvanced packaging technologies thatthey have developed themselves, orthey could rely on sub-contractors orindependent R&D firms. It is totally abusiness decision, reflecting the typeof business that a company wants tobe. Each firm needs to find the value /cost point that makes sense for it. Themarketplace might steer R&D towardsa particular type of organization, but itis likely that there will always be pock-ets of packaging R&D in all types ofcompanies in the industry.

Camarda and Fehr both believe thatthe packaging factories need to do theresearch. You need a factory to testR&D developments, said Camarda.If you do not have a factory, testingyour R&D is very difficult.

Fehr added, In the end if an individ-ual company does the research, it maybe difficult to get that package installed

in the super factory unless it can beused across the board for many com-panies. An individual company will notwant to give away his research.

Hartung added that if the packag-ing companies are going to be theones to develop new packages, theyneed to closely understand the chang-ing requirement of their customers fordeveloping more reliable and betterquality packaging material, also pro-viding creative packaging solutions inorder to balance the packaging and

transportation costs.One big advantage to packagingsubcontractors doing their own R&Dis that it allows them to develop new

packages that leverage their existingtooling and materials. It would besmart of independent technology devel-opers to create technologies that lever-age existing tooling and materials to

maximize the likelihood of the technol-ogy being utilized, said Demmin. Onthe other side of the coin, the volumesfor new products these days can be solarge that using new tooling or materi-als is a reasonable option.

As new packages become morecomplex, managing the supply chainfor those products becomes anotherhurdle for packaging companies. Whilemost agree that the OEM or productsupplier must be ultimately responsible,Chen believes that the industry has

natural breakpoints in the supply chain,so that there are individual companieswho can take leadership to managetheir sector of the supply chain.

Hartung, taking this one step fur-ther said, The OEM should have finalresponsibility unless this has beenpurposefully outsourced to a contractmanufacturer. The appropriateness ofoutsourcing the control of the sup-ply chain will depend upon size andmaturity of the OEM and the contractmanufacturer as well as the geographi-cal regions covered by the supply chain.The responsibility rests with the entirevalue stream, so to speak, the differententities would require adopting a col-laborative approach. They would needto take into consideration the needs oftheir value partners next in the overallsupply chain so that the final customerbenefits.

As outsourcing becomes more andmore common, many people thinkthere may be space for companies who

provide logistics management servicesfrom start to finish of a product. Thisis already occurring, according to Har-tung. However, he adds, these 3PLcompanies need to develop a greaterunderstanding of the non-logistics por-tions of the supply chain they operate.Again, this depends upon the relativematurity along with system capabili-ties of the companies involved. Thesecompanies need to understand the valuestream and the flow of the inbound andoutbound logistics, so they can optimize

the movement of the consignments andenhance carrier utilization.Chen pointed out that in order for

this to work, these logistics manage-



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Dr. Luu NguyenNational Semiconductor

CO-CHAIR

Dr. Ken GilleoET-Trends LLC

CO-CHAIR

Were building on the success of our first IWLPC last October. This year there will be more ofwhat you asked for. More exhibits. More original, high-quality technical presentations.

We pledged last year to make this the best conference going. And our attendees said we keptour promise!

Weve reserved the same venue, the deluxe DoubleTree Hotel, only minutes from San Jose

International Airport, for this comprehensive, international meeting. Well have multi-track panelpresentations discussing the latest advances in the industry. Exhibits by industry leaders willdemonstrate the latest products and services for the packaging and test industry.

For more details, visitwww.smta.org.

If the latest advances in chip-scale electronics, flip-chip technology and wafer-level packaging and testare important to your companys success, you must

be in San Jose at the second annual IWLPC.

Plan now to attend this world-class, two-day event on November 3-4.

Presented by Chip Scale Reviewand the SMTA

Dr. Bruce McWilliamsTessera Technologies

KEYNOTE SPEAKER

Emerging technologies WLP modeling and simulation SIP vs. SOC Multichip packages RF and microwave integration Silicon/GaAs/MEMS/photonics Wafer thinning

Test and reliability Flexible substrates Interposers Encapsulants and underfills MEMSfabrication and packaging Flip-chip bumping Wafer-level packaging 3D packaging

System-in-chip System-on-chip Impact of lead-free lithography options Materials/adhesives On-die passives Photomasks Plasma treatments RFID wafer-levelassembly Singulation Routing on wafer Surface cleaning Photoresist tradeoffs

Wafer-level underfill WLP trends

Here are a few of the topics well cover:

Platinum Sponsors:


9/40

ment service companies would need toshow a significant value-add.

Of course there are now and prob-ably always will be certain packagetypes that are more difficult to manage

through the supply chain, no matterwho is managing it. Specialty packageswhich are commonly small volume/highASP packages are hardest to controlaccording to Fehr. These packages areusually less able to be put in some typeof repeat purchase leveltoo manyinventory dollars and too few users.

SiP and Subsystem packages areprime examples today of consumerproduct-oriented package types that aredifficult to manage, said Chen. This iswhere a turnkey organization, offering

packaging, test, materials, logistics, andEMS, has the natural advantage becauseof the knowledge base they have to opti-mize the solution.

It looks like packaging companieswill certainly have their hands full try-ing to keep up with all the technologychanges happening today. Between sup-ply chain management decisions, R&Dfor new packaging concepts, and incor-porating new process automation andsoftware tools into their super facto-ries, it is no wonder that some changesin business strategies might be nec-essary.

MEPTEC Events Follow-up


contributed by Jan Vardaman, Karen Car-penter and Linda Matthew ofTechSearchInternational. Jan and her team offerSIP: A New Version of the MCP?.They look at the history of MCMs and

the entry of SiPs, and discuss numerousconfigurations and applications. See page9 for this interesting article.

Our Member Company Profile thisissue is MEPTEC Corporate memberDuPont Semiconductor their Packagingand Circuit Materials division. Headquar-tered at DuPont Electronic Technologiesin RTP, NC, there is a new kind of teamwith intent to become the leader in howintegrated circuits are connected to theexternal world. They have a uniqueapproach in developing new materials formany types of packages. See their story

on page 26.In our University News section this

issue we profile the University of Alaska

Fairbanks (UAF). Dr. Pramod C. Karulkar,Director of the Office of Electronics Min-iaturization at UAF, joined us in Augustat our Packaging Strategies symposium todiscuss the role of academia in packaging

research and design. On page 13 you canread about the World Class ElectronicMiniaturization Program at the Top of theWorld. Once again we have Jeff Dem-min ofTessera, and MEPTEC AdvisoryBoard member, to thank for letting usknow about this institution and its uniqueprograms.

Were also introducing a couple ofnew features this issue. With the greatinterest that arose surrounding our Q2-05 event on Thermal Management, wedecided to cover a thermal subject in eachissue. Dr. Kaveh Azar ofAdvanced Ther-

mal Solutions will be writing these piec-es. The first one is Thermal Managementof LGA Packages, and can be found on

page 32. Very soon well be announcingplans for our 2nd Annual The Heat isOn symposiumstay tuned for that!

Another new feature is something wecall a Technitorial (or technical edito-

rial). Well be asking members and sup-porters to write one-page how-to pieceson various technical subjects. The firstis from longtime Corporate MEPTECmember and supporter, ASAT Inc. Seepage 24 to see How to Meet the Demand

for Smaller Packages without SacrificingPerformance.

Wed like to thank all of our con-tributors for making this a great issue. Ifyoure reading our publication for the firsttime at one of the many events where wedistribute, or if youre a new member, wehope you enjoy it.

Thanks for joining us!

MEPTEC Council Updatecontinued from page 3


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SiP:

A New Version of the MCP?E. Jan Vardaman, Karen Carpenter, and Linda Matthew

TechSearch International, Inc.

MEPTEC Industry Analysis

The term multichip module(MCM) has been around fordecades and even saw a tran-sition to a few chip packagecoined multichip package

(MCP). Recently a new term has emergedthat has similar drivers and issues. Willthis package be more successful that thepackage concepts of the last decade?What is the difference?

MCMs and MCPs:A History Lesson

MCMs have been confined to high-end applications, where the value theycontribute to the ICs is great enough toabsorb the cost of the custom design,assembly, and test. These applicationsinclude high-end computers, military, andaerospace applications. The multichip

package (MCP) was introduced as analternative to achieve the desired formfactor needs, but at a cost affordable forportable products. By having a busi-ness model similar to that of individu-ally packaged ICs, the MCP became alow-cost solution or so it seemed. Itutilized existing die and existing packagestructures. The most promising MCPswere functional blocks. Rockwells faxmodem was well known for its three-chip version featuring chips wire bondedto a laminate substrate. Several genera-tions of the S-MOS Cardio PC card usedmultichip packages, typically with threechips attached to a laminate substrate.Oki Electric offered a credit card size PCcontaining a multichip BGA package. A361 I/O PBGA contained the chip set ofthree ICs and was one of the first mul-tichip BGAs in production. The packagebody size was 29 mm x 29 mm, and 2.6mm thick. The eutectic solder ball pitchwas 1.5 mm. A digital cellular phoneintroduced by Toshiba contained an MCPconsisting of five chips wire bonded to afour-layer laminate substrate. The module

was packaged in a leadless chip carrier.Fujitsu developed a ten-chip MCP for adigital cellular telephone using a seven-

layer laminate substrate. The module waspackaged in a 256-pin PQFP. A seven-chipphase controller unit was also developedfor an industrial robot application. Themixed signal module was packaged inan 80-pin PQFP. An encryption/decryp-tion module for wireless communicationscontained four chips mounted on a four-layer laminate substrate. The module waspackaged in a 104-pin PQFP. Additionalapplications for Fujitsu modules includeda magnetic tape system and a fax modem.Although the MCP was a lower cost alter-native to MCMs, the KGD and test issuesseen in the MCM arena were also presenthere. These issues continued to restrictbroad market acceptance of the concept.In addition, many companies were able todesign a single chip solution sometimescalled a system-on-chip (SOC). The SOC

provided the same function as the mod-ule.1

Enter the SiPSystem-in-Package (SiP) is a func-

tional system or subsystem assembledinto a single package. It contains two ormore dissimilar die, typically combinedwith other components such as passives,filters, antennas, and/or mechanical parts.The components are mounted together ona substrate to create a customized, highlyintegrated product for a given applica-tion. SiPs may utilize a combination ofadvanced packaging including bare die(wire bond or flip chip), pre-packaged ICssuch as CSPs, stacked packages, and/orstacked die. An SiP can by definitionbe an MCM or MCP but the converse isnot necessarily true. The fit depends onthe type of devices being packaged andwhether the result creates a functionalblock.

Among the advantages of SiP solu-tions include smaller form factor, fastturn-time, and low NRE costs (comparedto a single die design). These advantages

are compared and contrasted with otheralternatives such as SOC.

A Variety of SiP Configurationsfor a Growing Number ofApplications

Digital camcorders have been one ofthe first adopters of new and innovativepackaging technology and the adoptionof SiP is no exception. Driven by goals ofsmaller size and lighter weight, camerasand camcorders continue to use advancedpackages, including SiPs. Hitachi/Mat-sushita Electric Industrial jointly devel-oped a camcorder containing an SiP withstacked chips. Sony describes its solutionas System Integrated Packaging. SonysDCR-IP220 contains a stacked packagewith logic and 128M SDRAM in a 240-pad array package. The Sony Cyber-Shotdigital camera (DSC-F77) has also beenintroduced with SiPs. One package con-tains logic plus 32M flash and the other

contains logic plus 128M SDRAM.2

Sonyhas also introduced stacked package SiPsolutions.

Design and semiconductor packagingfor mobile phones are increasingly drivenby consumer demand for smaller prod-ucts with greater functionality. SiP is oneanswer to this demand because it offersthe following:

Reduced product cost Added features Reduced size Improved performance Accelerated time-to-market

A variety of SiPs are increasinglyfound in the RF, digital baseband, andtransceiver sections of mobile phones.Some of these structures are planar con-structions and several incorporate inte-grated passive substrates. Philips hasdeveloped a thin-film-on-silicon modulethat incorporates passive devices such asplanar capacitors, pit capacitors, resistors,and inductors in the substrate. Philipscalls the module a silicon-based SiP and

is in production with the module. Forimproved electrical performance the typi-cal aluminum conductor was replaced by



11/40

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Figure 1 Intels Four-die StackedPackage. (Source: Intel)

a thick copper layer.3 STMicroelectron-ics is shipping transceiver modules withan RF ASIC flip chip mounted on top ofan integrated passive device. SyChipsmodule incorporates integrated passivesin the thin film on silicon substrate. Flipchip devices are mounted on the moduleto provide a plug and play solution fora WLAN application. The module pro-vides a complete system with no externalcomponents needed and no RF expertiserequired by the customer.4

Additional structures include stackeddie packages or stacked modules. The

first stacked packages utilized in mar-ket applications contained only memory,but increasingly logic devices are beingadded. Figure 1 shows a stacked memorypackage. While the thinnest packages(important for mobile phones) featurebare die stacked inside, issues of bare dieavailability, logics, and testhave resulted in the introduction of anumber of stacked package configura-tions.

The package-on-package (PoP) con-cept is being promoted by a numberof companies, including Amkor. In thisconstruction one package is stacked ontop of another. The packages can bemounted by the IC package subcontractoror the board level assembly house. Infra-structure developments were required,

standardization of pin-out footprints (forthe top stacked package) was necessary,and package-stacking equipment had tobe made available.5 All of these needshave been met and the package is in pro-

duction. Amkors PoP, developed over thelast four years, is shown in Figure 2.

STATSChipPAC and Qualcomm arepromoting a package-in-package (PiP)concept that Qualcomm refers to as astacked module package and is using inproduction today. While the package isconsidered to be more expensive than astacked die package, it offers flexibilityin the configuration of the memory andallows the memory to be fully testedbefore the packages are molded together.6Figure 3 shows a drawing of the PiP con-cept developed by STATSChipPAC.

SiP applications also include medicalelectronics such as smart pills, defenseelectronics, and aerospace applications.While these applications represent smallerunit volumes they represent higher value-added modules. Computer and telecom-munication systems also use SiPs. Theseconfigurations typically feature at baredie surrounded by packaged memory.The module allows reduced layer countsin the system board and total systemcost savings. SiPs can also be found inautomotive electronics and home controls

including lighting.

The FutureKey issues for SiPs include avail-

ability of bare die and testing, logisticaland engineering issues, wafer thinningfor stacked die packages, and assembly.Issues such as the availability of knowngood die, logistics problems in obtainingdie, and testing are the same issues thathave plagued the MCM industry since itsbeginning. New package constructionsthat feature packages for some or all thedie are helping to solve these issues.

With the volumes provided by mo-bile phones, this application acts as a keydriver for the continued adoption of SiP.Other applications that require higherperformance that cannot be obtained from

conventional packaging are able to absorbthe cost of custom packaging.

There are still issues to be resolvedand no one package construction meetsall needs. SoC and SiP are complimen-tary solutions for the electronics industry,according to Renesas and other compa-nies in Japan. Each offer strengths andweaknesses. The key to success for SiPis the word system. Considerationmust be given to the various alternativesin the planning stage of system design asan integral part of the overall strategy. Toaccomplish this, a change must be madein the process to allow system archi-tects, IC designers, I/O planners, packag-ing engineers, and printed circuit boarddesigners to work closely together. Theindustry structure, which has migrated

to one where these skills reside in many,separate companies must be virtually re-integrated to enable co-development andco-design.

TechSearch International has just releasedits new study on SiP: System-in-Package:The New Wave in 3D Packaging.

1E. Jan Vardaman, Is SiP Haunted by theMCM Ghost? Circuits Assembly, Novem-ber 2004, pp. 16-17.

2

K. Iwabuchi, Packaging TechnologyTrends in Digital Imaging Products, IPSS,SEMICON Japan, December 2004.

3D. Chevriw, et al., A Silicon based Systemin Package (SbSIP) Technology, EMRC2005, June 12-15, Brugge, Belgium, p.S9.02.

4 System-in-Package: The New Wave in 3DPackaging, TechSearch International, Inc.5 Akito Yoshida, Package-on-PackageSpace Savings with Flexibility, AdvancedPackaging, August 2005, p. 12.

6 T. Gregorich, SIP: Panacea or Pan-dora? IEMT Symposium, SEMICON West,San Francisco, CA, July 12, 2005.

MEPTEC Industry Analysis


Figure 3 Package-in-PackageStructure. (Source: STATSChipPAC)

Figure 2 Amkors package-on-package (PoP).


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W

hen one thinks of Alas-ka, one visualizes avast, magnificent land-scape of immense natu-ral beauty, auroras and

glaciers, the midnight sun, and thecold winter with very short periodsof daylight. In some circles, Alaska isknown for the regional supercomput-ing center and the geophysical andarctic research carried out at the Uni-versity of Alaska with one of its cam-puses located on a beautiful hillside inFairbanks. However, as perceptionsgo, one does not easily think of Alaskaas the home of anything in high tech-

nology other than the oil pipeline.A new ambitious project at theUniversity of Alaska Fairbanks(UAF) is envisioning Alaska as ahome for high technology R&D, pilotproduction, and commercialization.This project, led by Dr. Pramod C.Karulkar, director of UAFs Office ofElectronic Miniaturization, is lever-aging the universitys infrastructure,industrial partnerships, and govern-ment sponsored programs to establishan advanced technology center that

will enhance the universitys training,education, and research programs andcatalyze regional economic growthin high technology area. UAF hasestablished the Office of ElectronicMiniaturization (OEM) to address theadvanced technology needs of the uni-versity, potential sponsors, and localeconomic development efforts. Tes-sera Inc. (www.tessera.com) is play-ing an important role in this endeavorby licensing and transferring chipscale technology and by partnering on

R&D in the area of advanced electron-ics packaging. The university has builta cleanroom equipped with a com-plete set of electronic packaging tools,

licensed and transferred Chip ScalePackaging (CSP) technologies fromTessera Inc., and passed test-partsthrough JEDEC-like qualificationwith excellent performance. The facil-

ity has now started CSP projects forcustomers and has capacity to acceptCSP and electronic miniaturizationprojects from the government as wellas the commercial sector.

Research in the arctic has alwaysrequired specialized electronics de-signed for the extreme ambient withpower sources lasting for months oryears of service. UAF has a long his-tory of in-house innovative fabricationusing discrete components and ICs.UAFs new program in electronics

miniaturization with facilities in sev-eral buildings adds a high technol-ogy vigor and competitiveness to thatinnovativeness. The main investment

of the program is the chip scale pack-aging facility that occupies 1530 sq.ft. cleanroom in the state of the art,123,000 sq. ft. Natural Sciences Facil-ity (NSF). Although planned as a

class 10,000 cleanroom, it has beenoperating well below class 1000because of some added features suchas an air shower at the entrance andcontrolled access. The cleanroom isequipped with the latest equipmentfor R&D and pilot production of ChipScale Packages, stacked CSPs, andSystems in Packages (SiP). Many ofthe CSP capabilities such as dicing,screen printing, adhesive dispensing,die attach, wirebonding, etc. have abroader use beyond CSP production.

A materials analysis and characteriza-tion facility co-located in the NSF andequipped with many spectroscopic andmicroscopic techniques supports the

MEPTEC University News

World Class Electronic

Miniaturization Program at theTop of the WorldPramod C. Karulkar, Ph. D., Director, Office of Electronics Miniaturization

University of Alaska Fairbanks



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SJSUs educational philosophy emphasizes a

hands-on practical education, based on a soundunderstanding of engineering fundamentals.

electronic miniaturization research.X-ray and acoustic microscopic toolsthat are vital to the packaging researchand pilot production will be locatedin the materials analysis facility. Theprogram is also supported by otherresearch laboratory facilities in thephysics (nano), electrical engineer-ing (RF, wireless, sensors, and spaceelectronics) and mechanical engineer-ing (thermomechanics) departments.Electronic Miniaturization adminis-trative offices, microfabrication labo-ratory (under renovation), customerservice, and OEMs design, engineer-ing, & test group are located in anapproximately 14,000 sq. ft. space in

a separate building near the campus.This facility houses design, layout,modeling, simulation and electricalcharacterization tools and has a sec-tion that can be secured separately forproprietary or sensitive engineeringwork.

OEMs facility is qualified to fab-ricate Tesseras BGA, BGA-L, BGA-W, and Z versions of CSP.The chip scale stacking technology,which has a proven track record in thecommercial world, is particularly valu-

able to producing large compact solidstate memories for applications rang-ing from smart ammunition to spacesystems. The stacked CSP approach

also opens the door for innovativeways to increase the level of function-ality in a very small volume by com-bining different ICs. Most of the CSPfacilities in the world are outside theUS and usually require very large pro-duction volumes. UAFs facility willplay a vital role in supporting R&Dand pilot production needs of entre-preneurial customers and those in thegovernment sector who cannot accessoffshore foundries. Customers will beable to combine CSP, stacked chip, orFlex MCM capabilities with the ser-vices of OEMs design and engineer-ing group to obtain advanced elec-tronics solutions in a one-stop-shop.

DMEA considers CSP technologyand UAFs electronic miniaturizationprogram with full range of servicesand technology critical to modern-izing defense electronics. Althoughthe defense systems market is toughto penetrate, UAF is expecting steadygrowth in demand. Industrial partner-ships are very valuable for OEM. Inaddition to partnership with Tessera,OEM is partnered with Crane Aero-spaces Advanced Integrated SystemsDivision (www.craneaerospace.com)

in developing a sensor system projectthat offers UAF learning opportunitiesin electronic miniaturization and mayresult in more customers in the com-

mercial sector the future.OEMs staff has extensive indus-

trial and academic hands-on experi-ence in sensors, embedded electron-ics, advanced packaging, wafer fabri-

cation, pilot production, and systems.The program is rapidly growing andwelcomes help in the form of equip-ment donations or directing talent toapply for OEMs open positions. TheOffice of Electronics Miniaturizationis aggressively pursuing customers,collaboration, and sponsored pro-grams in the following areas:

Design, engineering, and produc-tion of Tessera BGA chip scalepackages (CSP), chip stacking.

Application specific developmentand implementation of Sensor Sys-tems. Modeling and simulation ofmechanical and electrical performanceof miniaturized electronic systems. Design, engineering, prototypingand pilot manufacturing of miniatur-ized electronic Systems (Multi ChipModule (MCM), System in a Package(SiP), high density boards, stackedcircuits, and dense electronics). Partnership on electronic miniatur-

ization projects involving moderniza-tion and/or innovative ideas. Executing complex electronicsprojects by identifying and acquiringnecessary technology and partners. R&D, consulting, training, andmarket search in electronic systemssolutions, microelectronics design andfabrication; materials, process, anddevice Technologies; embedded sys-tems; RF technologies; power man-agement; failure analysis and technol-ogy transfer.

Finding applications for your ideasor electronic products.

For more information about University of Alaskas

Electronic Miniaturization program see www.silicontundra.org Specific further question should

be addressed to OEMs Director Dr. Pramod C.

Karulkar (907 455 2000) or OEMs PR OfficerSonja Bickford (907 455 2000).

This material is based on research sponsored by

the Defense Microelectronics Activity (DMEA).

The United States Government is authorized toreproduce and distribute reprints for Government

purposes, notwithstanding and copyright notation

thereon. The views and conclusions contained

herein are those of the author and should not beinterpreted as necessarily representing the official policies or endorsements, either expressed or

implied, of the Defense Microelectronics Activity

(DMEA).

MEPTEC University News



15/40


16/40

F&K Appoints NewAccount Managerfor European Sales

As of July 1st Philip Homamihas taken on the position ofAccount Manager within theF&K European Sales organiza-tion. Over the past years hehas worked for F&K DelvotecOttbrunns project managementand prior to that for their salessubsidiary in California. PhilipHomami is responsible for our

customers in the zip codes 0-5in Germany and all customers inBelgium, Luxemburg and TheNetherlands. All inquiries fromthese areas are coordinated byhim.

For more information visitwww.fkdelvotec.com.

ASAT AnnouncesManagementAppointments and

Board of DirectorsChangeHONG KONG and PLEASAN-TON, CA ASAT HoldingsLimited has announced that theCompanys board of directorshas appointed Robert Gange aspresident and chief executiveofficer, effective immediately.Mr. Gange succeeds Harry Ro-zakis, who was terminated bythe board of directors.

Bob has played a key rolein managing the transition ofASATs manufacturing toChina. In addition, his financial

leadership was crucial to thesuccessful bond refinancing lastyear and the recent $30 millionfinancing with the Companystwo largest shareholders, said

Henry Montgomery, chairmanof the board of directors ofASAT Holdings Ltd. Bobsoperations and financial experi-ence will be invaluable as ASATenters its next level of growth.

The Company also an-nounced that effective Aug. 21,2005, Maura Wong, a boardmember since June 2000, re-signed from the Companysboard of directors coincidentwith her retirement from JPMor-gan Partners Asia (JPMP Asia).On Aug. 24, 2005, Eugene Suh,a partner with JPMP Asia waselected to the board of directors,filling the vacancy left by theresignation of Ms. Wong. Priorto joining JPMP Asia in 1999,Mr. Suh was an associate direc-tor at Bear Stearns in their spe-cial situations debt investmentgroup, where he was respon-sible for sourcing and evaluat-ing debt investments in Korea,Thailand, and Hong Kong.

Ed Segal NamedChairman of SEMI

SAN FRANCISCO, CA SEMIhas announced the appointmentof Ed Segal, senior advisor toMetron Technology, as chair-man of the industry associa-tions International Board ofDirectors. Segal succeeds Tet-suro (Terry) Higashi, chairman

and CEO of Tokyo ElectronLtd., who served as chairmanfor the past year. The results ofthe associations annual elec-

tions were announced at the an-nual SEMI membership meet-ing, which was held during theSEMICON West 2005 exposi-tion in San Francisco.

Silicon BorderTaps Octavio Garzato Run Office inMexicaliSAN DIEGO, CA Sili-con Border Development hasan-nounced that it has hiredOctavio Garza as vice presi-dent of business developmentand administration. He will be

responsible for business devel-opment for Silicon Border, aswell as running the companysnewest operations in Mexicali,Mexico.

Silicon Borders Mexicooffices will be based out of theCETYS University in Mexicali,Baja California. The new officeis the most recent in a series ofmilestones achieved for thecompany in the past year.

Garza comes to Silicon Bor-der from Sony Electronics Cor-

poration, where he spent nineyears in a variety of managementpositions in strategic planningand administration, includingdeputy director responsible formanufacturing of $800M USDin electronics products annuallywith over 3,600 employees inMexico. Garza is also a rec-ognized leader in the Mexicanelectronics industry holding ac-tive roles in business advisorycommittees on curriculum forstate and private universities.Garza has also held prior man-agement positions with Deloitte& Touche and Monsanto.

Silicon Border is a 10,000-acre high-technology sciencepark catering to the specializedneeds of the semiconductor andother capital-intensive technol-ogy sectors. Planned for devel-opment along the U.S.-Mexicoborder in Mexicali, SiliconBorder enables a cost-effectiveand competitive manufacturingalternative in North America foremerging and global companies.

Improving upon the worldsleading technology parks, theparks 15 square miles of world-class infrastructure and educa-

tion will support the stringentrequirements of the semicon-ductor, flat panel display, tele-com, optoelectronic and bio-technology industries.

More information about Sili-con Border is available online atwww.siliconborder.com.

Carsem AppointsNew GeneralManager forS-Site FactorySCOTTS VALLEY, CA Car-sem has announced that Mr.M. H. Toh recently joined the

company as General Managerof the Carsem S-Site factory. Hereports to Carsems Chief Oper-ating Officer, Mr. S.W. Woo,and is replacing the former Gen-eral Manager, Mr. Alex Khor,who retired in June this year.

Mr. Toh has over 25 years ofexperience in the semiconductorindustry with an extensive back-ground in both the assemblyand test operations. He has heldvarious management positionsin Production, Quality Assur-

ance, and Process Engineering.Prior to joining Carsem, he wasthe Assembly Operations Direc-tor for National Semiconductorin Melaka, Malaysia.

Carsem is a member of theHong Leong Group with facto-ries located in Ipoh, Malaysia,Suzhou, China and sales officesacross the USA, plus the UKand Taiwan. Carsem, Inc. salesheadquarters is located in ScottsValley, CA.

For more information visitwww.carsem.com.

Maxtek Signs NewRepresentativeFirmsBEAVERTON, OR MaxtekComponents Corporation, aTektronix, Inc. company anda custom microelectronics as-sembly and test service pro-vider, has announced formalrepresentation agreements with

Dura Sales of Southern Califor-nia, Hi-Peak Technical Sales,Schoenduve Corporation, andSomers-Stanton Incorporated,


MEPTEC Industry News


17/40

manufacturers representativefirms in Southern California,New England, Northern Cali-fornia and the Midwest respec-tively.

Maxteks success as a cus-tom microelectronics serviceprovider is largely attributableto our deep technical experi-ence and our ability to becomean extension of our custom-ers development teams, saidJeff Dick, Director of BusinessDevelopment, Maxtek Compo-nents. When evaluating poten-tial partners, technical expertiseand a spirit of teamwork areat the top of the list of ourselection criteria. Our selectionof Dura Sales, Hi-Peak, Scho-enduve and Somers-Stanton asMaxtek representatives is theresult of this evaluation processand they are welcome additionsto the Maxtek team.

Maxtek Components Cor-poration is a proven micro-electronics assembly and testcompany providing a completerange of custom design, proto-typing, manufacturing and testservices to equipment manufac-turers. With 35 years of experi-ence serving the measurement,military and medical markets,Maxtek works as an extensionof our customers product teamsto cost-effectively resolve themost demanding packaging andinterconnect challenges. Head-quartered in Beaverton, Oregon,Maxtek can be found on theweb at www.maxtek.com.

Tessera BringsChip-Scale Pack-

aging Capabilitiesto North DakotaState UniversitySAN JOSE, CA Tessera Tech-nologies, Inc. has announcedthat it has completed a suc-cessful chip-scale packaging(CSP) technology transfer toNorth Dakota State University(NDSU) and has partnered withNDSU in the development of afully functional microelectronics

center at the university. As partof a multi-year government pro-gram sponsored by the DefenseMicroelectronics Activity

(DMEA), Tessera has licensedits MicroBGA CSP technol-ogy to NDSU and has providedthe university with the technicalknowledge and training neces-

sary to package and assemblesemiconductor chips, such asEEPROM, DRAM and Flashmemory. These semiconduc-tor devices are widely utilizedin defense, medical, wireless,consumer and computing elec-tronics to meet next-generationminiaturization, performanceand reliability requirements.

The announcement marksthe culmination of a joint effortby Tessera and NDSU to cre-ate a regional microelectronicscenter supporting the manu-facturing needs of governmentagencies while facilitating thegrowth of technology compa-nies.

The work completed byNSDU and Tessera was spon-sored by the DMEA, an arm ofthe U.S. Department of Defense(DoD). NDSU is currently in theprocess of fabricating chip-scalepackaged devices to be used inthe DoD-DMEAs Chameleonprogram, which aims to developwireless, low-observable sur-veillance sensors combined witha high-sensitivity base stationreceiver to provide a method ofcollecting more accurate intelli-gence information for enhancedsecurity and safety, effectivemilitary engagement and rapiddissemination of intelligencedata to decision makers.

Tessera is headquartered inSan Jose, CA. For more infor-mation visit www.tessera.com.

HoneywellExpandsManufacturingin Asia/PacificRegionMORRIS TOWNSHIP, NJ Honeywell has announced thatits Electronic Materials businesswill expand its Asia/Pacific man-ufacturing capabilities to includethe production of 300mm PVD

(physical vapor deposition)sputtering targets. Located inJincheon, Korea, Honeywellsplant will provide customers in

this critical region with a localsupply of leading technologymaterials used for the produc-tion of semiconductors.

Honeywells current capa-

bilities at the site include theproduction of materials sup-porting 200mm semiconductormanufacturing, referring to thediameter of the silicon waferused to produce multiple inte-grated circuits or chips.

Scheduled to be completedin the second half of this year,Honeywells new Asia/Pacific300mm PVD target manufac-turing is part of the companysoverall commitment to the re-gion, where chips are increas-ingly manufactured for exportworldwide. Honeywell alsomanufactures 300mm PVD tar-gets at its Spokane, Wash. facil-ity.

For more information, pleasevisit www.honeywell.com.

K&S QuatrixTechnology isAwarded APA BestProduct in SATS

Category

WILLOW GROVE, PA Ku-licke & Soffa Industries, Inc.

recently received the 2005Advanced Packaging Award(APA) in the category of Semi-conductor Assembly & TestServices for its new Quatrixphotolithographic package testtechnology. Advanced Pack-aging Magazine and SEMI(Semiconductor Equipment andMaterials International) sponsorthe Advanced Packaging Award(APA). A distinguished panelof industry experts chooses thebest technological advance-

ments in 19 categories, includ-ing semiconductor assemblyand test services.

K&S Quatrix is a revolu-

tionary new interconnect tech-nology, which offers greaterelectromechanical performanceat lower cost-of-ownership.This new package test technol-

ogy is based upon proprietaryphotolithographic technol-ogy developed exclusively byK&S.

Quatrix is based on an ad-vanced photolithographic man-ufacturing technology that pro-duces no sliding parts and hashigher mechanical precisionwith improved contacts, whichoffers high consistency alongwith excellent first pass yields.

K&S plans to further expandits Quatrix product portfolio toall of the most demanding re-quirements such as testing inQFN, BGA and LGA devices.

For more information onQuatrix technology, visit www.kns.com or email to Mark Sul-livan, K&S Marketing Director,at [email protected].

STATS ChipPacRapidly Expand-ing Capacity and

TechnologyPortfolio in ChinaSINGAPORE and UNITEDSTATES STATS ChipPACLtd. has announced it is rapidlyexpanding both its manufactur-ing capacity in China and thedepth of its technology portfo-lio for advanced laminate pack-ages and System-in-Package(SiP) solutions. The new facil-ity will almost double the cur-rent manufacturing floor space,

further strengthening STATSChipPACs position as the larg-est full turnkey assembly andtest service provider in China.

A new 300,000 square footfacility will be built next toSTATS ChipPACs existing430,000 square foot facility inthe Qingpu District of Shang-hai. The building constructionis scheduled to begin in thethird quarter of this year andwill be facilitized according tocustomer demand with a tar-

geted completion of the factoryin mid 2006.

Beginning in the first quar-ter of 2005, STATS ChipPAC




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Shanghai has ramped a varietyof high volume laminate prod-ucts to support multiple cus-tomers in markets such as chip-sets, PC computing, consumer,

and broadband applications.Research and development re-sources have been added to pro-vide customers with full productdevelopment support for nextgeneration emerging productsas well as standard packagingprograms.

Further information is avail-able at www.statschippac.com.

FlextronicsSelects AIT for

Dual Chip QFNPackage for Usein ConsumerElectronicsSINGAPORE Advanced In-terconnect Technologies (AIT)has announced that Flextron-ics Semiconductor has chosenAITs QFN package for itsdevices used in next genera-tion consumer electronics appli-

cations. Utilizing AITs QFNpackage, Flextronics will ben-efit from features of reducedfootprint and improved perfor-mance.

In addition, AIT will providea turnkey service that includesassembly, final test and tape andreel services for Flextronics.AITs QFN packages have beenselected due to their superiorelectrical and thermal perfor-mance.

AITs QFN package en-

ables us to leverage power,footprint and performance thatrenders improved reliabilitywhile catering to the fast grow-ing consumer electronics mar-ket, said Arnold Virrey, pack-aging manager at FlextronicsSemiconductor. Our long termrelationship with AIT as well astheir ability to offer a completeturnkey solution that includesassembly, test and tape and realservices made them a naturalchoice.

For more information visitwww.aithome.com.

SiliconPipe andNano ClusterAgree to Develop

Products UsingNanotechnologySAN JOSE, CA SiliconPipe,Inc., of San Jose and Nano Clus-ter Devices, Inc., have signed aLetter of Intent to jointly devel-op novel conducting structuresto be used in high-speed semi-conductor packaging and metal-lic-based interconnect designs.

We have identified keyapplication areas where we canuse the methods developed byNano Cluster Devices to cre-ate circuit elements from self-assembled atomic clusterswhich will significantly improvehigh-speed metallic circuit per-formance, said Kevin Grundy,CEO of SiliconPipe.

The combination of Sili-conPipes electronic design ex-pertise and atomic cluster depo-sition techniques from NanoCluster Devices will enable thecreation of unique structuresthat are impossible to create

economically by other tech-niques, comments Dr. SimonBrown, Executive Director-Sci-ence and Technology for NanoCluster Devices, Ltd.

For additional informationabout Nano Cluster DevicesLtd., visit their website at www.nanoclusterdevices.com.

For additional informationabout SiliconPipe, visit theirwebsite at www.siliconpipe.com.

Rohm and HaasCelebrates NewChina R&D CenterPHILADELPHIA, PA, andSHANGHAI, China Rohmand Haas Company has cele-brated the official ground break-ing for its new China Researchand Development Center inShanghai. Located on 33,000square meters (over eight acres)in the Zhangjiang Hi-Tech Park,Pudong New Area, the worldclass facility will serve as thecompanys primary research

and technical service headquar-ters for China and the Asia-Pacific region.

This is an exciting andincredibly important day forour company, our customers,and the more than 1,000 Rohmand Haas employees workingin China and the surroundingregions, said Raj L. Gupta,chairman and chief executiveofficer of Rohm and Haas Com-pany. For nearly 100 years,

creative chemistry and the inno-vative spirit of Rohm and Haasresearchers have deliveredamazing technologies and prod-ucts serving hundreds of mar-kets. With next years opening,this new research and devel-opment center will mark ourongoing commitment to serv-ing a rapidly growing customerbase in the Asia-Pacific region,Gupta said.

Nearly 200 guests attendedthe event, including government

officials from Shanghai, PudongNew Area and Zhangjiang Hi-Tech Park. Other dignitariesincluded officials from the Peo-ples Republic of China Minis-try of Science and Technologyand the U.S. Consulate Generalin Shanghai, managers fromShanghai Zhangjiang (Group)Co., Ltd., representatives fromcustomers and neighboringcompanies, and Rohm and Haasemployees and executives fromaround the world.

More information aboutRohm and Haas can be found atwww.rohmhaas.com.

K&S AnnouncesOrders for 580Wire Bondersfrom SPILWILLOW GROVE, PA Kulicke & Soffa Industries, Inc.has announced that SiliconwarePrecision Industries Co., Ltd.(SPIL), a leading provider of

comprehensive semiconduc-tor assembly and test services,has placed a series of purchaseorders for K&S wire bondersfor delivery to its Taichung,Taiwan facility. K&S providesthe majority of SPILs wirebonder capacity and the Com-pany now expects to receiveadditional Maxm Ultra ordersto meet SPILs ongoing pro-duction demand. The ordersfor 580 wire bonders include:160 Maxm Plus machines inthe final weeks of the quarterended June 30, 2005; currentquarter-to-date orders for 113Maxm Plus machines; and307 of the newest Maxm Ultramachines to meet the challengesof increased package function-ality and small footprint devicesbeing driven by low-cost, per-sonal computers. Delivery datesare currently being scheduled.

Kulicke & Soffas web siteaddress is www.kns.com.

For further information visitSPILs web site at www.spil.com.tw.



From left to right: Kevin Grundy, SilcionPipe; Dr. SimonBrown, Nano Cluster; Dr. Alan Rae, Nano Cluster.


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Kyocera ReceivesAwards fromFreescale

SemiconductorSAN DIEGO, CA Kyocerawas presented with the Suppli-er of the Year Award and theGold Performance ExcellenceAward by Freescale Semicon-ductor, Inc. at its annual Sup-plier Day on August 2, 2005.

The Supplier of the YearAward was given to Kyoc-era for their outstanding sup-port of the RF NI-360 basestation packages from its U.S.

manufacturing facility and highperformance PowerPC proces-sor programs in Kyoceras HIT-CETM material manufacturedat its Kokubu, Japan plant.

Of 90 suppliers, Kyocerawas one of 13 that received theGold Award. Kyocera earnedthis award by exceeding Fre-escales performance ratings forall four quarters of the calendaryear. Kyocera understands andcontinually shows the dedica-tion and commitment it takes

to achieve this degree of per-formance in the areas of cost,quality, delivery, service andtechnology.

These awards are shared byKyocera Corporations CeramicPackaging and CommunicationsDevice Divisions.

STATS ChipPacIncreases Flip ChipCapacity

SINGAPORE and UNITEDSTATES STATS ChipPACLtd. has announced it is expand-ing its flip chip assembly capac-ity to support growing customerdemand for flip chip packages.

The increase in flip chipassembly capacity aligns withSTATS ChipPACs recently an-nounced 300mm wafer bump-ing service and reinforces theCompanys goal of providinga full turnkey service offeringfor customers. STATS ChipPAC

will add assembly equipmentand infrastructure specificallytailored to high volume manu-facturing of flip chip packages.

As a result, the Companysflip chip capacity is currentlyexpected to reach several mil-lion units per month by the firstquarter of 2006.

STATS ChipPACs flip chipportfolio ranges from large sin-gle die packages with passivecomponents used for graphicsand ASIC devices, to modulesand complex three dimension-al (3D) packages that containlogic, memory and radio fre-quency (RF) devices and thatintegrate flip chip and wirebonding interconnection withinthe same package.

Further information is avail-able at www.statschippac.com.

DuPont Fluoro-products to BuildNF3 ManufacturingPlant in ChinaWILMINGTON, DE DuPontFluoroproducts has announcedplans to construct a new man-ufacturing facility to producenitrogen trifluoride (NF3), akey chamber cleaning and etch

gas used in semiconductor chipmanufacturing and flat panel dis-plays. DuPont Fluoroproductsplans to install its patented puri-fication technology to deliverhigh-quality grades of DuPontZyron NF3 electronic gasesto the global market. The newplant will have 450 tonnes peryear of initial capacity whenproduction starts in 2007.

The plant will be locatedin Changshu, Jiangsu Provincein China, where DuPont Fluo-roproducts has established anew multi-product complex, aspart of a larger DuPont strat-egy to double its investment inthis high-growth region fromthe existing US$600 million toUS$1.2 billion by 2010.

Other products in the Du-Pont offering of electronic gasesinclude Zyron 116 (C2F6),Zyron 8020 (C4F8), Zyron23 (CHF3), and Zyron 32(CH2F2).

For more information onDuPont Zyron electronic

gases, please visit www.dupont.com/zyron/ or call 800-969-4758.

IC InterconnectAdds New Back-End Capabilities

COLORADO SPRINGS, CO IC Interconnect (ICI), a waferbumping service company, an-nounces its wafer test, lasermarking, die singulation, andtape and reel capabilities avail-able as standard service offer-ings. These back-end servicesround out IC Interconnectsability to offer a full turn-keysolution as an integral part ofthe wafer bumping process. Theequipment set gives ICI installedcapacity to process approxi-

mately 2 million bumped dieper week, making it an idealarrangement for small to moder-ate volume processing of 100 to500 wafers/week.

Traditionally IC Intercon-nect has limited itself to thebumping niche. That meantafter ICI bumped the wafersthey were subsequently routedto other subcontractors for vari-

ous additional operations. Thiscreated a significant challengefor our customers in terms oflogistics, shipping costs, timedelays and subcontractor quali-

fication and management,explains Tony Gaines, ICIsregional sales manager. Nowall of these capabilities are inthe same location and managedwith the same ISO/TS qualitysystem as our bumping opera-tion saving time, cost andworry for our customers.

IC Interconnects addition-al services can help custom-ers achieve these goals. A newautomated optical inspection(AOI) system enables ICI toinspect wafers for bump height,yield and circuit defects as anindependent service or as anintegrated part of a customizedprocess flow. Combining thisdata with an electronic wafermap allows for full wafer char-acterization.

More information is avail-able at www.icinterconnect.com.



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20/40

New Web-basedBGA Test Socket

SoftwareSelection Toolfrom K&SWILLOW GROVE, PA Ku-licke & Soffa Industries, Inc.(K&S) has introduced theEasySocketssm software tool tomeet todays increasing needfor faster pricing and deliveryfor many types of BGA testsockets. This new software pro-gram streamlines the quotationprocess by enabling customersto enter their application criteriaand submit a design drawingthrough the K&S public web-site, or at www.kns.com/easys-ockets .

Oded Lendner, K&S seniorvice president, Package TestBusiness Unit, states, Many ofour customers want to reducetheir time-to-market. WithEasySockets, they can receivea detailed footprint diagramimmediately, and a quotation

with accurate delivery dateswithin 24 hours. He furtherexplains, K&S views Easy-Sockets as another value-addedbenefit for our worldwide pack-age test customers.

The EasySockets productswill be available with expeditedlead times and at a discountedprice. They are manufacturedto provide the same high-per-formance and quality that cus-tomers expect from other K&Sproducts.

Kulicke & Soffa launchedEasySockets at SEMICONWest 2005.

For more information aboutEasySockets or to try this newsoftware program, visit www.

kns.com or contact Mark Sul-livan at msullivan@kns,com.

Dyncraft LicensesSamsungsPatented Nickel-Palladium-GoldPlating TechnologyPENANG, MALAYSIA Dyn-acraft Industries, one of the larg-est manufacturers of leadframesfor the semiconductor industry,announced that they recentlysigned a patent license and tech-nology transfer agreement withSamsung Techwin for the MicroPPF (Pre-Plated Frame) tech-nology. The technology givesDynacraft the ability to providecustomers with Nickel-Palladi-um-Gold alloy (NiPdAu-alloy)pre-plated leadframes wherethe Pd plating thickness is only0.1 micro-inch minimum rath-er than the more conventional0.8 micro-inches minimum. Italso provides a substantiallyimproved process capabilityand consistency that producesa superior level of quality andproduct reliability.

The agreement will allowDynacraft the use of relatedpatents, application and techni-cal know-how, and associatedplating equipment to manufac-ture leadframe products utiliz-ing the Samsung Micro PPF(-PPF) technology. Techni-

cal teams from both compa-nies will transfer and install thetechnology and capability into

the Dynacraft facility, located inPenang, Malaysia, by the end of2005.

Visit www.dynacraft.com orwww.samsungtechwin.com for

more information.

Kyocera AddsSubcontract

Plating ServicesSAN DIEGO, CA KyoceraAmerica, Inc. has announcedthat it will provide subcontractplating services for a variety ofmicroelectronic applications.

High quality plating is criti-cal to the functionality of micro-electronic parts, especially thoseused in high reliability appli-cations. Electrolytic and elec-troless gold, boron and phos-phorous nickel, palladium, andcopper are among the differenttypes of metals available forplating. Kyoceras subcontractservices include both a highlyflexible plating line for special-ized processes, as well as anautomated line for high-volumeapplications.

With more than 30 years

of experience handling complexplating operations, KyoceraAmerica, Inc. offers technicalsupport, quick turnaround andpersonalized service for all ap-plications and requirements.Kyoceras expertise in platingalso includes full lab and func-tional test capabilities to meetboth military and commercialspecifications.

Innovative RFIDSmart LabelTechnology for

the ConvertingIndustryMuehlbauer, a worldwide pro-vider of technologically innova-tive solutions for the productionand assembly of RFID SmartLabels since 1995, announcesthe new Tag Module Assemblysystem (TMA), as a new in-lineequipment solution for the con-verting industry. Many years ofexperience, in combination withthe close cooperation with cus-tomers and partners, have led toexemplary concepts in machin-ery and technology. The manymachines in use prove Muehl-bauers exceptional quality andreliability under the hardest ofconditions.

RFID technology is fre-quently applied worldwidethrough the use of Smart Labelsin retail, supply chain and logis-tics management. Renownedmarket research institutes haveforecasted double-digit growth

rates for this technology in thecoming years. The market isready for the extensive growthof this innovative RFID SmartLabel technology.

The best Smart Label pro-duction technology has to bespecified, starting with the defi-nition of an application. Mue-hlbauer is in the position toprovide all necessary systems




21/40

for HF and UHF Smart Labelproduction and the correspond-ing test.

Information about Muehl-bauer is available on the Internet

at www.muehlbauer.de

June IPI Highest onRecord Robust2006 in Sight

PHOENIX, AZ Data goingback to 1984 shows SemicosInflection Point Indicator (IPI)registered a historical 16.5 inJune, the highest IPI on record.Augusts IPI represents an im-

provement of 6.7% from theMay IPI. It also marked thesecond consecutive month theIPI increased, up from 14.9 inApril and 15.5 in May.

Since Semicos IPI is de-signed to forecast the market 8to 9 months in advance, the cur-rent IPI points to the February-March 2006 timeframe. Withthis nearly unprecedented jumpin the IPI pointing to the 1Q06, itraises our optimism immensely

if such strength in the IPI con-tinues for another month or two,it will make a persuasive casefor a much more robust 2006.

Current expectations are fora moderate upswing in 2006. Ifthe trend continues, an upwardrevision to the 2006 forecastwould be warranted, most likelywith growth reaching into theupper teens. In turn, a strong2006 start would accelerate newplant and equipment expan-sion by 6 months, from 2007 to2H06.

In that scenario, the marketwould ramp in 2007, continuinginto 1H08. With the upturn occur-ring approximately 6 monthssooner, the downturn which

is currently forecast for 2009 would also occur 6 monthsearlier in 2H08.

One caveat is that the threemonth rolling average forsemiconductor sales is down aslight 0.5%, from $18.1 billionto $18.0 billion, triggering thepossibility that sales could flat-ten out for the remainder of theyear.

Semico will continue toclosely monitor the IPI for in-dications the next inflectionpoint has hastened. Along withtheir quarterly forecast, the nextIPI update was scheduled to bepresented at Semicos Semicon-ductor Outlook Annual Forecastconference on September 15th.

Semico Research developedthe Inflection Point Indicator toassist in forecasting semicon-ductor revenues approximatelytwo quarters in advance. IPI

combined with their bill-of-materials, end-market analysisand primary research has help-ed Semico Research accuratelyforecast the industry ahead of allthe other prognosticators.

Semico is a marketing andconsulting research companylocated in Phoenix. Founded in1994 by a group of semiconduc-tor industry experts, they haveimproved the validity of semi-conductor product forecasts viatechnology roadmaps in end-usemarkets. For more informationvisit www.semico.com.



22/40

SAN JOSE, CA North American-based manufacturers of semiconductorequipment posted $1.12 billion in ordersin August 2005 (three-month averagebasis) and a book-to-bill ratio of 1.05according to the August 2005 Book-to-Bill Report published by SEMI. A book-to-bill of 1.05 means that $105 worth oforders were received for every $100 ofproduct billed for the month.

The three-month average of world-wide bookings in August 2005 was$1.12 billion. The bookings figure isabout 11% above the revised July 2005level of $1.01 billion and 26% below the$1.51 billion in orders posted in August

2004.The three-month average of world-

wide billings in August 2005 was $1.07billion. The billings figure is one percentbelow the revised July 2005 level of$1.08 billion and 29% below the August2004 billings level of $1.50 billion.

The book-to-bill ratio is above par-ity for the first time in a year driven inlarge part by orders for test and assem-bly equipment, said Stanley T. Myers,president and CEO of SEMI. While thewafer processing equipment segment hasyet to see the same growth levels as thefinal manufacturing segment, our indus-try views the overall trend as a positiveindicator.

The SEMI book-to-bill is a ratio ofthree-month moving average bookings tothree-month moving average shipments.

Shipments and bookings figures are inmillions of U.S. dollars.


North American Semiconductor Equipment IndustryPosts August 2005 Book-To-Bill Ratio of 1.05

Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug05

$1065.9

12 Months Ending August 20052000

1500

500

0

1000

Data compiled for SEMI by the independent financial services firm of David Powell, Inc.

.78.77 .81

.99 .94.78

.94 .96.84 .90

.931.05

Average Shipmentsin Millions of Dollars

Average Bookingsin Millions of Dollars

$1115.4

New Kulicke & SoffaCapillary IncreasesProduction Yields In

Demanding ApplicationsWILLOW GROVE, PA Kulicke &Soffa Industries, Inc. has developed a newcapillary called Arcusto increase yieldsand productivity in demanding packagingapplications. Specifically, this new capil-lary provides more accurate and reliablelooping in stacked die, quad-tier and othercomplex, tight tolerance devices. Com-pared to the looping performance of otherconventional capillaries, the new Arcussignificantly decreases defects in the wirebonding process, such as wire kinks, wiresag, wire sweep and wire leaning. Initial

data from customers shows that this capil-lary offers faster looping formations anda very stable process, with less scrap andoverall higher UPH.

Now in full production at two K&Smanufacturing facilities, the Arcus capil

lary is being shipped to contractors andIDMs around the world.

For more information on the Arcuscapillary visit www.kns.com/ARCUS orcontact Mark Sullivan at [email protected].


Book-to-BillRatio

Book-to-BillRatio


23/40www.meptec.org Q3 2005 / MEPTEC REPORT 23

MEPTEC @ SEMICON West

AllPhotoscourtesyofJodyMahaffey.


24/4024 MEPTEC Report/ Q3 2005 www.meptec.org

For over five decades the semicon-ductor industry has relied on leadedpackages as the primary solutionfor devices ranging in the 2 to 208-leadcount-market segments. Gen-

eral industry familiarity with the package andwidespread acceptance among end customerskept products such as clocks, buffers, gatearrays, and drivers for hand held applica-tions from migrating to the newer packagingtechnologies. In the last two years we haveseen a slow transition start to occur. Changesin end market size constraints, new packagetechnologies, and perhaps most importantlylower cost solutions are driving a migration toleadless packages.

QFP packages and its variations, theMQFP, TQFP, etc. have been a significantplayer in the leaded package market sincebeing introduced in the sixties. In todaysmarket where space is a premium and highfrequency is desired, the QFPs relatively largebody size and leads present significant draw-backs. In addition, the leads add complex-ity to the manufacturing and test process viaforming steps, inspection steps and handlingrequirements. This drives to the requirementto move to a leadless package.

Traditional leadless packages such as fpB-GAs and QFNs have been unable to gainwidespread acceptance as replacements forleaded packages due to cost, pin count orperformance drawbacks. In 2003, a newleadless package entered the market, the ThinArray Plastic Package. Currently offered bymore than one semiconductor company, theTAPPoffers a viable solution. The TAPP isa high-density package with superior electri-cal and thermal performance as compared to aQFP. As an illustration of the superior thermalperformance, figure 1 shows a thermal per-formance comparison between a 10x10 TAPPand a 10x10 QFP. The TAPPs performance isfar greater than the QFP. So when convertingfrom larger body QFPs to smaller TAPP theinherent thermal performance characteristicsof the TAPP allow for a smal

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