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Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output...

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Microprocessor System Design Input / Output Input / Output Peripheral Interfacing
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Page 1: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Microprocessor System DesignInput / OutputInput / Output

Peripheral Interfacing

Page 2: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Outline

• Peripheral devices– Input devices

– Output devices

• 8 bit / 16-bit IO

Si l I t d i i t f i it h• Simple Input device - interfacing switches

• Simple Output device - interfacing LEDs

8255 PPI• 8255 PPI

• 8255 modes

16 bit d t b t 8 bit i h l d i• 16-bit data bus to 8-bit peripherals or memory devices

Page 3: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Peripheral

• is an input and/or output device

• like a memory chip it is mapped to a certain• like a memory chip, it is mapped to a certain location (called the port address)

• unlike a memory chip, a peripheral is usually mapped to a single location

Page 4: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Output Device

• like a memory chip, you can write to an output device

• You can write to a memory chip using the command mov [bx], al

• You can write to an output device using the command out dx, al

Page 5: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Input Device

• like a memory chip, you can read from an input device

• You can read from a memory chip using the command mov al, [bx]

• You can read from an input device using the command in al, dx

Page 6: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Memory mapped vs. peripheral

• Same instruction vs. independent instruction

• Entire address bus vs part of address bus• Entire address bus vs. part of address bus

• Same control signals vs. independent

• More IO ports vs. 65536 ports

• More commands and operationsMore commands and operations

• Uses memory space

Page 7: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Two formats for IN / OUT

Format 1• IN AL, port#Or

Format 2• MOV DX,port#

IN AL, DXOr• OUT port#, AL• Example:

BACK: IN AL 22H

Or• MOV DX, port#

OUT DX, AL– BACK: IN AL,22HCMP AL, 100JNZ BACK

,

Page 8: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

8bit vs 16bit IO

• 8088 case:• MOV DX, 648H

OUT DX, AX ;AX = 76A9H

• 8086 case:• MOV DX, 648H

OUT DX, AX ;AX = 76A9H

• Address bus and ALE• Low byte (A9) IOW

• Address bus and ALE• Word (76A9) IOW• Low byte (A9), IOW

• Setup time• Address (649) and ALE

Hi h b ( 6) IOW

• Word (76A9), IOW• Setup time

• High byte (76), IOW• Setup time

Page 9: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Creating a Simple Output DeviceOutput Device

• Use 8-LED’s

Page 10: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Use 8 LED’s

A19A18

A0:

A19

D7D6D5D4D3

:mov al, 55

8088Minimum

Mode

D3D2D1D0

out dx, al:Mode

IORIOW

:::

Page 11: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Creating a Simple Output DeviceOutput Device

• Use 8-LED’s• Use a chip and an address decoder such that

the LED’s will respond only to the commandthe LED s will respond only to the command out and a specific address (let’s assume that the address is F000)

Page 12: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Use of 74LS245 and Address Decoder

A19A18

A0:

A19

B0A0D7D6D5D4D3

B0B1B2B3B4

A0A1A2A3A4

8088Minimum

Mode

D3D2D1D0

74LS245 B4B5B6B7

A4A5A6A7

:

Mode

IORIOW

E DIR 5V

mov al, 55mov dx, F000out dx, al,

:A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOW

Page 13: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Creating a Simple Output DeviceOutput Device

• Use 8-LED’s• Loses the data• Solution?• Use a chip and an address decoder such that

the LED’s will not only respond to thethe LED s will not only respond to the command out and a specific address (let’s assume that the address is F000) but will also latch the datalatch the data

Page 14: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Use of 74LS373 and Address Decoder

A19A18

A0:

A19

D7D6D5D4D3

Q0Q1Q2Q3Q4

D0D1D2D3D4

8088Minimum

Mode

D3D2D1D0

74LS373Q4Q5Q6Q7

D4D5D6D7

:

Mode

IORIOW

OELE

:mov al, 55mov dx, F000

t d lout dx, al:

A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOW

Page 15: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Creating a Simple Input DeviceInput Device

• Use 8-Switches (keys)• Use a chip and an address decoder such that

the keys will be read only to the command inthe keys will be read only to the command inand a specific address (let’s assume that the address is F000)

• How to interface a switch to computer?

Page 16: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Use of 74LS245 and Address Decoder

A19 5VA18

A0:

A19 5V

D7D6D5D4D3

B0B1B2B3B4

A0A1A2A3A4

8088Minimum

Mode

D3D2D1D0

74LS245 B4B5B6B7

A4A5A6A7

:

Mode

IORIOW

E DIR

mov dx, F000in al, dx

:A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOR

Same address for input and output?

Page 17: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

How do you know if a user has pressed a button?pressed a button?

• By Polling• By Interrupt

Page 18: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Polling

A19 5VA18

A0:

A19 5V

D7D6D5D4D3

B0B1B2B3B4

A0A1A2A3A4

8088Minimum

Mode

D3D2D1D0

74LS245 B4B5B6B7

A4A5A6A7

mov dx, F000

Mode

IORIOW

E DIR

in al, dxL1: cmp al, FF

je L1::

A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOR

Page 19: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Output Port Design

T1 – T4 of OUT 99H, AL ?

Page 20: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Input Port Design

T1 – T4 of IN AL, 5FH ?

Page 21: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

8255 PPI

Page 22: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Control word

Page 23: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Modes of Operation

• Mode 0 – simple input or output

• Mode 1 – input or output with handshaking

• Mode 2 – bideirectional IO with handshakingg

Page 24: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Example - Port addresses

Page 25: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Solution

Page 26: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Example – Programming 8255

Page 27: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Solution

Page 28: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

BSR mode

Page 29: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Example for BSR

• Program 8255 for the following– A) set PC2 to high– B) Use PC6 to generate a square wave of 66% duty cycle

S l ti• Solution• A)

– MOV AL, 00000101BOUT 93H,AL,

• B)– MOV AL, 0xxx1101

OUT 93H, ALCALL DelayyCALL DelayMOV AL, 0xxx1100OUT 93H, ALCALL DelayJMP AGAIN

Page 30: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

MODE 1 Output Operation

Page 31: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Output with handshake

• #OBFa :– CPU has written a byte

• #ACKa:• #ACKa:– Data has been picked up by receiving device

• INTRa:– After rising edge of #ACKa

• INTEa (interrupt enable)– Internal flipflopInternal flipflop– Controlled by PC6

Page 32: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

MODE 1 Timing (output)

Page 33: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interrupt vs. Polling

• CPU is interrupted whenever necessary

• CPU can serve many devices

• Require more hardware

Page 34: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Using status to Poll

Page 35: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Solution

Page 36: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

MODE 1 Input Operation

Page 37: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Input with handshake

• #STB (in):– Device provides data to an input port

• IBF (out):• IBF (out):– Data has been latched by 8255

• INTR (out):– After activation of IBF

• INTE (interrupt enable)– Internal flip-flopInternal flip flop– Controlled by PC4 and PC2

Page 38: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

MODE 1 Timing (input)

Page 39: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

MODE 2 Operation

Page 40: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

IBM PC IO MAP

Page 41: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Decoding by 74138

Page 42: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

8255 Address in PC

Page 43: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Use of 8255 ports in PC

MOV AL,99HOUT 63 ALOUT 63, AL

Page 44: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

80x86 family

• 16-bit Processors– 8088 (8-bit data / 20-bit address)– 8086/186 (16-bit data / 20-bit address)– 80286 (16-bit data / 24-bit address)

• 32-bit Processors– 80386 (16/24 or 32/32 common)

80486 (32/32) P ti PII (64/32)– 80486 (32/32), Pentium, PII (64/32)– Pentium Pro, II, III, IV (64/36)– PPC 60x (32 or 64/32)

• All 80x86 processors use a 16-bit address for i/o

Page 45: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

8 And 16 bit Organizations

• 8088– Data is organized into byte widths

– The 1MB memory is organized as 1M x 8-bits

• 8086/80186Data is organized into word widths– Data is organized into word widths

– The 1MB memory is organized as 512kB x 16-bits

• 80286/80386SX– Data is organized into word widths

– The 16MB memory is organized as 8MB x 16-bits

Page 46: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

32 and 64 bit Organizations

• • 80386DX/80486

– – Data is organized into double word widths

– – The 4GB memory is organized as 1GB x 32-bits

• • Pentium Pro/Pentium 1-4

– – Data is organized into quad word widths

– – The 4GB memory is organized as 512MB x64-bits

• (on P2-4, actual address bus is 36 bits)

Page 47: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Little Endian / Big Endianfor the 68000:

MOVE.W #513, D0 ; move value 513 into the lower 16 bits of D0MOVE.W D0,4 ; store the lower word of D0 into memory 4

for the 80x86:MOV AX,513 ; load AX (16 bits), with the value 513MOV [4],AX ; store AX into memory 4

Page 48: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Memory Alignment in 16-bit Micro

• We have 16-bit data bus• Why not use it for memory

access.• 1M byte of memory is organized

as:• 512K * 16 bit• The memory is word-aligned • Access to even addresses is

aligned and simplea g ed a d s p e• Example: 0102H and 0304H

stored in [4H]What happens on mov AX,[4]?

What happens on mov AX,[5]?

Motorola family of the MC680x0 forbids non-aligned access

Page 49: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Memory Bank Select

• 8086/186/286/386SX has 16 Data Lines D15-D0• 6264 Only has 8 I/O7 – I/O0• Must Use a “Memory Bank”

– 1 SRAM for Storing Bytes with “Even Addresses” (… 0 2 )– 1 SRAM for Storing Bytes with “Odd” Addresses” (… 1 3 )

• 8086 has BHE Control Signal – (Bank High Enable)C U C bi ti f A0 d BHE t D t i• Can Use Combination of A0 and BHE to Determine Type of Access

– BHE A0 Access Type– 0 0 1 word (16-bits)( )– 0 1 Odd Byte (D15-D8)– 1 0 Even Byte (D7-D0)– 1 1 No Access

Page 50: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interfacing two 512KB Memory to the 8088 Microprocessor (review)

A18

A0:CX

BXAX

000000233F1C

FCA1DX

A19

7FFFD7FFFE7FFFF

192536

::

A18

A0:

D7

D0:

MEMRESDSSS

XXXX2000XXXX

CS XXXX

:20020200212002220023

29127D13

:

D7

D0:

RDMEMW

BPXXXXXXXX

SP2300000

00001 95WRCS

XXXXSI

XXXXIP

XXXXDI

20023

7FFFD7FFFE7FFFF

33

2C9812

::

A18

A0:

:200202002120022

A39245

:

D7

D0:

RD

970000000001 D4WR

CS

Page 51: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interfacing two 512KB Memory to the 8086 MicroprocessorHow to connect data lines?

How to connect address lines?What about chip select?

A19

A1:CX

BXAX

000000233F1C

FCA1DX

A0

7FFFD7FFFE7FFFF

192536

::

A18

A0:

D7

D0:

MEMRESDSSS

XXXX4000XXXX

CS XXXX

:20020200212002220023

29127D13

:

D7

D0:

RD1C

MEMWBP

XXXXXXXX

SP2300000

00001 95WRCS

XXXXSI

XXXXIP

XXXXDI

20023

7FFFD7FFFE7FFFF

33

2C9812

::

A18

A0:

D15 D7

:200202002120022

A39245

:RD

D15

D8:

D7

D0:

MOV [0040], AL?MOV [0041], AH?

3F

970000000001 D4WR

CSBHE#

MOV [0041], AH?MOV [0040], AX?

Page 52: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Decoding Circuit with Bank SelectSelect

Page 53: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interfacing 8-bit Peripherals to 16-bit Data Bus16 bit Data Bus

• The Problem?• Solutions:

1) t t PPI d i– 1) two separate PPI devices.Even address for one and odd addresses for otherOUT port#, AX outputs to both of th !!!them!!!

Page 54: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interfacing 8-bit Peripherals to 16-bit Data Bus (2)16 bit Data Bus (2)

• Solutions:– 2) Hi / Lo byte copier.

– Outputting to odd-addressed ports:

» Hi/Lo byte copier copies data from D8-D15 to D0-D7

– Inputting a byte form odd-addressed ports:

» Hi/Lo byte copier copies data from D0-D7 to D8-D15» Hi/Lo byte copier copies data from D0-D7 to D8-D15

– The logic now resides in chipsets.

Page 55: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Hi/Lo Copier in PC

Page 56: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

ISA Bus expansion slot

• Only 16-bit (even 32-bit or higher data bus)

• Speed is limited to 8MHz

Page 57: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Linear Select Address DecodingDecoding

What is the address range and aliases?

Page 58: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Buffering Selected IO Address RangeRange

Range of addresses?Blocking others.

Page 59: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

PC Interface Card

• From BitPardaz

Page 60: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

I/O Programming with C and BASICBASIC

Assembly Microsoft C Borland C BASIC

OUT port#, AL

outp (port#, byte)

ouportb(port#, byte)

Out port#, byte

IN AL, port# var=inp(port var=inportb( Var = INPIN AL, port# var inp(port#)

var inportb(port#)

Var INP (port#)

OUT DX, AX Outpw(port#, word)

Outport(port# word)

Out port#, word ??word) #, word) word ??

IN AX, DX word=inpw(port#)

word=inport(port#)

Var = INP (port#)??

Page 61: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Example

Page 62: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Example Polling program?

• The program makes a “running LED” effect (initially moving from down to up). Every time the lowest button is pressed, it changes thethe lowest button is pressed, it changes the direction of the movement. When the highest button is pressed, the program terminates.

Page 63: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

The CircuitA18

A0:

A19 5V

D7D6D5D4

B0B1B2B3

A0A1A2A3

8088Minimum

Mode

D3D2D1D0

74LS245 B4B5B6B7

A4A5A6A7

Mode

IORIOW

E DIRQ0Q1Q2Q3

D0D1D2D3

74LS373Q3Q4Q5Q6Q7

D3D4D5D6D7

A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOR

OELE

A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0IOW

Page 64: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Trace what the program does:

mov dx, F000 L4: mov bl, al,mov ah, 00mov al, 01

L1: out dx, almov cx FFFF

,in al, dxcmp al, FFje L6test al 01mov cx, FFFF

L2: dec cxjnz L2cmp ah, 00jne L3

test al, 01jnz L5xor ah, FFjmp L6

L5: test al 80jne L3rol al, 1cmp al, 01jne L1

L5: test al, 80jz L7

L6: mov al, bljmp L1

jmp L4L3: ror al, 1

cmp al, 80jne L1

L7:

Page 65: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

What’s the problem with polling in the sample program?in the sample program?

• Running LED takes time

• User might remove his/her finger from the g gswitch

• before the in al, dx instruction is executed,• the microprocessor will not know that the

user has pressed the buttonp

Page 66: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Problem with Polling

mov dx, F000 L4: mov bl, al,mov ah, 00mov al, 01

L1:out dx, almov cx FFFF

,in al, dxcmp al, FFje L6test al 01mov cx, FFFF

L2:dec cxjnz L2cmp ah, 00jne L3

test al, 01jnz L5xor ah, FFjmp L6

L5: test al 80jne L3rol al, 1cmp al, 01jne L1

L5: test al, 80jz L7

L6: mov al, bljmp L1

jmp L4L3:ror al, 1

cmp al, 80jne L1

L7:

Page 67: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Interrupt

• The microprocessor does not check if data is available.

• The peripheral will interrupt the processor• The peripheral will interrupt the processor when data is available

Page 68: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Polling vs. Interruptinstruction

While studying, I’ll check the bucket every 5 minutes to see if it is

Input Device

Memory

already full so that I can transfer the content of

the bucket to the drum.

P

POLLING

Page 69: Microprocessor System Design Input / OutputInput / … System Design Input / OutputInput / Output Peripheral Interfacing. Outline

Polling vs. Interruptinstruction

I’ll just study. When the speaker starts playing

music it means that the

Input Device

Memory

bucket is full. I can then transfer the

content of the bucket to the drum.

Interrupt

P

Interruptrequest

INTERRUPT


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