Date post: | 13-Jan-2017 |
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Testing of MIPI High Speed PHY
Standard Implementations Challenges and Solutions
Joel Birch Keysight Technologies
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
2 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Testing benefits • For Implementers
• Reduce Time-To-Market • Reduce / Avoid Field Returns • Reduce Warranty Cost • ! Improve Customer Experience
• For Standard Bodies • Reduce or avoid interoperability problems • Identify / resolve issues in the standard • Clarify where the standard is not precise • ! Testing increases industry acceptance • ! Testing makes new standards successful
3 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Test & Measurement Applications
• Electrical Layer • TX & RX Conformance • Impedance & S-
Parameters • BringUp & Debug
• Protocol & Application Layer • Protocol Conformance • BringUp & Debug • Device Emulation • Performance Validation • Interoperability
Testing of MIPI PHY Standard Implementations - Keysight Technologies 4
MIPI Product Registry • Ensure higher quality products and components in
industry
5 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Spec
CTS
MOI
ApprovedTestLabsorContributorSelfTest
ProductRegistry
MIPIAllianceTestWG
Chipset,Components,Products
MIPIAllianceWG
Keysight
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
6 Testing of MIPI PHY Standard Implementations - Keysight Technologies
MIPI’s Layered Approach for Application Standards
Testing of MIPI PHY Standard Implementations - Keysight Technologies 7
MIPIRXTesEng–Today&Tomorrow
MIPI’s Layered Approach for Application Standards
Testing of MIPI PHY Standard Implementations - Keysight Technologies 8
C-andD-PHYaddressingthesametwoapplicaEons,i.e.CameraandDisplay
MIPI’s Layered Approach for Application Standards
Testing of MIPI PHY Standard Implementations - Keysight Technologies 9
M-PHYaddressingalargevarietyofapplicaEons,parEallywithUniProintermediateLayer
MIPI M-PHY Link Example
10
MIPI M-PHY options • High and low voltage swing operation can be commonly selected for both modes • Terminated (100 Ohm) or not terminated operation (for power saving purposes) can
individually be selected per mode
Designated Successor of D-PHY, for Highest Aggregate BW
MIPIM-PHY• LanesareunidirecEonal• Signaling:differenEal• 8B/10Bcoded• Transmissionmayappearin
burst• Highspeed(HS)and(lower
speed)lowpower(LP)modeavailable
• Dataformat:NRZ/PWM(HS/LP)
• Embeddedclock• HSClockRecovery(CR):PLL
type,needssynch.atbeginningofeveryburst
• LP-CR:PWMdataformat,selfclocking
Testing of MIPI PHY Standard Implementations - Keysight Technologies
MIPI M-PHY Data Rates and Module Types
• High speed gears / data rates valid for both module types • Type II module only used for Dig_RF_v4
11
HighSpeedMod
es
LowPow
erM
odes
NT=NotterminatedRT=ResisEvelyterminated
fref=19.2,26,38.4or52MHz
Testing of MIPI PHY Standard Implementations - Keysight Technologies
RX State Machine (Type-I module ) All mode transitions initiated by TX with • differential in-
band signaling • same amplitude
as during data transmission
All in all, better suited for classical BERT-type test equipment.
Testing of MIPI PHY Standard Implementations - Keysight Technologies 12
MIPI D-PHY Universal Lane Module Functions • Lane consisting of 2 wires, Dp and Dn • TXs and RXs: Bidirectional • Contention detection (LP only) • Two set‘s of TXs / RXs (HS & LP) • LP-mode:
• Large amplitude (~ 1V), unterminated • Data format: “RZ“ • Signaling: non-differential
• HS-mode: • Small amplitude (~ 200mV,pp) • Termination: 100 Ω (optional) • Data format: NRZ • Signaling: differential
13 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Dp
Dn
MIPI C-PHY Universal Lane Module Functions
• Lane consisting of 3 wires, A, B, C • TXs and RXs: Bidirectional • Contention detection (LP only) • Two set‘s of TXs / RXs (HS & LP) • LP-mode:
• Large amplitude (~ 1V), unterminated • Data format: “RZ“ • Signaling: non-differential
• HS-mode: • Small amplitude (~ 200mV,pp) • Termination 50 Ω - “star-type“ (encircled) • Data format: 3-phase / 3-level • Signaling: 3 single ended wires
forming a HS-lane, • Encoding:16 bits to 7 symbols with 5 values
(0,1,2,3,4) => coding gain 2.28
14 Testing of MIPI PHY Standard Implementations - Keysight Technologies
MIPI D-PHY Two Data Lane PHY Configuration
• Data-rate completely agile, no discrete operating frequencies, continous range • Source synchronous forwarded double data rate clocking • RX testing is basically stressing set-up- and hold- time conditions
(eye closure mainly due to DDJ and skew between data and clock)
15 Testing of MIPI PHY Standard Implementations - Keysight Technologies
D-PHYSlaveClockLaneModule
D-PHYSlaveDataLaneModule
D-PHYSlaveDataLaneModule
D-PHYMasterClockLaneModule
D-PHYMasterDataLaneModule
D-PHYMasterDataLaneModule
MIPI C-PHY Three Data Lane PHY Configuration
• Data-rate completely agile, no discrete operating frequencies, continous range • Embedded / encoded clocking • RX testing is basically stressed eye testing
(eye closure mainly due to ISI and DCD caused by A,B,C skew and Tr, Tf differences )
16 Testing of MIPI PHY Standard Implementations - Keysight Technologies
C-PHYSlaveDataLaneModule
C-PHYSlaveDataLaneModule
C-PHYSlaveDataLaneModule
C-PHYMasterDataLaneModule
C-PHYMasterDataLaneModule
C-PHYMasterDataLaneModule
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
17 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Huge List of Tests • Managing large number of tests
• Flexibility to address different data rates, termination types, etc. • Selection of many or few tests • Potentially multiple test setup configurations • Multiple test pattern requirements • Efficient reporting of test results • Integration with other test system software (eg. DUT control)
18 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Huge List of Tests: Solutions
Testing of MIPI PHY Standard Implementations - Keysight Technologies 19
Configure the Device Under Test
Select Tests.
Automatically generate test report.
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
20 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Multi Lane Testing • Problem Statement
• I just tested lane 0 of my 4 lane device. 3 lanes to go " • Testing PHY parameters can take a quite amount of time • Would like to test all lanes automatically over night without
reconnecting the DUT • Test Equipment channels are expensive • Test Equipment may not provide enough channels to test multiple
lanes. • When using a switch matrix, signal integrity is affected
21 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Multi Lane Testing: Solutions
Testing of MIPI PHY Standard Implementations - Keysight Technologies 22
• Limited oscilloscope channels prevent full automated testing of multilane MIPI interface
• Overcome with switch matrix, which automates lane switching and test
• Switch matrix calibration to remove loss and skew
InfiniiumDSAV254A25GHzOscilloscope
2x6(1x6differenEal)SwitchMatrixKeysightU3020AS26
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
23 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Traditional Termination and Probing
Page 24
HS/LSmode(RT–100ohmdifferenEallyterminated) HS/LPMode(NT–Unterminated/Open)
ProbingOp7on1:Differen7alProbes+DynamicTermina7on
50Ω
50Ω
100Ω
50Ω
50Ω
Scope
Fixture
DynamicTerminaEon
Chip
Single-endedprobingwithdifferenEalprobe(recommended)
ProbingOp7on2:Differen7alProbes+OpenTermina7on
Scope
Fixture
OpenTerminaEon
Adda100-ohmresistorforterminatedmode(RT)orremoveforun-terminatedmode(NT).
Chip
TX RXTX RX
Issue of traditional probing method
Testing of MIPI PHY Standard Implementations - Keysight Technologies 25
WhenacEveprobesareused,ahenuaEonraEoofprobemustbeconsideredEvenalowahenuaEonraEoprobe(eg.3:1)willclosetheeyeduetoaddednoise
Source:5GbpsPRBS9signal
DirectconnecEonwithSMAcable Keysight1169AdifferenEalprobe23%
smaller
Scope
Terminating M-PHY signal into a Voltage
MIPI PHY Test Solutions 26
With DC termination, the V1 and V2 have the same value as the differential termination. In addition, the DC termination blocks transmitter DC current from draining to maintain the signal integrity performance.
V1
V2
V1=(1V-0.5V)*(50/100)+0.5V=0.75VV2=(0V-0.5V)*(50/100)+0.5V=0.25V
VDIFF=V1–V2=0.5VVCM=(V1+V2)/2=0.5V
50-ohm
50-ohm
1V
0V
VTERM
VTERM
50-ohm
50-ohm
VTERM=VCMDIFF
ThisconfiguraEonisthesameasprobingonadifferenEalterminaEon
Terminating M-PHY signal into a Voltage
Testing of MIPI PHY Standard Implementations - Keysight Technologies 27
WithvoltageterminaEonmethod,moremarginisavailablethatwithacEveprobes,andwithoutcurrentconsumpEonissueonDUT.
Source:5GbpsPRBS9signal
DirectconnecEonwithSMAcable KeysightN7010AAcEveterminaEonprobe6.3%smaller
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
28 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Custom Test Board
TP
ISIConformanceChannel
BERTPahernGeneratorw/TTCs
BreakoutTrace
ASIC RX DUT
TX
RefClk
InternalLoo
pback
orErrorcou
nter
ReplicaTrace
Setup for M-PHY RX Test and Calibration
Test board with Replica Traces • creating test point (TP) for calibration • equivalent to the ASIC-input pins
Stress Signal Generation and Calibration according to CTS for Gear1 to Gear3
100OhmDifferenEal
Probe
RT-Oscilloscope
Cal-p
lane
Custom Test Board
TP
ISIConformanceChannel
BERTPahernGeneratorw/TTCs
BreakoutTrace
ASIC RX DUT
TX
RefClk
InternalLoo
pback
orErrorcou
nter
ReplicaTrace
Setup for M-PHY RX Test and Calibration Stress Signal Generation and Calibration for Gear 4
Test board with Replica Traces – creating test point (TP) for calibration – equivalent to the ASIC-input pins
EQ
smallEW/EH
largerEW/EH
Cal-p
lane
(1)
(2)
(3)
Typical Rx Setup
Simplifiedset-upwithKeysightJ-BERTM8020AISIconformancechannelintegrated
J-BERT M8020A
N7010A
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Receiver Testing: Enabling and Result detection
• Summary
32 Testing of MIPI PHY Standard Implementations - Keysight Technologies
How to test a receiver?
33
Receiver Front-End 8b/ 10b
de-coder
Mode- Control & Protocol Interface
Logic
recovered and
encoded bits
de-coded input
data & ctrl Protocol
Interface in normal operation
LINE Interface
FF
CR
EQ
Stress Pattern
Data Input =
Received Data ?
M-PHY Receiver Example
• SignalGeneraEon• Testmodesetup• ResultdetecEon
MIPI PHY Test Support Overview Phy Protocol Version TestMode Enable Errordetec7on
C-PHY >=1.0 sideband
D-PHY >=2.0 In-band
M-PHY DigRFv4 >=1.0 In-band
LLI >=1.0 In-band
UniPro >=1.4 In-band
34 Testing of MIPI PHY Standard Implementations - Keysight Technologies
RX
TX
ErrCtr
RX
TX
ErrCtr
RX
TX
Receiver Testing Challenges • Challenges with different protocols:
• Asymmetrical lane configuration (e.g. 2x HS upstream / 1x LS downstream)
• Specific method defined in protocol spec, not in PHY spec • Latest versions of D-PHY and C-PHY define test mode • Test mode mandatory for UniPro but not for LLI, D-PHY and C-PHY
• Various error detection methods: • Line Loopback (i.e. bit level loopback) • Logic Loopback (i.e. protocol layer loopback) • PPI / RMMI (Protocol Interface needs to be accessible) • IBER (=Internal Bit Error Ratio Counter)
• Not all MIPI applications have settled on preferred test option
• Not possible to provide turnkey solution, RX testing always has a custom portion
35
MIPI M-PHY UniPro Rx Test – see demo Task Keysight
M8020ABi7fEyeDSGA
DUT
EnableTestMode PWMorHS
PWM TestMode
ConfigureDUTRxandTx
PWMorHS
PWM RxandTxconfigured
TestExecuEon• SendCJTPAT• SendCounter
ReadRequest
PWMorHS
ReceiveTestPahernandCounterRequest
InterpretResult HS PWM SendCounterData
36 Testing of MIPI PHY Standard Implementations - Keysight Technologies
DUT
ErrCtr
RX
TX
KeysightM8020A BiEfEyeDSGAKeysightDSAV334A
MIPI M-PHY UniPro Tx Test – see demo Task Keysight
DSAV334AKeysightM8020A
Bi7fEyeDSGA
DUT
EnableTestMode
PWMorHS
PWM TestMode
ConfigureDUTTx
PWMorHS
PWM Txconfigured
StartTestExecuEon
PWMorHS
PWM ReceiveTestPahernandCounterRequest
MeasureTxParameters
PWMorHS SendCRPAT
37 Testing of MIPI PHY Standard Implementations - Keysight Technologies
DUT
ErrCtr
RX
TX
KeysightM8020A BiEfEyeDSGAKeysightDSAV334A
Agenda • Introduction
• Testing Overview and Relevance • MIPI PHY Overview
• Testing Challenges and Solutions • Huge List of Tests • Multi Lane Testing • Probing and Termination • Stimulus Signal Calibration for Receiver Test • Setting up the DUT so that Receiver Testing is enabled • Retrieving Receiver Test Result
• Summary
38 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Website Links and Literature • http://mipi.org/ • www.keysight.com/find/mipi • www.keysight.com/main/editorial.jspx?id=2548451 • Data sheet DSAV334A:
literature.cdn.keysight.com/litweb/pdf/5992-0425EN.pdf • Data sheet M8020A:
http://literature.cdn.keysight.com/litweb/pdf/5991-3647EN.pdf • Data sheet M8085A:
http://literature.cdn.keysight.com/litweb/pdf/5992-1106EN.pdf • Data sheet N5990A:
http://literature.cdn.keysight.com/litweb/pdf/5989-5483EN.pdf • http://www.keysight.com/en/pd-2438154-pn-U7238C/mipi-d-phy-
compliance-test-software?nid=-32976.1097107.00 • http://www.keysight.com/en/pd-2438147-pn-U7249C/mipi-m-phy-
compliance-test-software?nid=-32976.1097106.00
39 Testing of MIPI PHY Standard Implementations - Keysight Technologies
Keysight MIPI Total Solution Coverage
Testing of MIPI PHY Standard Implementations - Keysight Technologies 42
Transmitter Characterization
DSAV334A Infiniium 33 GHz scope
U7238C D-PHY, U7249C M-PHY, U7250A C-PHY
InfiniiMax Probes
Switch matrix N5465A InfiniiSim
N2809A PrecisionProbe
Receiver Characterization
M8020A JBERT
M8195A AWG
N5990A Automated characterization
Impedance/Return Loss Validation
E5071C ENA Option TDR
DCA 86100D Wideband sampling oscilloscope
N1055A TDR/TDT
54754A TDR/TDT
Industry’s highest analog bandwidth, lowest noise floor/sensitivity, jitter measurement floor with unique
cable/probe correction
Precision impedance measurements and
S-Parameter capability
Highest precision jitter lab source with automated compliance
software for accurate, efficient, and consistent measurement
Protocol Stimulus and Analysis
U4421A D-PHY CSI-2 / DSI Analyzer and Exerciser
U4431A M-PHY Analyzer (UFS, UniPro, CSI-3, SSIC, M-PCIe)
Scope Protocol Decoder N8802A CSI-2 / DSI N8807A DigRF v4 N8808A UniPro N8818A UFS N8809A LLI
N8819A SSIC N8820A CSI-3 N8824A RFFE
Fast upload and display, accurate capture, intuitive GUI and
customizable hardware. Correlate physical and protocol layer.