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Mitsubishi Vz9 Training Manual

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Projection Television Technical Training Circuit Descriptions Block Diagrams Models: VS-45609 VS-50609 VS-55609 VS-60609 VS-60719 VS-70709 T 2001 ECHNICAL RAINING MITSUBISHI ELECTRIC MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC. www.mitsubishi-tv.com VZ9 Chassis VZ9 Chassis
Transcript
Page 1: Mitsubishi Vz9 Training Manual

Projection TelevisionTechnical Training

♦ Circuit Descriptions♦ Block Diagrams

Models:VS-45609 • VS-50609 • VS-55609VS-60609 • VS-60719 • VS-70709

T 2001

ECHNICALRAINING

MITSUBISHI ELECTRICMITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.

www.mitsubishi-tv.com

VZ9Chassis

VZ9Chassis

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Copyright © 2001 Mitsubishi Digital Electronics America, Inc.All Rights Reserved

VZ9 Chassis Technical TrainingTable of Contents

Introduction ................................................................................................................................................. i

Chapter 1 -- Power Supply ...................................................................................................................... 1-1

Chapter 2 -- Video/Color Circuitry ......................................................................................................... 2-1

Chapter 3 -- Convergence Circuitry ...................................................................................................... 3-1

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Introduction

VZ9 Chassis Technical Training

VZ9 ChassisVS-45609VS-50609VS-55609VS-60609

VZ9+ ChassisVS-60719VS-70709

There are two versions of the VZ9 chassis, VZ9 and VZ9+.The models using each chassis type are listed above. Themain circuitry difference between the two chassis types is thatthe VZ9+ models incorporate System 4, for controlling HomeTheater setups.

The VZ9 chassis is similar in many respects to the VZ7 andVZ8 chassis. This manual will explain the major feature andcircuitry differences. For the areas that are relatively the same,refer to the VZ7 or VZ8 Training Manual.

One difference is illustrated in Figure 1. A different cableconnector is used to connect the PCB-SIGNAL to the PCB-CRTs. It is physically smaller than those previously used. Thisenables the cable wiring to be shielded, reducing chances ofradiation.

To insure proper connection the connectors have a lock. Press-ing and holding the tab indicated in Figure 1 releases the lockso the cable can be unplugged. DO NOT try an unplug thecables without releasing the lock, the leads may be pulled fromthe connector.

i

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VZ9 Chassis Technical Training

Figure 2 illustrates another difference in the VZ9chassis. There is no POP (picture outside of pic-ture) mode in the VZ9. Although different from otherchassis, single PIP insert, and multiple (strobe) in-serts are still available in the PIP function.

The Direction Buttons move a single insert any placeon the screen. The PIP Size Button selects the sizeof the insert. There are five insert sizes are possible,1/4, 1/6, 1/9, 1/12 or 1/16 the size of the main pic-ture.

There are two strobe (multiple insert) modes, 4 in-serts or 11 inserts. In either strobe mode, the TVscans through channels displaying an insert for each

ii

channel. Only the current channel insert is live, pre-vious channel inserts are still pictures.

In the 4 insert mode, the user can move the inserts tothe top, bottom, left side or right side of the screen.Figure 2 illustrates the 4 insert mode with the insertsat the top of the screen.

In the 11 insert mode the inserts are at the top andleft side of the screen, as shown in Figure 2. Theposition of the 11 inserts cannot be changed.

The Service Menu Codes have also changed for theVZ9 Chassis. Table 1 lists the Menu Codes for allrecent Mitsubishi Chassis.

VZ5 - VZ6 - V15 VZ7 - VZ8 - V16 V17 VZ9 - V18 - V19Option Menu 1-3-7-0 1-2-7-0 8-2-7-0 0-1-7-0Adjustment Mode 2-3-5-7 1-2-5-7 8-2-5-7 0-1-5-7Convergence Mode 2-3-5-9<6><5><4> 1-2-5-9<6><5><4> 8-2-5-9<6><5><4> 0-1-5-9<6><5><4>

CHASSIS

Table 1

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Chapter 1Power Supply

Last month’s Expander described the Video/Colorcircuitry changes in the VZ9 chassis. This month’sarticle covers changes in the VZ9 Power Supply andConvergence Circuitry. Although the circuits aresimilar to that in the VZ7 and VZ8 chassis, there aredifferences.

Power SupplyThe above illustration shows a Simplified Block Dia-gram of the VZ9 Power Supply circuitry. Two bridgerectifiers are used, D952 and D951. D952 is the

source for Standby Supplies, and D951 the sourcefor Switched Supplies. Although D951 is only usedwhen the set is switched On, it is connected directlyto the AC line and outputs approximately 170 voltsas long as the set is plugged in.

Transformer T952 provides isolation for the StandbySupplies. D952 generates a STBY 14V supply. TheSTBY 14V supplies three circuits:

1) A 9 Volt Regulator generating STBY 9V.2) A 5 Volt Regulator generating STBY 5V.3) Provides power for the ON/OFF circuitry.

VZ9 Chassis Technical Training

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The ON/OFF circuitry also receives Start Up volt-age from the half wave rectification at one of the ACinputs of D951. When the set is switched On, theON/OFF circuitry directs the Start Up voltage to aSwitch Mode Regulator, the source of all SwitchedSupplies.

T951 provides isolation for the Switched Suppliesgenerated at the secondary windings of the trans-former. Four Switched supplies are generated byrectifying the signals from the secondary windings:

• SW 4.5V• SW 12V• AUDIO 18V• SW 130V

Standby SuppliesFigure 1 illustrates the Standby Supply circuitry inmore detail. The Standby 9 Volt and 5 Volt Regula-tors are located on PCB-SIGNAL and are conven-tional Regulator ICs.

Switch Supplies RegulatorFigure 2 shows the Switched Supplies Regulator andthe ON/OFF circuitry. IC951 is a Switch Mode Regu-lator generating drive for T951 and the secondarywinding supplies. The operation of IC951 is basi-cally the same as Switch Mode Regulators used inprevious chassis, requiring:

1) 170 VDC at the Drain output, pin 3.2) 16 Volts at pin 4 to Start the internal oscilla-

tor.3) Feedback from a secondary supply for

regulation.

ON/OFF CircuitryAs stated earlier, the Start Up voltage source is fromone AC input of D951. The voltage is directedthrough R964 to the collector of Q9A79 and thecollector of the Photo Transistor in PC952. Whenthe set is switched On, the P-ON1 line from the Con-trol Circuitry goes High. The High drives Q980 intoconduction, lighting the LED in PC952. Light fromthe LED:

1) Turns the Photo Transistor On.2) Which turns ON Q9A79.3) Q9A79 supplies Start Up voltage to pin 4 of

IC951.

As in previous Switch Mode Regulators, the voltageat pin 4 drops when the oscillator starts. If it dropsbelow 11.5 volts the oscillator shuts down. To pre-vent shut down, D955 rectifies the signal from thesecondary winding at pin 3 of T951 and adds to theStart Up voltage at the Collector of Q9A79. Thesignal from pin 3 of T951 is also directed to the FBinput at pin 1 of IC951, stabilizing oscillation.

Regulation requires a sample from a secondary sup-ply compared to a reference, and any error fed backto the FB input of IC951. When the oscillator ini-tially starts, the SW 12V supply from D972 is di-rected to the emitter and base of Q972. The emitteris clamped to 6.3 volts by zener diode D976, whichserves as a reference. The voltage at the base ofQ972 determines how hard the transistor conducts.

The output of Q972 controls the LED in PC951,which control the internal Photo Transistor and the

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VZ9 Chassis Technical Training

amount of feedback to pin 1 of IC951. The amountof feedback determines the duty cycle of the drivingsignal from pin 3. The duty cycle is adjusted to cor-rect any error at the SW 12V supply. The 12V sup-ply is only monitored for regulation during the initialstart up of the oscillator.

There are two "On" commands in the VZ9 chassisP-ON1 and P-ON2. P-ON1 provides the initial StartUp voltage and starts the oscillator. P-ON2 is de-layed slightly and:

1) Closes ON/OFF Relay K903.2) Changes the supply monitored for regulation

from the SW 12V to the 130V supply.

During initial start up the P-ON2 line remains Low.The Low holds Q971 is Off and K903 is open, dis-abling the 130V and Audio supplies. The Low on

the P-ON2 line, through D978, also holds Q973 Off,allowing Q972 to conduct.

When P-ON2 goes High, Q971 conducts closingK903. This enables the AUDIO 18V and SW 130Vsupplies. The High on P-ON2 also reverse biasesD978, allowing the base of Q973 to go positive fromthe 130V supply. When Q973 conducts it turns Q972Off, removing the SW 12V supply as the monitoredsource.

The 130V supply becomes the monitored source. Itis compared to an internal reference in IC952 andcorrection voltage from pin 3 controls the LED inPC951. The delayed activation of the 130V andAUDIO supplies reduces the load on IC951 duringinitial start up.

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VZ9 Chassis Technical Training

Switched Supplies130V, 18V and 12V are not the only Switched Sup-plies required. Figure 3 illustrates the source of thevarious switched supplies. A Switched 4.5 Volt sup-ply is generated by rectifying the signal from pin 20of T951. The 4.5V supplies power for IC2P20, a3.3V Regulator on PCB-SIGNAL. The output ofIC2P20 supplies the 3DYC and PIP circuits.

A second 3.3V Regulator, IC805, is powered fromthe SW 12V supply, and supplies power to the Con-vergence Waveform Generator.

The SW 12V supply, is also the source for SW 9Vand SW 5V supplies. IC936 is the SW 9V Regula-tor and IC935 the SW 5V Regulator.

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Deflection Generated SuppliesBesides HV, Focus and CRT Screen voltage, the de-flection circuitry also generates:

• +24V and –24V Supplies for the Conver-gence circuitry.

• A 34V Supply for the Vertical Output IC• A 230V Supply for the RGB CRT Drive

Amplifiers• CRT filament voltage.

Figure 4 shows the source of each of these supplies.The secondary windings of T519, in the collectorcircuit of the Horizontal Output Transistor, are thesources for +24V, -24V and CRT filament supplies.The plus and minus 24 volt supplies power to theConvergence Output circuitry, and are the source forthe +9V and -9V supplies. Rectification of the sig-nals from pins 7 and 6 of the Flyback produces the230V and 34V supplies. The 230V supplies powerto the CRT RGB Drive amplifier, and the 34V sup-ply is the source for the Vertical Output IC.

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Chapter 2Video/Color Circuitry

Overall Video/Color CircuitryAlthough similar to the VZ7 and VZ8 chassis, theVideo/Color circuitry in the VZ9 does differ. Differ-ent VCJ and PIP ICs are used:

• IC2V00 VCJ (Generic #CXA2142S)• IC6P00 PIP (Generic #SDA9589X)

VZ9 Chassis Technical Training

Figure 1 illustrates the Overall Video/Color Circuitryin the VZ9. IC2K01 selects NTSC source signalsfor both the main and sub pictures. The Y (lumi-nance) and C (chroma) signals must be separatedwhen the main picture source is Composite Video.

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VZ9 Chassis Technical Training

The Comb Filter in IC2C01 separates the Y and Ccomponents of the Composite Video signal. The mainY and C signals are routed through IC2K01 and out-put as the NTSC main picture source. IC2K01 alsooutputs the selected sub picture source (compositevideo). This part of the circuitry is basically the sameas in previous models.

The main and sub pictures signal paths from the A/VSwitch differ from that in earlier models.

Main Picture PathMain picture Y and C signals are input to the VCJ(IC2V00) at pins 9 and 7. In the VCJ the signals areconverted to the component format (Y,Cb,Cr) andare output at pin 32, 30 and 31.

IC2V40 selects either the Y,Cb,Cr signals fromIC2V00, or the Y,Cb,Cr signal from the Component(DVD) Inputs. The selected Cb,Cr signals are en-hanced in IC2Y00 and input to the VCJ at pins 38and 39. The Y signal from IC2V40 is routed throughBuffer (IC6Y51), Aperture Improvement (IC6Y50)and is directed to pin 37 of the VCJ.

The signals input at pins 37, 38 and 39 are internallyconverted to RGB and output at pins 22, 23 and 24,respectively.

Sub Picture PathThe composite video sub picture signal from the A/V Switch is directed to pin 28 of IC6P00. IC6P00 isthe PIP signal processing IC, generating the signalsfor the insert picture(s). The sub picture output sig-nals are in the RGB format:

• Sub R at pin 18• Sub G at pin 17• Sub B at pin 16

The SEL signal from pin 15 of IC6P00 is the timingsignal for inserting the sub picture into the main pic-ture. All four signal Sub-R, Sub-G, Sub-B and SELare input to the VCJ. Sub picture insertion into themain picture occurs internally in the VCJ.

Note that OSD (On Screen Display) signals from theControl µPC are also input to IC6P00. When anOSD is activated, the OSD RGB signals are routedthrough IC6P00 to pins 26, 27 and 28 of the VCJ.OSD insertion in the main signal also occurs in theVCJ.

Although not shown in Figure 1, IC6P00 also readsthe program rating code of the sub picture signal andforwards it to the Control µPC.

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VCJ/PIP/OSD CircuitryFigure 2 shows the VCJ, PIP and OSD circuitry inmore detail. The only additions to the main picturesignal path in Figure 4 are the three buffer transis-tors Q2V51 through Q2V53, and the nine color am-plifiers Q6R0(0, 1 & 3), Q6G0(0 ,1 & 3) and Q6B0(0,1 & 3).

The nine color amplifiers were previously on thePCB-CRTs. With the color amplifiers on the PCB-SIGNAL, the signals directed through the cables tothe CRTs are larger and radiation could occur. Thisis the reason the cables are now shielded and differ-ent connectors are used.

PIP CircuitryReferring to Figure 2, the sub picture compositevideo is input at pin 28 of IC6P00. Internally, thesignal is converted from analog to digital and thendirected to PIP Processing circuitry.

The PIP Processing circuit:• Separates the Y and C signals.• Converts Y and C to the RGB format.• Processes the RGB signals to form the insert

picture(s).

The signals are then converted from digital to ana-log and directed to the PIP/OSD Switch circuitry in

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VZ9 Chassis Technical Training

IC6P00. When PIP is activated, signals are outputand directed to the VCJ. The SEL signal from pin15 of IC6P00 is also applied to the VCJ, providingtiming for PIP insertion. The insertion of the PIPsignals into the main picture RGB signals occurs inthe VCJ.

On Screen Display CircuitryOSD RGB signals from the µPC are input to IC6P00at pins 11, 12 and 13, respectively. The OSDBLKtiming signal from the µPC is input at pin 14 of theIC. The presence of the OSDBLK signal switchesthe outputs from the PIP/OSD Switch to the OSDRGB signals, bypassing the PIP circuitry. TheOSDBLK signal is output on the SELECT line. TheOSD signals are applied to the same inputs on theVCJ as the PIP signals.

OSD insertion in the main picture RGB signals takesplace in the VCJ. Timing for the insertion is pro-vided by the Select signal at pin 25 of the VCJ.

Gray Transparent BackgroundDuring Closed Caption and Menu displays the back-ground appears as a transparent gray. The gray back-ground is activated by the Half Tone signal at pin 29of the VCJ. When High the gain of the internal RGBAmplifiers is reduced by 10 db. This results in thatarea of the picture appearing as a gray transparentbackground.

Figure 3 shows the paths of both OSDBLK andHALF-TONE timing signals. OSDBLK, from pin 21of the Control µPC, is directed through D7034 topin 14 of IC6P00. The presence of the OSDBLKsignal changes the position of the switches in IC6P00,selecting the OSD Inputs and OSDBLK as the out-put signals. OSDBLK is directed to pin 25 of theVCJ to time OSD insertion.

When the OSD signals originate in the Convergencecircuitry, the C-BLNK signal replaces OSDBLK asthe timing signal.

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VZ9 Chassis Technical Training

The HALF-TONE signal, from pin 22 of the µPC, isdirected through two NOR Gates in IC704. Theoutput of IC704 is applied to pin 29 of the VCJ.

With no gray background the HALF-TONE line isLow. The Low is inverted by both NOR Gates inIC704, resulting in a Low at pin 29 of the VCJ.

During a gray background, the HALF-TONE linegoes High. Through the two NOR Gates it drivespin 29 of the VCJ High, producing the gray back-ground.

Note that the second input of the second NOR Gatereceives OSD-BLK signal. During High sections ofthe OSD-BLK signal, the second NOR Gate pullspin 25 of the VCJ low. This momentarily removesthe gray background during OSD insertion.

Sub Picture Program RatingIt was stated earlier that IC6P00 also reads sub pic-ture program rating data and forwards it to the µPC.Referring to Figure 2, Data from the PIP Processingblock in the IC is applied to a Data Slicer. The pro-gram rating data is located, read and sent to the µPCover the SDA I2C data line. The µPC then eitherallows, or blocks the sub picture signal.

Although IC6P00 constantly monitors program rat-ing information, the data transfer to the µPC is notconstant. If the sub signal Program rating changes,due to a program or signal source change, IC6P00outputs a V-CHIP INT signal at pin 10. This alertsthe µPC the program rating changed and is beingsent over the SDA data line. This frees the µPC forother operations other than constantly monitoring thesub picture program rating.

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Chapter 3Convergence Circuitry

VZ9 Chassis Technical Training

Convergence CircuitryAlthough the Convergence circuitry's operations isbasically the same as that in the VZ7 and VZ8, twodifferent ICs are used:

1) The Convergence Waveform Generator(IC800) is new (generic #CM0022AF).

2) The two Convergence Output ICs arereplaced with a single IC (generic #STK393-110).

The new Convergence Waveform Generator IC re-quires a 3.3 Volt DC supply, instead of the 5 voltsused in previous models. Although the circuitry isbasically the same, it does change the pin numbers inthe overall signal path.

Figure 1 illustrates the Overall Signal Path in the VZ9Convergence circuitry. An E2PROM, IC801 is still

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VZ9 Chassis Technical Training

used to store convergence data. The SDAM linefrom pin 4 of IC8A00 reads and writes date to andfrom IC801.

The Waveform Generation is controlled by the samecommands from the Control circuitry. The new pinnumbers are shown in Figure 5. These include:

• C-SDA I2C data line.• C-SCL clock line• C-MUTE disables Convergence operation

during Off/On and signal source changes.• C-RESET resets the Convergence circuitry.

C ACK and C BUSY lines inform the µPC of Con-vergence current status. The C ACK line informs

the µPC that a command was received, and the CBUSY line tells the µPC it is busy performing previ-ous commands.

The D/A Converter and LPF/AMP ICs are the sameas those used in previous models so there are no pinnumber changes.

IC8C00 is the new Convergence Output IC. It re-places the two Output ICs used in previous models.The input and output pin numbers are given in Fig-ure 5. The red, green and blue, horizontal and verti-cal convergence signals from IC8C00 are directedto the sub coils in each respective deflection yokethrough the VU connector.


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