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Operating System Memory Management WANG Xiaolin November 7, 2010 u [email protected] 1/81
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Operating SystemMemory Management

WANG Xiaolin

November 7, 2010

u [email protected]

1 / 8 1

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Outline

Background

Swapping

Contiguous Memory Allocation

Virtual MemoryPagingSegmentationDemand PagingCopy-on-Write

Page Replacement AlgorithmsAllocation of Frames Thrashing And Working Set ModelOther Issues

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Memory Management

In a perfect world ...

Memory is large, fast, non-volatile

In real world ...

Registers

Cache

Main memory

Magnetic tape

Magnetic disk

1 nsec

2 nsec

10 nsec

10 msec

100 sec

<1 KB

1 MB

64-512 MB

5-50 GB

20-100 GB

Typical capacityTypical access time

Memory manager handles the memory hierarchy

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Basic Memory ManagementReal Mode

In the old days ...

Every program simply saw the physical memory

mono-programming without swapping or paging

(a) (b) (c)

0xFFF …

0 0 0

Userprogram

User

program

Userprogram

Operatingsystem in

RAM

Operatingsystem in

RAM

Operating

system inROM

Device

drivers in ROM

.old mainstream .handhold, embedded .MS-DOS4 / 8 1

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Basic Memory ManagementRelocation Problem

.Exposing physical memory toprocesses is not a good idea

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Memory ProtectionProtected mode

We need

Protect the OS from access by user programs

Protect user programs from one another

Protected mode is an operational mode of x86-compatible CPU.

The purpose is to protect everyone else(including the OS) from your program.

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Memory ProtectionLogical Address Space

Base register holds the smallest legal physical memory

addressLimit register contains the size of the range

A pair of  base and limitregisters define the logicaladdress space

 JMP 28«

 JMP 300068

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Memory ProtectionBase and limit registers

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UNIX View of a Process’ Memory

 max +------------------+| Stack | Stack segment

+--------+---------+

| | |

| v |

| |

| ^ |

| | |+--------+---------+

| Dynamic storage | Heap

|(from new, malloc)|

+------------------+

| Static variables |

| (uninitialized, | BSS segment

| initialized) | Data segment+------------------+

| Code | Text segment

0 +------------------+

Process’ memory isdivided into logicalsegments

text: program code

data: initialized global andstatic data

bss: uninitialized global andstatic data

heap: dynamically allocatedwith malloc|new|free

stack: local variables..the size (text+data+bss) of 

a process is established at

compile time9 / 8 1

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Stack vs. Heap

Stack Heap

compile-time allocation run-time allocation

auto clean-up you clean-up

inflexible flexible

smaller bigger

quicker slower

How large is the ...stack: ~$ ulimit -s

heap: could be as large as your virtual memory

text|data|bss: ~$ size a.out

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Multi-step Processing of a User ProgramWhen is space allocated?

Static: before program start

running Compile time Load time

Dynamic: as program runs

Execution time

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Address BindingWho assigns memory to segments?

Static-binding: before program start running

Compile time: Compiler and assembler generate anobject file for each source file

Load time: Linker combines all the object files into a single

executable object file Loader (part of OS) loads an executable object file

into memory at location(s) determined by the OS

Dynamic-binding: as program runs

Execution time: uses new and malloc to dynamically allocate

memory gets space on stack during function calls

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Static loading

The entire program and all dataof a process must be in physicalmemory for the process to

execute The size of a process is thus

limited to the size of physicalmemory

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Dynamic Loading

Better memory utilization

Only the main program is loaded into memory andis executed

Routine is not loaded until it is called

Unused routine is never loaded

Useful when large amounts of code are needed tohandle infrequently occurring cases

dynamic_loading(&routine){i f  ( i s _ c a l l e d && ! loaded ) {

load_routine_into_memory ( ) ;}pas s _ct rl(& rou t in e ) ;

}

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Dynamic Linking

Similar to dynamic loading

A dynamic linker is actually a special loader that

loads external shared libraries into a runningprocess

Small piece of code, stub, used to locate theappropriate memory-resident library routine

Only one copy in memory Don’t have to re-link after a library update

i f  ( stub_is_executed ){i f  ( ! routine_in_memory )

load_into_memory(&r ou ti ne ) ;

s t u b_replace s _it s elf (& rou tin e ) ;execute(&ro utine ) ;

}

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i l h i l dd

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Logical vs. Physical Address Space

Mapping logical address space to physical addressspace is central to MM

Logical address generated by the CPU; alsoreferred to as virtual address

Physical address address seen by the memory unit In compile-time and load-time address binding

schemes, LAS and PAS are identical in size

In execution-time address binding scheme, they are

differ.

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L i l Ph i l Add S

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Logical vs. Physical Address SpaceMemory-Management Unit (MMU)

 The user program deals with logical addresses; it never sees

the real physical addresses

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MMU

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MMU

CPUpackage

CPU

The CPU sends virtual

addresses to the MMU

The MMU sends physicaladdresses to the memory

Memory

managementunit

MemoryDisk

controller

Bus

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S i

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Swapping

Major part of swap time is transfer time

 Total transfer time is directly proportional to theamount of memory swapped

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Memor Protection

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Memory Protection

Where are the base and limit  registers from?

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Contiguous Memory Allocation

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Contiguous Memory AllocationMultiple-partition allocation

(a)

Operatingsystem

  ;

  ;  ;

  ;

A

(b)

Operatingsystem

  ;

  ;  ;

  ;

A

B

(c)

Operatingsystem

  ;

A

B

C

(d)

Time

Operatingsystem

  ;

  ;  ;

  ;

  ;

  ;  ;

  ;

B

C

(e)

D

Operatingsystem

  ;

  ;  ;

  ;

B

C

(f)

D

Operatingsystem

  ;

  ;  ;

  ;

  ;  ;

  ;

C

(g)

D

Operatingsystem

  ;

A

C

Operating system maintains information about:a) allocated partitions b) free partitions (hole)

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Dynamic Storage Allocation Problem

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Dynamic Storage-Allocation ProblemFirst Fit, Best Fit, Worst Fit

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Dynamic Storage Allocation Problem

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Dynamic Storage-Allocation Problem

First-fit: The first hole that is big enough

Best-fit: The smallest hole that is big enough

Must search entire list, unless orderedby size

Produces the smallest leftover hole

Worst-fit: The largest hole Must also search entire list Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of speed and storage utilization

First-fit is generally faster

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Fragmentation

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Fragmentation

000000000000000000000000111111111111111111111111000000000000000000000000111111111111111111111111000000001111111100000000

00000000

00000000

00000000

00000000

11111111

11111111

11111111

11111111

11111111

00000000

00000000

00000000

11111111

11111111

11111111

Process F

Process L

Process C

fragmentationInternal

fragmentation

External

Reduce external fragmentation by

Compaction is possible only if 

relocation is dynamic, and is doneat execution time

Noncontiguous memory allocation Paging Segmentation

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Virtual Memory

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Virtual MemoryLogical memory can be much larger than physical memory

rtuaaddress

space

Physicalmemoryaddress

60K-64K

56K-60K

52K-56K

48K-52K

44K-48K

40K-44K

36K-40K

32K-36K

28K-32K

24K-28K

20K-24K

16K-20K

12K-16K

8K-12K

4K-8K

0K-4K

28K-32K

24K-28K

20K-24K

16K-20K

12K-16K

8K-12K

4K-8K

0K-4K

Virtual page

Page frame

X

X

X

X

7

X

5

X

X

X

3

4

0

6

1

2

virtual

address

 page table−−−−−−→

physical

address

Page 0map to−−−−→ Frame 2

MOV REG, 0

«MOV REG, 8192

0: beginning address of page 0

8192: beginning address of frame 2

20500v  = 20K v  + 20«

12308 phy  = 12K + 20.

.MMU

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Page Fault

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Page Faultrtua

addressspace

Physicalmemoryaddress

60K-64K56K-60K

52K-56K

48K-52K

44K-48K

40K-44K

36K-40K

32K-36K

28K-32K

24K-28K

20K-24K

16K-20K12K-16K

8K-12K

4K-8K

0K-4K

28K-32K

24K-28K

20K-24K

16K-20K12K-16K

8K-12K

4K-8K

0K-4K

Virtual page

Page frame

XX

X

X

7

X

5

X

X

X

3

40

6

1

2

What if MOV REG, 32780 ?

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Paging

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PagingAddress Translation Scheme

Address generated by CPU is divided into:

Page number(p): an index into a page tablePage offset(d): to be copied into memory

Given logical address space 2m and page size 2n,

number of pages =

2m

2n = 2m−n

Example: addressing to 0010000000000100

m−n=4   0 0 1 0

n=12   0 0 0 0 0 0 0 0 0 1 0 0   

m=16

page number = 0010 = 2, page offset = 000000000100

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Outgoingh i l

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15

14

1312

11

10

9

8

7

6

5

4

3

2

1

0

000

000

000000

111

000

101

000

000

000

011

100

000

110

001

010

0

0

00

1

0

1

0

0

0

1

1

1

1

1

1Present/ 

absent bit

Pagetable

12-bit offsetcopied directlyfrom inputto output

Virtual page = 2 is usedas an index into thepage table Incoming

virtualaddress(8196)

physicaladdress(24580)

110

1 1 0 0 0 0 0 0 0 0 0 0 1 0 0

00 1 0 0 0 0 0 0 0 0 0 0 1 0 0

Paging Example The internal operation

of the MMU with 164-KB pages

Physical memory: 32K Virtual memory: 64K 

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Shared Pages

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Shared Pages

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Page Table Entry

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Page Table EntryIntel i386 Page Table Entry

Commonly 4 bytes (32 bits) long Page size is usually 4k (212 bytes). OS dependent

~$ getconf PAGESIZE Could have 232−12 = 220 = 1M pages

Could addressing 1M× 4KB = 4GB memory

31 12 11 0

+--------------------------------------+-------+---+-+-+---+-+-+-+

| | | | | | |U|R| |

| PAGE FRAME ADDRESS 31..12 | AVAIL |0 0|D|A|0 0|/|/|P|

| | | | | | |S|W| |

+--------------------------------------+-------+---+-+-+---+-+-+-+

P - PRESENT

R/W - READ/WRITE

U/S - USER/SUPERVISOR

A - ACCESSED

D - DIRTY

AVAIL - AVAILABLE FOR SYSTEMS PROGRAMMER USE

NOTE: 0 INDICATES INTEL RESERVED. DO NOT DEFINE.30/81

Page Table

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Page Table

Page table is kept in main memory Usually one page table for each process

Page-table base register (PTBR): A pointer to thepage table is stored in PCB

Page-table length register (PRLR): indicates size of the page table

Slow Requires two memory accesses. One for the page

table and one for the data/instruction.

TLB

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 Translation Lookaside Buffer (TLB)

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( )Fact: 80-20 rule

Only a small fraction of the PTEs are heavily read;

the rest are barely used at all

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Multilevel Page Tables

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g

a 1M-entry page table eats4M memory

while 100 processesrunning, 400M memory isgone for page tables

avoid keeping all the page

tables in memory all thetime

a two-level scheme

page number | page offset

+----------+----------+------------+

| p1 | p2 | d |

+----------+----------+------------+

10 10 12

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 Two-Level Page Tables

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gExample

Don’t have to keep all the 1K  page tables

(1M pages) in memory. In this example

only 4 page tables are actuallymapped into memory

process

+-------+

| stack | 4M+-------+

| |

| ... | unused

| |

+-------+

| data | 4M

+-------+

| code | 4M

+-------+

Top−levelpage table

Second−levelpage tables

Topages

Pagetable forthe top4M ofmemory

6543210

1023

1023

654321

0

1023

Bits 10 10 12

PT1 PT2 Offset

4M−1

8M−1

Page table

Page table

Page table

Page table

Page table

Page table

Page table

Page table

Page table

00000000010000000011000000000100PT1 = 1 PT2 = 3 Offset = 4

01

23

4K ~ 8K−1

8K ~ 12K−1

12K ~ 16K−1

16K ~ 20K−1

0 ~ 4K−1

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Problem With 64-bit Systems

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y

Given:

virtual address space = 64 bits

page size = 4 KB = 212 B

How much space would a simple single-level page tabletake?

Each page table entry takes 4 Bytes, then

The whole page table (264−12 entries) will take

264−12 × 4 B = 254 B = 16 PB ( peta ⇒ tera ⇒ giga)!

And this is for ONE process!

Multi-level?

If  10 bits for each level, then [52/10] = 5 levels arerequired. 5 memory accress for each addresstranslation!

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Inverted Page Tables

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Index with frame number

Inverted Page Table: A single global page table for allprocesses; One entry for each physical page

The table is shared — PID is required

Physical pages are now mapped to virtual — eachentry contains a virtual page number instead of aphysical one

The physical page number is not stored, since theindex in the table corresponds to it

Information bits, e.g. protection bit, are as usual

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Standard PTE(32 bit system)

Inverted PTE(64 bit system)

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(32-bit system)

page frame address | info

+--------------------+------+

| 20 | 12 |

+--------------------+------+

220 entries, 4 B each

SIZE page table =

220

× 4 = 4 MB(for each process)

(64-bit system)

pid | virtual page number | info

+-----+---------------------+------+

| 16 | 52 | 12 |

+-----+---------------------+------+

Assuming 16 bits for PID 52 bits for virtual page number 12 bits of information,

each entry takes16 + 52 + 12 = 80 bits = 10 bytes

If 1G (230 B) physical memory,

and 4K (212 B) page size, we’llhave 230−12 = 218 pages. So,

SIZE page table = 218 × 10 B = 2.5 MB

(for all processes)

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Find index according to entry contents

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( pid, p) ⇒ i

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Inefficient: require searching the entire table

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Inefficient: require searching the entire table

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Hashed Inverted Page Tablesh h h bl l l b f h l

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A hash anchor table — an extra level before the actualpage table

maps process IDsvirtual page numbers

⇒ page table entries

Since collisions may occur, the page table must dochaining

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Hashed Inverted Page Table

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User’s View: A Program Is A Collection Of S t

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SegmentsA segment is a logical unit such as:

main program

procedure

function

method object

local variables

global variables

common block stack

symbol table

arrays

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Logical View of Segmentation 

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1

3

2

4

1

4

2

3

user space physical memory space

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Segmentation Architecture

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Logical address consists of a two tuple:

<segment-number, offset>

Segment table maps 2D virtual addresses into 1Dphysical addresses; each table entry has:

base contains the starting physical address where

the segments reside in memory limit specifies the length of the segment

Segment-table base register (STBR) points to thesegment table’s location in memory

Segment-table length register (STLR) indicatesnumber of segments used by a program;

segment number s is legal if  s < STLR

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(2, 53)⇒ 4300+53 = 4353

(3, 852)⇒ 3200+852 = 4052

(0, 1222)⇒ Trap!

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 The Intel Pentium Segmentation

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The logical address space of a process Private→LDT Shared→GDT 

LDT Local Descriptor TableGDT Global Descriptor Table

Each program has its own LDT for segments local toit (code, data, stack, ...)

GDT is shared by all the programs, describessystem segments, including the OS itself 

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A segment descriptor is 64-bit long

    

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An example LDT entry for code segment:

Relativeaddress

0

4

Base 0-15 Limit 0-15

Base 24-31 Base 16-23Limit16-19

G D 0 P DPL TypeS

  ;

  ;

32 Bits

the logical address is a pair (selector, offset)

selector | offset

+-----+-+--+--------+

| s |g|p | |

+-----+-+--+--------+

13 1 2 32

Selector is a 16-bit number

+-----+-+--+ s - segment number

| s |g|p | g - 0-global; 1-local

+-----+-+--+ p - protection use

13 1 2

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Segmentation With Paging

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selector | offset

+----+---+---+--------+

| s | g | p | |

+----+---+---+--------+

13 1 2 32

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Segmentation With PagingLogical Address ⇒ Linear Address

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Logical Address ⇒ Linear Address

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Segmentation With PagingLinear Address ⇒ Physical Address

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ea dd ess ⇒ ys ca dd ess

linear

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Linear Address in Linux

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Broken into four parts:

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Demand Paging

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Bring a page into memory only when it is needed Less I/O needed Less memory needed Faster response More users

Page is needed ⇒ reference to it invalid reference ⇒ abort not-in-memory ⇒ bring to memory

Lazy swapper never swaps a page into memoryunless page will be needed

Swapper deals with entire processes Pager deals with pages

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Valid-Invalid BitWhen Some Pages Are Not In Memory

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Page Fault Handling

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Copy-on-WriteMore efficient process creation

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Parent and childprocesses initiallyshare the samepages in memory

Only the modifiedpage is copied uponmodification occurs

Free pages areallocated from a

 pool of zeroed-outpages

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Need For Page Replacement

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Page replacementfind some page inmemory, but notreally in use, swap it

out

performance - want an algorithm resulting in lowest

page-fault rate Is the victim page modified?

Pick a random page to swap out?

Pick a page from the faulting process’ own pages? Or

from others? 58/81

FIFO Page Replacement Algorithm

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Maintain a linked list (FIFO queue) of all pages in order they came into memory

Page at beginning of list replaced

Disadvantage  The oldest page may be often used

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Optimal Page Replacement Algorithm

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Replace page needed at the farthest point in future Optimal but unrealizable

Estimate by ...

logging page use on previous runs of process although this is impractical. Similar to SJF

CPU-scheduling can be used for comparison studies

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Least Recently Used (LRU) Algorithm

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Assume recently-used-pages will used again soon throw out page that has not been used for longest

time

Keep counter in each page table entry choose page with lowest value counter require search update time-of-use field in the page table

every memory reference !! counter overflow — periodically zero the counter

Alternatively keep a linked list (stack) of pages

most recently used at front, least at rear update this list every memory reference !!

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Second Chance Page Replacement Algorithm

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Allocation of Frames

Each process needs minimum number of pages

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Each process needs minimum number of pages

Fixed Allocation

Equal allocation — e.g., 100 frames and 5processes, give each process 20 frames.

Proportional allocation — Allocate according to thesize of process

ai = si∑si×m

Si size of process pi

m total number of framesai frames allocated to pi

Priority Allocation — Use a proportional allocation

scheme using priorities rather than size

 priority i∑ priority i

or  (si∑

si

, priority i∑

 priority i)

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Global vs. Local Allocation

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If process Pi generates a page fault, it can select areplacement frame

from its own frames — Local replacement

from the set of all frames; one process can take aframe from another — Global replacement from a process with lower priority number

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 Thrashing

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1. CPU not busy ⇒ add more processes

2. a process needs more frames ⇒ faulting, andtaking frames away from others

3. these processes also need these pages ⇒ alsofaulting, and taking frames away from others ⇒

chain reaction4. more and more processes queueing for the paging

device ⇒ ready queue is empty ⇒ CPU has nothingto do ⇒ add more processes ⇒ more page faults

5. MMU is busy, but no work is getting done, becauseprocesses are busy paging — thrashing

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 Thrashing

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Demand Paging and ThrashingLocality Model

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A locality is a set of pagesthat are actively usedtogether

Process migrates fromone locality to another

Localities may overlap

locality in a memory reference pattern

Why does thrashing occur?

size of locality > total memory size67/81

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 The Working-Set Algorithm

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Information aboutone page 2084

2204 Current virtual time

2003

1980

1213

2014

2020

2032

1620

Page table

1

1

1

0

1

1

1

0

Time of last use

Page referencedduring this tick

Page not referencedduring this tick

R (Referenced) bit

Scan all pages examining R bit:

if (R == 1)set time of last use to current virtual time

if (R == 0 and age > τ)remove this page

if (R == 0 and age ≤ τ)

remember the smallest time

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 The WSClock Page Replacement Algorithm

A

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When a page fault occurs,the page the hand ispointing to is inspected.The action taken dependson the R bit:

R = 0: Evict the pageR = 1: Clear R and advance hand

AB

C

D

E

FG

H

I

J

K

L

Fig. 4-17. The clock page replacement algorithm.

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 The WSClock Page Replacement Algorithm2204 Current virtual time

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1213 0

2084 1 2032 1

1620 0

2020 12003 1

1980 1 2014 1

Time oflast use

R bit

(a) (b)

(c) (d)

New page

1213 0

2084 1 2032 1

1620 0

2020 12003 1

1980 1 2014 0

1213 0

2084 1 2032 1

1620 0

2020 12003 1

1980 1 2014 0

2204 1

2084 1 2032 1

1620 0

2020 12003 1

1980 1 2014 0

Fig. 4-22. Operation of the WSClock algorithm. (a) and (b) givean example of what happens when R = 1. (c) and (d) give anexample of R = 0.

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Page-Fault Frequency Scheme

Establish ”acceptable” page fault rate

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Establish acceptable page-fault rate

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Memory Mapped Files

Mapping a file (disk block) to one or more memory

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pages

Improved I/Operformance —much faster thanread() and write()system calls

Lazy loading(demand paging) —only a small portionof file is loadedinitially

A mapped file canbe shared, likeshared library 

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Other Issues - Prepaging

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reduce faulting rate at startup remember working-set

Not always work if prepaged pages are unused, I/O and memory was

wasted

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Other Issues Page Size There is no single best page size

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Larger page size« Bigger internal fragmentation

« longer I/O time

Small page size

« Larger page table« more page faults

one page fault for each byte, if page size = 1 byte for a 200k process, with page size = 200k, only one

page fault

No best answer

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Other Issues TLB Reach

TLB Reach - The amount of memory accessible from

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ythe TLB

 TLB Reach = ( TLB Size)× (Page Size)

Ideally, the working set of each process is stored inthe TLB

Otherwise there is a high degree of page faults Increase the Page Size

 This may lead to an increase in fragmentation asnot all applications require a large page size

Provide Multiple Page Sizes  This allows applications that require larger page

sizes the opportunity to use them without anincrease in fragmentation

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Other Issues Program Structure

Example

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Example

Data — int[128][128] Assume Page Size = 128 words

Each row is stored in one page

Program 1:for ( j =0;j <128; j++)

for ( i =0; i <128; i++)data [ i ] [ j ] = 0;

Worst case:

128 x 128 = 16, 384 page faults

Program 2:for ( i =0;i <128; i++)

for ( j =0;j <128; j++)data [ i ] [ j ] = 0;

Worst case:

128 page faults

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Other Issues I/O interlock

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Sometimes it is necessary to lock pages in memory sothat they are not paged out.

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Other Issues I/O interlockCase 1

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Be sure the following sequence of events does notoccur:

1. A process issues an I/O request, and then queueingfor that I/O device

2. The CPU is given to other processes3. These processes cause page faults

4. The waiting process’ page is unluckily replaced

5. When its I/O request is served, the specific frame is

now being used by another process

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Other Issues I/O interlockCase 2

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Consider the following sequence of events:

1. A low-priority process faults

2. The paging system selects a replacement frame. Then, the necessary page is loaded into memory

3. The low-priority process is now ready to continue,

and waiting in the ready queue4. A high-priority process faults

5. The paging system looks for a replacement

5.1 It sees a page that is in memory but not beenreferenced nor modified: perfect!

5.2 It doesn’t know the page is just brought in for thelow-priority process

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Reference

Operating System Concepts, 8e, Chapter 8-9

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Modern Operating System, 3e, Chapter 3

Understanding the Linux Kernel, 3e, Chapter 2

 The Linux Kernel, Chapter 3

Intel 80386 Programmer’s Reference Manual,

Chapter 5

Linkers and Loaders

Understanding Memory

Wikipedia — x86-64

Beej’s Guide to IPC, Section 10: Memory MappedFiles

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