mmWave IC Design in CMOS Technology

Andrea Mazzanti

June 21, 2016

Università degli Studi di Pavia

Laboratorio Circuiti Integrati Analogici

Introduction

• mmWave refers to the frequency range 30GHz – 300GHz(wavelength spans from 10mm to 1mm)

• First experiments of mmWave generation date back to 1890’s.

• In the last century, mostly used for research, with exotic technologies (waveguides, vacuum tubes, compound semiconductors).

• Did not find wide application due to cost/performance issues

• With cut-off frequency in excess of 300GHz, mainstream CMOS technology is expected to enable mmWave mass-market applications.

2

• mmWave applications & CMOS technology

• Components and building blocks•Low Noise Amplifiers

•Oscillators

•Power Amplifiers

• Conclusions

Outline

3

Automotive Radars

77-81GHz Short-range radar: parking assist, object detection Long-range radar: automatic cruise control, low visibility

(fog),object detection Long range vision: automatic driver Products in silicon (SiGe BiCMOS) already developed

4

Radar Operating Principle

5

High-Resolution imaging demonstrator96 TX+96 RX

1m

2m

2mm

ROHDE & SCHWARZ , InfineonIEEE Microwave Magazine, 2012

• 70-82GHz operation frequency. SiGe Bipolar technology. • 3072 TX + 3072 RX, 1536 ICs. ~kWatt power dissipation, ~1mW radiated power • Massive integration may reduce power/size/cost• Proposed for security screening, but other applications are possible : medical

imaging, 3D cameras… 6

Gbit/s wireless connectivity at 60GHzLeveraging the availability of wide spectrum for high-rate transfer

W-PAN

Few products already on the market

• 7 GHz of unlicensed bandwidth• Potentially more than 10Gbit/s wireless

connectivity • High O2 attenuation -> improve security

& spectrum reuse

7

Mobile Connectivity Beyond 2020Massive growth in traffic volume

Wire

less

Tra

ffic

(Exa

B/y

ear)

Massive growth in connected devices

5G mobile network expected to provide impressive growth in speed & capacity

8

mmWave is a key technology for 5G• mmWave spectrum attractive to enable high

speed access to the infrastructure. • Discussion on-going for best frequency band

(28GHz, 38GHz, 60GHz, 70GHz…)

source: IEEE Comm. Magazine, sept. 2014, & presentations from Samsung, Intel, NSN, Ericsson, Huawei

• High density of access points (small-, pico-, femto-cells)

• Multi antenna systems (MIMO) in terminals and access points

• Coverage from 20m to 200mt• Intensive use of mmWave

links for backhauling

9

mmWave 5G demonstrator

• power, size and cost reduction are now the key challenges • Hot research topics for academia and industry in the near future:

- mainstream technologies for cost & high integration- mix. of different technologies (3D, SiP) for power & performances- baseband-radio-antennas co-design- optimized circuits and architecture for dense MIMO systems

• Very complex transceivers architectures to support beam-forming & beam-steering.

• Demonstrators at 28GHz proposed by Samsung (IEEE Com.Magazine, Feb. 2012)

10

CMOS Technology

Opportunity and challenges

11

Why CMOS technology

• Speed of MOS transistors is continuously improving with scaling

• Cheaper, for large volumes, compared to SiGe BiCMOS and III-V technologies in particular

• Unprecedented integration level with power digital signal processing (DSP), analog circuits and antennas?!

• Passive devices (transmission lines, inductors, capacitors) easier to integrate (less area) at higher frequencies

• Communication and computing applications have benefited from these trends

• First mmWave CMOS circuits from Berkely at ISSCC 2004, CMOS 0.13um, 60GHz frequency 12

Cut-off Frequency

13

Supply Voltage & Output Conductance

Gate Length

gm/gds at biasing for max fT

Supply Voltage

J.Pekarik et al., IEEE CICC 2004

• in 65nm node (fT ~160GHz) gm/gds~ 6 , Vdd=1V

• gm/gds represents maximum voltage gain

• Low supply voltage limits dynamic range and linearity of amplifiers, output power and efficiency of PAs, phase noise of oscillators

• Issues common to Analog design but at mmWave:

- must use Lmin and high current density for speed (fT)

- cascodes introduce parasitic poles- Current-mode circuit techniques not

yet applicable

14

Losses of parasitic capacitors

• Large polysilicon gate resistance (rg) at small gate length• rg is responsible for power dissipation when AC current flows through Cgs

Example: 20x1um / 65nm nMOS device has rg ~ 16Ω, Cgs~ 28fF

Qg @ 60GHz = 5.9 Qg @ 6GHz = 5915

Passive ComponentsBack-End Of Line (BEOL) critical for passive components:

Shrinking of the metal layers leads to:

-Larger metals resistance (Rs, losses)

-Larger substrate parasitics (Csub, Rsub)

16

RF vs mmWave CMOS design

fo 5 GHz 60 GHz

Technology 250 nm 90 nm

fT 20 GHz (4 x fo) 120 GHz (2 x fo)

Supply Voltage 2.5V 1.2V

gm/gds 15.2 10.6

Q of gate capacitance > 40 ~6

Inductor Q 10-15 15-20

First CMOS RF products (5GHz) with 250nm tech. nodeFirst CMOS mm-Wave products (60GHz) with 90nm tech. node

17

Improvement with technology scaling?0.13 um 6 layers

IEDM 2010, S. Francisco

Continuous scaling driven by complex Systems on Chip

~ 20-30% fT improvement only per generation

aggressive scaling of metal layers• large impact of routing parasitic (layout) • passive components penalty

18

• mmWave applications & CMOS technology

• Components and building blocks•Low Noise Amplifiers

•Oscillators

•Power Amplifiers

• Conclusions

Outline

19

Device Modeling

CMOS technology Design Kits (DKs) usually do not (fully) support mm-Wave design:

- device models are not very accurate beyond 20 GHz- mmWave components not characterized or missing (e.g. very small inductors and capacitors, TLINEs)

Device customizations, optimizations, measurement and modeling is a key step for mmWave design

20

Inductors & Capacitors Modeling- frequency dependence of losses (skin effect)- differential vs single-ended excitations- substrate losses

21

Transmission Lines• Usually not available in design kits• short λ at mmWaves makes TLINES small

enough to be used on-chip • long interconnections between building blocks• confinement of EM fields minimize cross-talk,

spurious coupling between blocks• emulate lumped components (capacitors,

inductors)• matching networks, phase shifters

0.0

0.2

0.4

0.6

0.8

1.0

0 10 20 30 40 50 60 70

α [d

B/m

m]

Freq. [GHz]

Optimized geometry and shield for substrate loss demonstrated a record attenuation of 0.6dB/mm@60GHz

IEEE JSSC-2009, UniPV 22

Active Devices• Layout of transistors determines extrinsic parasitics and strongly affect

performances

• Maximum frequency of oscillations, fmax is a good figure of merit :

minimize Rg minimize Cgd maximize fT 23

Minimize Rg & Cgd larger spacing between gate (G) and drain (D) contacts may help to reduce Cgd

Gate resistance: double gate contacts and many small fingers in parallel

Rg’ = Rg / 16

duble contact, multi-fingers device

124

fmax

For given device size and layout, fT is maximized by maximizing gm

25

CMOS Building Blocks:

- Low Noise Amplifiers (LNAs)- Voltage Controlled Oscillators (VCOs)- Power Amplifiers (PAs)

26

Low Noise Amplifier

• LNA must provide low NF and high gain

• 50 ohm nominal input impedance (S11 < -10dB)

• Unconditional stability against variations of the antenna impedance• Linearity requirements less critical than for RF applications

27

Common Source Input Stage• L1 resonates at output

• Stability concerns due to Cgd

• Relatively high gain, thanks to contribution of the matching network

UniPV, CICC 2007

Matching on a noisy resistance (rg) introduces a 3dB lower bound on NFEx: rg=16Ω, Qg=6 @ 60GHz

-> Amatch= 4.6dB

• gain 9-12 dB

• NF ~ 5.5-6.6 dB

• Matching network provides voltage gain:

28

Inductively Degenerated Input Stage• Ls introduces a noiseless real part on the

input impedance at the gate:

• Eliminates the 3dB lower bound on NF but looses gain from the matching network

• More noise contribution from load and following stages

• Lower gain from matching network

Ex: 3dB penalty if ωTLs = rg29

LNA ExamplesPellerano et al,

JSSC 2008Heydari et al,

JSSC 2007Weyers et al, ISSCC 2008

Yao et al, JSSC 2007

Tech. 90nm 90nm 65nm 90nm

fo 64GHz 63GHz 60GHz 57GHz

-3dB BW 8GHz 4.5GHz 7.5GHz 6GHz

Gain 13.5 12.2dB 22.3dB 15.5dB

NFmin 6.7 6.5dB 6.1dB 5.5dB

# stages 2 2 3 3

Power 48mW 10.5mW 35mW 24mW

• NF bounded to 5-6dB. (NF down to 2dB or less demonstrated at RF)• Multi-stages required to achieve reasonable gain (5–6 dB gain/stage)• Limited bandwidth ~10%. (at RF, more than 100% demonstrated)

30

GBW in multi-stage LNAs

• The inductors between stages resonate with parasitic caps (c1,c2)

• R represents losses of LC-tank at resonance:

input match gm

V1

V2

Rc1

c2

in

50ΩV3

𝑅𝑅 =𝑄𝑄

𝜔𝜔0(𝑐𝑐1 + 𝑐𝑐2)

• -3dB bandwidth of each stage: 𝐵𝐵𝐵𝐵 =𝜔𝜔0𝑄𝑄

• Voltage gain of each stage: 𝐴𝐴 = 𝑔𝑔𝑔𝑔 𝑅𝑅 =𝑔𝑔𝑔𝑔𝑄𝑄

𝜔𝜔0(𝑐𝑐1 + 𝑐𝑐2)

• Gain-Bandwidth Product (GBW)= fixed by transistor parameters 𝑔𝑔𝑔𝑔

(𝑐𝑐1 + 𝑐𝑐2)31

GBW enhancement with coupled resonators

-10

-8

-6

-4

-2

0

40 50 60 70 80Freq. [GHz.]

Single LC Resonator

Norm

. Gai

n [d

B]

Cc ↑

• gain-bandwidth trade-off in singly-tuned inter-stage loads leads to large dissipation.

• coupled resanators are introducedto increase bandwidth and limitdissipation

32

Coupled-Resonators LNA Results

0

5

10

15

20

25

30

-20

-10

0

10

20

30

40

50 55 60 65 70

Noi

se F

igur

e (d

B)

Gai

n (d

B)

Freq. (GHz)

-25

-20

-15

-10

-5

0

50 55 60 65 70

|S11

| (dB

)

Freq. (GHz)

Gain 28 dBCenter freq. 60GHz

3dB-Bandwidth 14GHzGBW 350GHz

NF < 5.5 dBPower 20mW

33

CMOS Building Blocks:- Low Noise Amplifiers (LNAs)- Voltage Controlled Oscillators (VCOs)- Power Amplifiers (PAs)

34

Voltage Controlled Oscillator (VCO)

• Main block of the synthesizer, provides LO for mixers

• Oscillator with output frequency set by Vctrl

• Large output signal swing desirable

• Frequency tuning enough to cover channels + processing spreads

• High spectral purity (low phase noise)35

MOS VaractorTrade-off between Quality Factor (Qv)

and capacitance variation Cmax/Cmin

Measurements at 24GHz

For Lg=200nm

QV @ 24GHz = 15

QV @ 60GHz = 6

At 60GHz QV ~2.5 times lower than 24GHz

[C.Cao JSSC 2006]

36

LC-Tank VCO

Rp represents tank losses

At LC resonance:

37

LC - Tank Losses

A comparison with RF:

60 GHz: QL=15, QC = 6 → QT = 4.2 Varactors limit QT

5 GHz: QL=10, QC > 40 → QT > 8 Inductors limit QT

Two times more losses → ~ two times more gm for oscillator start-up

QL QC

38

Phase Noise

Noise of the devices perturbsrandomly the zero crossing ofthe oscillator output signal

Spectrum of LO with phase noise

39

Phase Noise Requirements

• Phase noise rotates signal constellation and impairs BER

IEEE 802.15-06-0477-01-003c [Online].

2Gbit/sec16-QAM

40

Phase Noise

Power Dissipation

• Maximize QT → trade-off with T.R.

• Maximize V2osc / Rp:

A comparison with RF:

60 GHz, QT = 4.2

5 GHz, QT > 8

60GHz VCO would require522 x power dissipation forthe same phase noise…

essentially not possible

IB

41

Tuning Range

•The tank is loaded by many fixed capacitivecontributions (parasitics, load)

•CV hardly exceed 20-30% of the total tankcapacitance

•T.R. drops dramatically as frequencyincreases

42

VCO example - I[UniPV, RFIC 2008]

• 65nm CMOS, 7.2mW from 1.2V supply• Analog + Digital Switching of Varactors• fo=53GHz, Tuning Range 11.5%• Phase Noise @ 10MHz offset -118dBc/Hz

43

VCO example - IIUniPV, ISSCC2013

• 32nm CMOS, 9.8mW from 1V• f0 40GHz, outstanding T.R of 32%• Phase Noise @ 10MHz offset -115 / -118dBc/Hz

new LC-tank topology: inductor splitting with Mswand transformer feedback to extend Tuning Range w./o. penalty on Q

44

115GHz LO generation with Injection LockingUniPV, ISSCC 2010

Tuning-Range decreases dramatically with frequency

At > 60GHz, VCO + doubler yelds better performance than a fundamental frequency VCO

55GHz VCO110GHz injection-locked oscillator

An injection-locking scheme based on a modified Clapp oscillator topology was proposed as a low-power, wideband frequency doubler

45

115GHz LO generation with Injection LockingUniPV, ISSCC 2010

Record Tuning Range (6x) with state-of-the art phase noise and power dissipation for the VCO+doubler chain

65nm CMOS

46

CMOS Building Blocks:- Low Noise Amplifiers (LNAs)- Voltage Controlled Oscillators (VCOs)- Power Amplifiers (PAs)

47

Power Amplifier

• Deliver mmWave power to the antenna

• Stability against load impedance variation

• Linearity very important (efficient modulation needs linear amplification)

• Power efficiency

• Power gain: multiple stages (PA + driver(s) )

• Device stress: long time reliability48

Power Amplifier

• Class-A for max power gain and linearity. L1 resonates with cap. at node X

• Vmax (0-pk drain swing) ≤ VDD

• Given the power (P) and Vmax, Rin is calculated from

• Drain voltage > VDD : long term reliability concerns

for a RF voltage > 60% of nominal supply, Pout degrades by 2dB over 7 years

[Ruberto, IEEE RFIC 2005] 49

Power Efficiency

Finite Q of passive components, low supply voltage and Class-A operation limit drastically the power efficiency

PX Pout

50

Numerical Example

Assume: VDD=1V, PX = 25mW, Vmax=0.6V ( Vdrain_max=1.6V )

PX Pout

Required Rin is 7.2Ω, Iin = Vmax/Rin = 83mA ( = IDC, Class A)

Pdiss= VDD x IDC = 83 mWηM1 = 30%

51

Matching Network LossesQ of passives (L,C, TLINEs) responsible for matching losses

PX Pout

Rin is 7.2Ω , Q=5: ηmatch = 66%, Pout=16.5mW

η = ηM1 x ηmatch = 19%

52

Power Combining Techniques

Efficiency degrades as output power increases

Use many low power PAs in parallel• Lumped elements power combining (transformers)• Distributed elements power combining (TLINEs)• Spatial Power Combining (Antennas) 53

High-gain, Wide-Band PA challenge

The higher the gain-per-stage, the higher is the efficiency (left plot)

Due to GBW limitation, efficiency is reduced in wide-band PAs (right plot)

Hard to achieve efficiency > 10% with 15GHz bandwidth

output match

input match

outputstagedriver

pre-driver

50Ω

Low gain at mmWave, needs several driving stages.

54

Coupled Resonators for GBW enhancement in PAsmagnetically-coupled resonators in (1) matching networks and (2) power splitter/combiner in a 2-paths differential CMOS PA

UniPV, [CICC2015, JSSC2015]

55

Coupled Resonators for GBW enhancement in PAsUniPV, CICC2015, JSSC2015

Summary & Conclusions

• mmWaves band offers a variety of new applications• Technology scaling opened the opportunity to develop CMOS

ICs working a tens of GHz• Building blocks and transceivers demonstrated• Big performance gap, compared to RF(1-10GHz) ICs• Mild improvement expected from further.• The high operating frequency and CMOS limitations introduce

many new challenges to circuits design• Space for new ideas at all levels: device, circuit and

architecture57