Modern Test and Measure: September 2014

September 2014

Interview with Adam Fleder President of TEGAM

The Logic of Oscilloscopes

Sourcing & Measuring Higher Currents

TEGAM turns Legacy Products into Niche Market Expertise

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CONTENTS

3

Modern Test & Measure

4

14

26

30

Although DC current sources typically don’t let you pulse their outputs, you can build pulse circuits yourself. Pulsed sources are often essential for testing power devices such as MOSFETs or IGBTs because DC test currents would skew the device-under-test (DUT) resistance values due to Joule heating. Although high-power pulse generators are available, they have no built-in measurement capabilities, so they require synchronizing the operation of a separate ammeter with the pulsed test signal.

Pulsed Sweeps for Higher Power

You can substitute a pulsed sweep for a DC sweep to achieve higher power I-V sweeps with little impact on results. However, with some DUTs, such as capacitors, pulsed sweeps may not correlate adequately with DC sweeps because large displacement currents, which can be generated at the sharp edges of the voltage pulse, may change these devices’ electrical properties. On the other hand, pulsed IV testing is essential for other device types, such as high-power RF power amplifiers and even low-power nanoscale devices, to obtain optimal results. During high-power continuous-wave (CW) testing, the semiconductor

material itself will start to dissipate the applied power as heat. As the material in the device heats, the conduction current decreases because the carriers have more collisions with the vibrating lattice (phonon scattering). Therefore, the measured current will be erroneously low due to self-heating effects. Given that these types of devices typically run in pulsed mode (i.e., intermittently rather than continuously), the erroneously low DC-measured currents won’t accurately reflect their performance. In these circumstances, pulsed testing must be used.

You must take two factors into account when making the change from the use of a DC sweep to a pulsed sweep. The pulse must be wide enough to allow sufficient time for the device transients, cabling, and other interfacing circuitry to settle so the system can make a stable, repeatable measurement. At the same time, however, the pulse cannot be so wide that it exceeds the test instruments’ maximum pulse width and duty cycle limits, which would violate the instrument’s allowed power duty cycle. Pulses that are too wide can also create the same device self-heating problems that can occur with DC sweeps.

Combining Multiple SMU Instrument Channels

The most common method of combining SMU instrument channels to achieve higher DC currents is to connect the current sources in parallel across the DUT, as shown in figure 1.

This test setup takes advantage of a well-known electrical principle (Kirchhoff’s current law), which states that two current sources connected to the same circuit node in parallel will have their currents added together. Both SMU instruments source current and measure voltage. All of the LO impedance terminals (FORCE and SENSE) of both SMU instruments are tied to earth ground. Table 1 provides an overview of the characteristics of this particular configuration.

CHARACTERISTIC DEFINITION

DUT Current IDUT = ISMU1 + ISMU2

DUT Voltage VDUT = VSMU1 = VSMU2

Maximum Source Current IMAX = IMAX SMU1 + IMAX SMU2

Maximum Voltage Smaller of the two SMUs maximum voltage capabilities

“The pulse must be wide enough to allow sufficient time for the device transients,

cabling, and other interfacing circuitry to settle.”

You should set the output currents for SMU1 and SMU2 to the same polarity to obtain maximum output. Whenever possible, one SMU instrument should be in a fixed source configuration and, the other SMU instrument performs the sweep. This is preferable to having both sweeping simultaneously. If both SMU instruments are sweeping, their output impedances are naturally changing, for example, as the meter autoranges up and down. The DUT’s output impedance may also be changing significantly, such as from a high-resistance off-state to a low-resistance on-state. With so many of the impedance elements in the circuit changing, this could increase overall circuit settling time at each bias point. Although this is a transient effect that damps out, fixing one SMU instrument’s source and sweeping the other usually results in more stable and faster-settling transient measurements, for higher test throughput.

Merging Pulse Sweeps

New SMU instrument architectures simplify merging the power-enhancement advantages of the pulse-sweep method with multiple SMU channels operated in parallel. For example, some dual-channel SMU instruments allow increasing the number of channels from two to four. Using pulse sweep and multichannel capabilities in tandem allows sourcing far higher currents than using a single SMU instrument with DC sweeps. Obviously, implementing this test method demands the exercise of extraordinary caution to ensure personnel safety. For safety, it is critical to insulate or install barriers to

Table 1.

Figure 1.

adds significant value to an MSO. Large memory means seeing more history of observed signals.

3. Logic analyzers allow more complex triggering or data filtering than MSOs.

The total amount of available memory is not the only parameter to consider. How the instrument uses the memory to store data is equally important. How much of the signal history is observable? How useful is this information in debugging the system being tested?

Consider how logic analyzers and MSOs select data. Most MSOs are able to trigger on simple events such as a voltage level, or a digital value, or transition on specific digital lines. Where they also provide simple serial bus decoding such as I²C or SPI, MSOs can also be useful for utilizing serial triggers, that is, stopping the capture on the occurrence of a predefined serial value on a digital line.

On the other hand, all logic analyzers are able to trigger on a parallel value. They are also able to build up complex sequences of conditions to ultimately trigger the capture of data. Many digital system busses are quiet most of the time. Basic logic analyzers, even when they are fully loaded with memory, risk wasting memory resources with samples even if nothing happens. To make the most of the logic analyzer memory, several strategies coexist. Therefore, some logic analyzers only store data transitions,

thereby potentially compressing the collected data. This is a somewhat uncontrolled way to save on memory and is highly dependent on the data itself. Another strategy for economical storage consists of using logic equations on the recorded data to define the conditions when the logic analyzer should store the data or when it can discard it.

Data qualification, or data filtering, is the ability of the logic analyzer to record only the data that matches user-defined criteria. In this case, the logic analyzer is also referred to as a digital data logger. This strategy is based on prior knowledge of the debugged digital system. It can be as simple as detecting a signal level (e.g. an output enable) and recording the values of a bus when this level is seen. Or it can be much more complex,

like a filtering when a Boolean equation from certain digital lines is true, or even recording a predefined data quantity each time a trigger condition is encountered.

Total available memory is important, but efficient data storage, data qualification, and rich triggering options bring significant value to different logic analyzer products. Seeing relevant data is more important than seeing all the data. A logic analyzer capable of data qualification or data filtering, which is sometimes referred to as a data logger, is an excellent companion tool to an MSO.

4. Logic analyzers look at signals the way hardware does.

Unlike most MSOs, logic analyzers are able to use the reference sampling clock signal of the system under test. This means looking at the sampled signals in sync with the eyes of your hardware. This is mode is called “state analysis,” as opposed to “timing analysis,” where the sampling clock is generated by the equipment itself. Running equipment in state analysis mode can be a challenge, because a clean reference clock signal from a system under test may not always be available. Nevertheless, state analysis will provide close insight into a system’s embedded software, allowing focus to be placed on the information seen by the hardware and speed up debugging.

ConclusionsMixed-signal oscilloscopes are extremely well-suited to most basic and advanced testing and debugging tasks on all kinds of electronic systems. For this reason, the investment in an additional external logic analyzer must be thought out carefully. Picking a logic analyzer just because it has 100 channels won’t probably be worthwhile, since alternative and more cost-effective debugging strategies exist.

But a logic analyzer with a multi-megasample memory, state analysis capability, and data qualification capability will add value to any common MSO. A logic analyzer chosen with these features can view a system the same way as a circuit does and save data during large windows of time. This kind of logic analyzer is an ideal companion to a traditional MSO since it provides the complementary analysis that can speed up debugging tasks and make any engineer more efficient in debugging complex digital problems, not only adding value to an MSO, but adding value to your employment!

“With electronic systems evolving

towards more complexity, debugging

often involves finding a mix

of analog and logic

problems.”

An example of a logic analyzer with long memory and complex triggering options for data analysis is the LOG Storm - Logic Analyzer - High Speed Data Logger.

• Large 8-Meg Sample memory (20-bit). • State analysis up to 125MHz.

• Advanced data qualification. • SPI and I2C monitoring, zero latency trigger rearm, and more.

The digital data logger filters data: only qualified data is sampled. Interesting data is seen.

How has TEGAM evolved since the company first started?

The company was actually started as a contract manufacturer in 1979 by Terry Gambill, for whom the company is named. Since he excelled at mergers and acquisitions, the company acquired product lines, especially instrumentation product lines. In the process, TEGAM acquired some Keithley handhelds. However, by the time we were in negotiations to buy TEGAM in 2004, the business had changed such that a company really had to do its own product development instead of acquiring technology. Our vision for the company was to bring our product development expertise to bear on TEGAM, which already had good distribution channels and good manufacturing.

How did you initiate product development within TEGAM?

We had to rebuild the development team first, so we brought in people from various companies. However, it took time for the team to be a cohesive unit. This was ultimately accomplished by working together on development projects.

Since the acquisition, what has been the most interesting product challenge?

The most interesting project since the acquisition was the development of a 2.4 mm, 50GHz microwave standard, which is a very accurate microwave power sensor that’s used in calibrating field sensors. This project was an extension of one of TEGAM’s existing product lines, but fundamental research was needed to differentiate the new product from the old. We gained understanding at the physics level of how to develop a circuit that would operate at those frequencies as well as how to develop new sense elements, for which we were issued patents last year. It was interesting, challenging, and we ultimately succeeded in what we set out to do.

What are some challenges in the industry that TEGAM is uniquely situated to address?

What interests us right now is continuing to extend the capability of our RF and microwave power measurement. Recently, for the U. S. Air Force, we developed a higher-power RF measurement system that produced low uncertainty. The product is able to measure up to 100 watts of RF power with lower uncertainty than anyone else has been able to achieve so far.

How exactly do you address the measurement uncertainty aspect?

In the case of medium-power RF, it was necessary to use a well-characterized, water-cooled RF load and then measure the rise of the fluid circulating. This determines how much energy is imparted into the water over time, which allows the ability to calculate, with some basic SI units, what the power is. Accurate measurement of flow rates and temperatures provides a standard to calibrate the medium-power RF system against. By

“We developed new microwave power-sensor

elements, for which we were issued patents

last year.”

Digital Thermometer Calibrator (Model 840A)

High Speed Microohm Resistance Meter (Model 1740)

Microohmmeter and Bond Tester with Rugged Case (Model R1L-BR)

Microwave Calibration Standard (Model 2510A)

identifying all of the sources of loss and error in the system and then addressing them, we are able to significantly reduce the level of uncertainty.

When we look at what products we should develop, we have a couple of areas that we handle very successfully. Besides the RF and microwave power measurement, we also measure very low resistances quite well. Measuring anywhere from 1 ohm down to nano-ohms is an area of specialty for us. We leverage that to produce equipment for people who are testing electrical assemblies or electrical components. We also make portable measurements used on aircraft and oil refineries. These are areas in which TEGAM has a reputation and brand equity. In the instrumentation business, customers buy based on a company’s experience making a specific type of measurement. At TEGAM, we are known for our expertise with micro-ohms.

“Measuring anywhere from 1 ohm down to nano-ohms is one of

our specialties.”

It’s generally acknowledged that curve tracers, originally introduced in the late 1950s for characterizing vacuum tubes, then later for transistors, are no longer up to the task of characterizing advanced power semiconductor devices. The most obvious reason is that they are simply no longer available—their production ended in 2007. But even those device design engineers who still have working curve tracers in their labs face a more significant problem: these instruments simply lack the precision and other capabilities necessary to characterize the latest power semiconductor devices. This is particularly challenging for devices based on materials, including gallium nitride (GaN) and silicon carbide (SiC), which have lower leakage current and lower on-state resistance than devices based on traditional silicon technologies.

CURVES

AN

D EDGESTraditional Curve Tracer?What Will Take the Place of the

By David Wyban Applications Engineer at Keithley Instruments

TECH REPORTThe Logic of Oscilloscopes When a Logic Analyzer Adds Value

TECH REPORTGoing Beyond the SpecSourcing and Measuring Higher Currents

INDUSTRY INTERVIEWTegam Turns Legacy Products into ExpertiseAdam Fleder, President of TEGAM

TECH REPORTCurves and Edges Replacing the Traditional Curve Tracer

44


OscilloscopesUnderstanding when a logic analyzer

adds value to your mixed-signal scope

By Frédéric Leens, CEO of Byte Paradigm, Belgium

& Alan Lowne, CEO of Saelig Co. Inc., New York

The Logic ofWith mixed-signal oscilloscopes (MSOs) being everyone’s “engineering” Swiss Army knife, why would anyone need an

additional logic analyzer. MSOs with sampling rates in the GHz range and 8 or more digital lines are now available for well under $3,000 and some even under $1,000. For this reason, many in the electronic industry are announcing the demise of the logic analyzer as a piece of stand-alone equipment.

W

5

TECH REPORT

5

OscilloscopesUnderstanding when a logic analyzer

adds value to your mixed-signal scope

By Frédéric Leens, CEO of Byte Paradigm, Belgium

& Alan Lowne, CEO of Saelig Co. Inc., New York

The Logic ofWith mixed-signal oscilloscopes (MSOs) being everyone’s “engineering” Swiss Army knife, why would anyone need an

additional logic analyzer. MSOs with sampling rates in the GHz range and 8 or more digital lines are now available for well under $3,000 and some even under $1,000. For this reason, many in the electronic industry are announcing the demise of the logic analyzer as a piece of stand-alone equipment.

W

66


Oscilloscopes Versus Logic Analyzers Digital oscilloscopes and logic analyzers are based on sampling techniques. Signal, usually voltage, measurements are transformed into a digital value by a high-speed analog-to-digital converter (ADC) and stored into memory at regular time intervals defined by the instrument’s sampling clock.

A logic analyzer can be thought of as a scope with 1-bit vertical resolution on all channels. It displays signals as logic (binary) values, according to whether the measured voltage is above or below a conventional voltage level called the “threshold value.” That is the first fundamental difference between an oscilloscope and a logic analyzer.

The other fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed. In its most common mode of operation, an oscilloscope is essentially a device that repeatedly captures a window of events of a given length (defined by its total memory) and refreshes the display of a portion of it on a screen. Many oscilloscopes simulate “persistence” by superimposing multiple captured windows on the display and by modulating the screen pixel intensity.

A logic analyzer is mostly used for single-shot captures (no superimposition of successive captures) and to analyze the sequence of events of sometimes over more than 100 digital signals before and after a trigger event.

It was the appearance of microcontroller-based systems that required the creation of tools like logic analyzers. First, there was a need to observe digital busses, therefore requiring more than two or four channels. Second, there was a need to see the signals the way logic circuit does, i.e. at the sampling events of the circuit, in the form of binary values. Over time, logic analyzers have evolved into less “pure” instruments, with an ability to perform some analog measurements such as for checking threshold levels, detecting glitches, and verifying the compliance of signals to specific input-output standards.

“Real-Time,” Really?It is very common to hear that the real-time display capability is the main difference between a scope and a logic analyzer. In fact, the automatic display refresh may mislead users into thinking that the user sees data as it occurs. But the scope display is not really refreshed faster than the eye is able to see. In most cases, a logic analyzer (LA) is used by first capturing data and then analyzing it. The logic analyzer’s repetitive trigger capability also enables refreshing the display based on the repetitive occurrence of a trigger event. It is true that data is displayed and presented differently in digital scopes and LAs, but fundamentally, both tools operate by sampling signals and storing the samples into memory.

Full resolution

1-bit resolution

It is no surprise that mixed-signal oscilloscopes are to

be found in most electronic engineering labs today. They are versatile, affordable, and have become the basic instrument for any engineer who is testing, debugging, or verifying electronic systems. In fact, this may be the only instrument that most electronic engineers will ever have to or perhaps want to use for 90 percent of their lab time. So, it is wise to spend part of an initial engineering or test-lab budget on an MSO. But does this mean that there is no longer any need for a logic analyzer (LA)?

“Seeing relevant

data is more important

than seeing all the data.”

“A fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed.”

7

TECH REPORT

7

Oscilloscopes Versus Logic Analyzers Digital oscilloscopes and logic analyzers are based on sampling techniques. Signal, usually voltage, measurements are transformed into a digital value by a high-speed analog-to-digital converter (ADC) and stored into memory at regular time intervals defined by the instrument’s sampling clock.

A logic analyzer can be thought of as a scope with 1-bit vertical resolution on all channels. It displays signals as logic (binary) values, according to whether the measured voltage is above or below a conventional voltage level called the “threshold value.” That is the first fundamental difference between an oscilloscope and a logic analyzer.

The other fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed. In its most common mode of operation, an oscilloscope is essentially a device that repeatedly captures a window of events of a given length (defined by its total memory) and refreshes the display of a portion of it on a screen. Many oscilloscopes simulate “persistence” by superimposing multiple captured windows on the display and by modulating the screen pixel intensity.

A logic analyzer is mostly used for single-shot captures (no superimposition of successive captures) and to analyze the sequence of events of sometimes over more than 100 digital signals before and after a trigger event.

It was the appearance of microcontroller-based systems that required the creation of tools like logic analyzers. First, there was a need to observe digital busses, therefore requiring more than two or four channels. Second, there was a need to see the signals the way logic circuit does, i.e. at the sampling events of the circuit, in the form of binary values. Over time, logic analyzers have evolved into less “pure” instruments, with an ability to perform some analog measurements such as for checking threshold levels, detecting glitches, and verifying the compliance of signals to specific input-output standards.

“Real-Time,” Really?It is very common to hear that the real-time display capability is the main difference between a scope and a logic analyzer. In fact, the automatic display refresh may mislead users into thinking that the user sees data as it occurs. But the scope display is not really refreshed faster than the eye is able to see. In most cases, a logic analyzer (LA) is used by first capturing data and then analyzing it. The logic analyzer’s repetitive trigger capability also enables refreshing the display based on the repetitive occurrence of a trigger event. It is true that data is displayed and presented differently in digital scopes and LAs, but fundamentally, both tools operate by sampling signals and storing the samples into memory.

Full resolution

1-bit resolution

It is no surprise that mixed-signal oscilloscopes are to

be found in most electronic engineering labs today. They are versatile, affordable, and have become the basic instrument for any engineer who is testing, debugging, or verifying electronic systems. In fact, this may be the only instrument that most electronic engineers will ever have to or perhaps want to use for 90 percent of their lab time. So, it is wise to spend part of an initial engineering or test-lab budget on an MSO. But does this mean that there is no longer any need for a logic analyzer (LA)?

“Seeing relevant

data is more important

than seeing all the data.”

“A fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed.”

88


MSO = Oscilloscope + Logic Analyzer?Well, mostly. A mixed-signal oscilloscope features analog channels (usually 2 to 4) and digital channels (usually 8 to 16). On both types of channels, data is sampled at the MSO’s maximum sampling rate, 1GHz, typically. The sampling clock is usually generated internally by the MSO. In other words, the reference time base for sampling is not correlated with the data. This is what is referred to as “timing analysis.” And of course, the logic analyzer’s vertical signal resolution is reduced to 1 bit for the digital channels.

MSOs are able to perform some of the functionality traditionally reserved for LAs:

• Timing analysis on digital signals.

• Ability to see more than 2 or 4 channels; on modern MSO, 16 digital inputs are available.

• Digital signal integrity check.

In this respect, being able to visualize both the analog extension of a digital signal and its digital version on the same

screen is certainly an improvement compared to using a scope and a logic analyzer separately.

With electronic systems evolving towards more complexity, debugging often involves finding a mix of analog and logic problems. An MSO’s triggering can be defined by either type of signal. Repetitive (oscilloscope-like) or single-shot (logic analyzer-like) types of display can be used as well. But displaying both analog and digital recording on the same screen as time-correlated data is one of the biggest advantages of MSOs.

MSOs in Need When you think you need a logic analyzer, consider the following:

1. Logic analyzers have a larger number of digital channels than MSOs.

Traditional bench-top logic analyzers can count up to 128 digital channels or more. On MSOs, there are usually a maximum of 16 channels. Application-specific integrated circuit (ASIC) and field-programmable gate array (FPGA) design

engineers, who are heavy LA users, often need 32 to 64 signals and more to decode bus transactions or visualize the internals of a FPGA. But for 80 to 90 percent of the time, however, and even if you are involved in IC design, 16 digital channels are plenty. The rare 1 to 10 percent cases where you’d like to see 100 digital signals in parallel may not justify the investment in a high-end 100-channel logic analyzer which can cost over $20,000.

FPGA design is an area where large channel-count logic analyzers used to be basic equipment for debugging. Adding a connector on board and observing the chip through its input-output, or even putting a debug connector on chip-to-chip interconnections was very useful for troubleshooting the design. But thanks to its programmable nature, FPGAs allow many internal nodes to be monitored by simply routing them on to the input-outputs connected to the LA.

Things have changed; the FPGA world is getting so advanced that observing chip behavior through external digital input-outputs may not make much sense any more, even if you can see 100 of them in parallel. Today, an FPGA may run at over 300MHz internally, and putting a 100- pin high-speed parallel connector on a board brings excessive board constraints (noise, number of layers, crosstalk, etc.) In addition, the chip input-output buffers sometimes are unable to run at the same speed as the internals of the chip. Other approaches, such as using embedded logic analyzers or software-based

debugging, have now become far more efficient and cost effective.

The “number of digital channels advantage” of logic analyzers versus MSOs must be considered cautiously. 16 to 32 digital lines will be enough for most engineers. Logic analyzers with 68 to 100 or even more channels can make a difference where there is an absolute need to see more digital signals in parallel. However, this must be carefully balanced with the constraints of adding the required debug connector to a system. In a context where the digital complexity shifts towards inside the chip, it is increasingly difficult to probe high- frequency signals without creating signal or data integrity issues. For this reason, the investment of usually less than $20,000 in a logic analyzer with a large channel count may be worthwhile.

2. Logic analyzers have a larger memory than MSOs.

While there may be exceptions since MSO equipment is constantly evolving, one potential strength of a logic analyzer is that it can justify its addition to an existing MSO setup because it helps in seeing a larger window of time before and after a triggering event. Seeing a larger time of execution of a digital system is of great value during debug. It has the potential to speed up an understanding of why a bug occurs and hence speed up bug correction. It can pay for itself rather quickly! Additionally, a large total available memory size in a logic analyzer

“The FPGA world is so advanced that observing

chip behavior through external digital input-outputs may not make much sense any more.”

9

TECH REPORT

9

MSO = Oscilloscope + Logic Analyzer?Well, mostly. A mixed-signal oscilloscope features analog channels (usually 2 to 4) and digital channels (usually 8 to 16). On both types of channels, data is sampled at the MSO’s maximum sampling rate, 1GHz, typically. The sampling clock is usually generated internally by the MSO. In other words, the reference time base for sampling is not correlated with the data. This is what is referred to as “timing analysis.” And of course, the logic analyzer’s vertical signal resolution is reduced to 1 bit for the digital channels.

MSOs are able to perform some of the functionality traditionally reserved for LAs:

• Timing analysis on digital signals.

• Ability to see more than 2 or 4 channels; on modern MSO, 16 digital inputs are available.

• Digital signal integrity check.

In this respect, being able to visualize both the analog extension of a digital signal and its digital version on the same

screen is certainly an improvement compared to using a scope and a logic analyzer separately.

With electronic systems evolving towards more complexity, debugging often involves finding a mix of analog and logic problems. An MSO’s triggering can be defined by either type of signal. Repetitive (oscilloscope-like) or single-shot (logic analyzer-like) types of display can be used as well. But displaying both analog and digital recording on the same screen as time-correlated data is one of the biggest advantages of MSOs.

MSOs in Need When you think you need a logic analyzer, consider the following:

1. Logic analyzers have a larger number of digital channels than MSOs.

Traditional bench-top logic analyzers can count up to 128 digital channels or more. On MSOs, there are usually a maximum of 16 channels. Application-specific integrated circuit (ASIC) and field-programmable gate array (FPGA) design

engineers, who are heavy LA users, often need 32 to 64 signals and more to decode bus transactions or visualize the internals of a FPGA. But for 80 to 90 percent of the time, however, and even if you are involved in IC design, 16 digital channels are plenty. The rare 1 to 10 percent cases where you’d like to see 100 digital signals in parallel may not justify the investment in a high-end 100-channel logic analyzer which can cost over $20,000.

FPGA design is an area where large channel-count logic analyzers used to be basic equipment for debugging. Adding a connector on board and observing the chip through its input-output, or even putting a debug connector on chip-to-chip interconnections was very useful for troubleshooting the design. But thanks to its programmable nature, FPGAs allow many internal nodes to be monitored by simply routing them on to the input-outputs connected to the LA.

Things have changed; the FPGA world is getting so advanced that observing chip behavior through external digital input-outputs may not make much sense any more, even if you can see 100 of them in parallel. Today, an FPGA may run at over 300MHz internally, and putting a 100- pin high-speed parallel connector on a board brings excessive board constraints (noise, number of layers, crosstalk, etc.) In addition, the chip input-output buffers sometimes are unable to run at the same speed as the internals of the chip. Other approaches, such as using embedded logic analyzers or software-based

debugging, have now become far more efficient and cost effective.

The “number of digital channels advantage” of logic analyzers versus MSOs must be considered cautiously. 16 to 32 digital lines will be enough for most engineers. Logic analyzers with 68 to 100 or even more channels can make a difference where there is an absolute need to see more digital signals in parallel. However, this must be carefully balanced with the constraints of adding the required debug connector to a system. In a context where the digital complexity shifts towards inside the chip, it is increasingly difficult to probe high- frequency signals without creating signal or data integrity issues. For this reason, the investment of usually less than $20,000 in a logic analyzer with a large channel count may be worthwhile.

2. Logic analyzers have a larger memory than MSOs.

While there may be exceptions since MSO equipment is constantly evolving, one potential strength of a logic analyzer is that it can justify its addition to an existing MSO setup because it helps in seeing a larger window of time before and after a triggering event. Seeing a larger time of execution of a digital system is of great value during debug. It has the potential to speed up an understanding of why a bug occurs and hence speed up bug correction. It can pay for itself rather quickly! Additionally, a large total available memory size in a logic analyzer

“The FPGA world is so advanced that observing

chip behavior through external digital input-outputs may not make much sense any more.”

1010


















of analog and logic

problems.”





11

TECH REPORT

11

















of analog and logic

problems.”





www.RigolAnalyzer.com

http://bit.ly/YrfSPW

http://bit.ly/1BnRBbm

1414


GOING BEYOND SOURCING AND MEASURING Higher Currents

By David Wyban Keithley Instruments

High-power test applications, such as characterizing solar cells, power management devices, high-brightness

LEDs, and radio-frequency (RF) power transistors, often require high currents, sometimes as much as 40A or even higher for power metal-oxide semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs), which can require currents in excess of 100A. However, the maximum DC current that a single supply is specified to handle is typically limited. This spec limit is typically dependent on the power supply’s design, the safe operating area of the discrete components used in the instrument, the spacing of the metal lines on the internal printed circuit board, and so on. If you need to increase the amount of current sourced, and you use a SMU (source measure unit) instrument, you can employ several test modes and multiple channels.

the SpecSOURCING AND MEASURING Higher Currents

15

TECH REPORT

15

GOING BEYOND SOURCING AND MEASURING Higher Currents

By David Wyban Keithley Instruments

High-power test applications, such as characterizing solar cells, power management devices, high-brightness

LEDs, and radio-frequency (RF) power transistors, often require high currents, sometimes as much as 40A or even higher for power metal-oxide semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs), which can require currents in excess of 100A. However, the maximum DC current that a single supply is specified to handle is typically limited. This spec limit is typically dependent on the power supply’s design, the safe operating area of the discrete components used in the instrument, the spacing of the metal lines on the internal printed circuit board, and so on. If you need to increase the amount of current sourced, and you use a SMU (source measure unit) instrument, you can employ several test modes and multiple channels.

the SpecSOURCING AND MEASURING Higher Currents

1616




















Table 1.

Figure 1.

17

TECH REPORT

17



















Table 1.

Figure 1.

1818


prevent user contact with live circuits. Additional protection techniques are needed to prevent damage to the test setup or the DUT. The multiple pulses must be tightly synchronized (with nanosecond precision) so that one piece of equipment is not applying power and damaging units that are not yet turned on.

Figure 2 shows the results of an experiment in which Keithley engineers used a single SMU instrument to generate a 10A pulse; the results were observed on an oscilloscope. A high power precision resistor (0.01W, ±0.25%, KRL R-3274) was used as the test DUT with a pulse width of 300 microseconds. The oscilloscope showed a nearly square waveform of 0.1V (10A × 0.01 ohm) in amplitude and 300 microsecond width. Combining four SMU instruments in parallel to pulse 40A across the same DUT resulted in a waveform of 0.4V magnitude with excellent synchronization (low jitter) between the channels (figure 2). Pulse consistency was verified using the same test setup and pulse waveform.

With the pulse performance verified, the engineers programmed a pulse sweep that combined four SMU instruments and took an I-V curve on a P-N diode DUT (figure 3). Note the correlation of the one-SMU instrument DC sweeps up to 3A with the one-SMU instrument pulse sweep up to 10A. Then, the engineers extended the achievable I-V curve up to 40A.

This experiment verified the validity of combining four SMU instrument channels and pulsing to achieve 40A on two-

PLEASE REPLACE THIS IMAGE / BLURRY

Figure 2.

Figure 3.

terminal devices (resistor and diode). With certain modifications, this technique is equally valid when applied to testing a three-terminal device, such as a high-power MOSFET.

Several implementation factors are critical to maximizing the accuracy and precision of the results obtained using this multi-SMU instrument pulsed sweep approach:

• Using source readback: An SMU instrument has both source and measure functions built into the same unit, so it’s capable of reading back the actual value of the applied voltage using its measurement circuitry. The programmed value for the source voltage may not be the same as the voltage actually applied to the DUT; with multiple SMU instruments in parallel, the source offsets may add up to be quite significant, so using source readback provides a clearer picture of the level of voltage actually being sourced, not just the voltage that’s been programmed.

• Making four-wire measurements: Four-wire (Kelvin) measurements are necessary when doing high-current testing because this technique bypasses the voltage drop in the test leads by bringing two very high-impedance voltage sense leads out to the DUT. With very little current flowing into the SENSE leads, the voltage seen by the SENSE terminals is virtually the same as the voltage developed across the unknown resistance. At 40A levels, even a small

resistance, such as 10 milliohms in the test cable, can generate a voltage drop of 0.4V. So if the SMU instrument is forcing 1V at 40A current and the cable resistance is 10 milliohms and there are two test leads, the DUT might only receive a voltage of 0.2V, with 0.8V dropped across the test cables. Unlike source readback, which primarily impacts just the source values, making four-wire measurements will result in significantly better accuracy on both the sourced and measured values because they eliminate the voltage drop in the current-carrying wires that would otherwise affect the measurement.

• Putting no more than one voltage source at each DUT node: It is common in many test sequences to perform voltage sweeps (force voltage) and measure current (FVMI). In the case where more than one SMU instrument is connected in parallel to a single terminal of the device, the obvious implementation would be to have all of the SMU instruments in voltage-source mode and measure current. However, three factors must be considered. First, SMU instruments when sourcing voltage are in a very low-impedance state. Second, DUTs can have impedances higher than an SMU instrument that’s in voltage-source mode. The DUT’s impedance can be static or dynamic, changing during the test sequence. Third, even when all SMU instruments in parallel are programmed to output the same voltage, small variations between

“Keithley engineers

programmed a pulse sweep that combined

four SMU instruments.”

19

TECH REPORT

19

prevent user contact with live circuits. Additional protection techniques are needed to prevent damage to the test setup or the DUT. The multiple pulses must be tightly synchronized (with nanosecond precision) so that one piece of equipment is not applying power and damaging units that are not yet turned on.

Figure 2 shows the results of an experiment in which Keithley engineers used a single SMU instrument to generate a 10A pulse; the results were observed on an oscilloscope. A high power precision resistor (0.01W, ±0.25%, KRL R-3274) was used as the test DUT with a pulse width of 300 microseconds. The oscilloscope showed a nearly square waveform of 0.1V (10A × 0.01 ohm) in amplitude and 300 microsecond width. Combining four SMU instruments in parallel to pulse 40A across the same DUT resulted in a waveform of 0.4V magnitude with excellent synchronization (low jitter) between the channels (figure 2). Pulse consistency was verified using the same test setup and pulse waveform.

With the pulse performance verified, the engineers programmed a pulse sweep that combined four SMU instruments and took an I-V curve on a P-N diode DUT (figure 3). Note the correlation of the one-SMU instrument DC sweeps up to 3A with the one-SMU instrument pulse sweep up to 10A. Then, the engineers extended the achievable I-V curve up to 40A.

This experiment verified the validity of combining four SMU instrument channels and pulsing to achieve 40A on two-

PLEASE REPLACE THIS IMAGE / BLURRY

Figure 2.

Figure 3.

terminal devices (resistor and diode). With certain modifications, this technique is equally valid when applied to testing a three-terminal device, such as a high-power MOSFET.

Several implementation factors are critical to maximizing the accuracy and precision of the results obtained using this multi-SMU instrument pulsed sweep approach:

• Using source readback: An SMU instrument has both source and measure functions built into the same unit, so it’s capable of reading back the actual value of the applied voltage using its measurement circuitry. The programmed value for the source voltage may not be the same as the voltage actually applied to the DUT; with multiple SMU instruments in parallel, the source offsets may add up to be quite significant, so using source readback provides a clearer picture of the level of voltage actually being sourced, not just the voltage that’s been programmed.

• Making four-wire measurements: Four-wire (Kelvin) measurements are necessary when doing high-current testing because this technique bypasses the voltage drop in the test leads by bringing two very high-impedance voltage sense leads out to the DUT. With very little current flowing into the SENSE leads, the voltage seen by the SENSE terminals is virtually the same as the voltage developed across the unknown resistance. At 40A levels, even a small

resistance, such as 10 milliohms in the test cable, can generate a voltage drop of 0.4V. So if the SMU instrument is forcing 1V at 40A current and the cable resistance is 10 milliohms and there are two test leads, the DUT might only receive a voltage of 0.2V, with 0.8V dropped across the test cables. Unlike source readback, which primarily impacts just the source values, making four-wire measurements will result in significantly better accuracy on both the sourced and measured values because they eliminate the voltage drop in the current-carrying wires that would otherwise affect the measurement.

• Putting no more than one voltage source at each DUT node: It is common in many test sequences to perform voltage sweeps (force voltage) and measure current (FVMI). In the case where more than one SMU instrument is connected in parallel to a single terminal of the device, the obvious implementation would be to have all of the SMU instruments in voltage-source mode and measure current. However, three factors must be considered. First, SMU instruments when sourcing voltage are in a very low-impedance state. Second, DUTs can have impedances higher than an SMU instrument that’s in voltage-source mode. The DUT’s impedance can be static or dynamic, changing during the test sequence. Third, even when all SMU instruments in parallel are programmed to output the same voltage, small variations between

“Keithley engineers

programmed a pulse sweep that combined

four SMU instruments.”

2020


SMUs related to the instruments’ voltage source accuracy mean that one of the SMU channels will be at a slightly lower voltage (millivolt order of magnitude) than the others. So, if three SMU instruments are connected in parallel to one terminal of a DUT, and each SMU instrument is forcing voltage and outputting near-maximum currents, and the DUT is in a high-impedance state, then all current will go to the SMU instrument that is sourcing the slightly lower voltage, which will most likely damage it. Therefore, when connecting SMU instruments in parallel to a single terminal of a DUT, only one SMU instrument should be sourcing voltage. Refer to figure 4 for both correct and incorrect approaches to connecting SMU instruments in parallel.

• Mitigating excessive energy dissipation due to contact failure: When you connect two SMU instruments with the same output capacity in parallel to a single node in the circuit, one SMU instrument must be able to sink all of the current being output by the other SMU instrument. This scenario can occur, for example, when one of the leads breaks contact with the device (such as when the lead is accidentally disconnected or a contact isn’t made properly). That means there is a short period during which one SMU instrument must sink all the current from the other instrument. However, when there are more than two SMU instruments connected in parallel at a single circuit node, a single SMU instrument cannot sink all of the current coming from the other SMU instruments. The SMU instrument that

will be forced to sink current if there’s a break in contact with the device is the one at the lowest voltage or lowest impedance, most likely the one sourcing voltage. In order to protect the signal input of the SMU instrument forcing voltage, a diode such as the 1N5820 can be used. A diode is preferable because a fuse would react too slowly to provide protection and a resistor will cause too large of a voltage drop across it. A diode offers a much faster response than a fuse and has a much smaller maximum voltage drop across it (typically around 1V) than a resistor. However, to be truly safe when using this method, a diode should be used to protect all the SMUs in the configuration. If the DUT goes into a high-impedance state, the current sources will try to force their current into the voltage-sourcing SMU instrument, but that would not be possible because the voltage-sourcing SMU instrument is protected by a diode. That would cause the current-sourcing SMU instruments to increase their output voltage until they reached their voltage limit. Once this occurred, the current sources would go into compliance and become voltage sources themselves. That would mean there were now multiple voltage sources in parallel. Even if their voltage limits were set to exactly the same value, their outputs would still likely be very slightly different, and they would damage each other.

It’s important to be aware that putting a diode on each and every SMU instrument in the configuration has some

consequences. First, the inclusion of any diodes in the configuration means this method can only be used to source power but not to sink it because the diodes will not allow current to pass into the SMU instrument. The second consequence is that, in order to obtain maximum output voltage, you will need to use four-wire connections on the current sources around the diode because the voltage drop across diode may cause the current sources to reach compliance prematurely. At these current levels, the typical voltage drop across a diode is about 1V.

Summary

SMU instruments offer a simple, highly integrated approach to designing test and measurement systems for a wide range of electronic devices. For the growing number of test applications that demand the ability to source or measure higher currents, the techniques outlined in this article offer useful, cost-effective alternatives to combining separate sources and measurement instruments.

For more information on techniques for implementing high-current test configurations, download Keithley’s Application Note #3047, “Methods to Achieve Higher Currents from I-V Measurement Equipment,” available at www.keithley.com/data?asset=52630.

Figure 4. Incorrect and correct configurations for connecting SMU instruments in parallel.

a) This incorrect configuration could allow high currents to damage the SMU instrument that is sourcing a slightly lower voltage than the other one.

b) This quasi-Kelvin configuration, although it doesn’t run the same risk of instrument damage as the first configuration, introduces additional error into the measurement that must be accounted for in the system’s error budget and limits the maximum output of the SMU instrument.

c) This “hybrid” approach also prevents SMU instrument damage and allows adding SMU current sources as needed to reach the application’s current sourcing requirements.

“A diode offers a much faster response than a fuse and has

a much smaller maximum voltage drop across it than a resistor.”

21

TECH REPORT

21

SMUs related to the instruments’ voltage source accuracy mean that one of the SMU channels will be at a slightly lower voltage (millivolt order of magnitude) than the others. So, if three SMU instruments are connected in parallel to one terminal of a DUT, and each SMU instrument is forcing voltage and outputting near-maximum currents, and the DUT is in a high-impedance state, then all current will go to the SMU instrument that is sourcing the slightly lower voltage, which will most likely damage it. Therefore, when connecting SMU instruments in parallel to a single terminal of a DUT, only one SMU instrument should be sourcing voltage. Refer to figure 4 for both correct and incorrect approaches to connecting SMU instruments in parallel.

• Mitigating excessive energy dissipation due to contact failure: When you connect two SMU instruments with the same output capacity in parallel to a single node in the circuit, one SMU instrument must be able to sink all of the current being output by the other SMU instrument. This scenario can occur, for example, when one of the leads breaks contact with the device (such as when the lead is accidentally disconnected or a contact isn’t made properly). That means there is a short period during which one SMU instrument must sink all the current from the other instrument. However, when there are more than two SMU instruments connected in parallel at a single circuit node, a single SMU instrument cannot sink all of the current coming from the other SMU instruments. The SMU instrument that

will be forced to sink current if there’s a break in contact with the device is the one at the lowest voltage or lowest impedance, most likely the one sourcing voltage. In order to protect the signal input of the SMU instrument forcing voltage, a diode such as the 1N5820 can be used. A diode is preferable because a fuse would react too slowly to provide protection and a resistor will cause too large of a voltage drop across it. A diode offers a much faster response than a fuse and has a much smaller maximum voltage drop across it (typically around 1V) than a resistor. However, to be truly safe when using this method, a diode should be used to protect all the SMUs in the configuration. If the DUT goes into a high-impedance state, the current sources will try to force their current into the voltage-sourcing SMU instrument, but that would not be possible because the voltage-sourcing SMU instrument is protected by a diode. That would cause the current-sourcing SMU instruments to increase their output voltage until they reached their voltage limit. Once this occurred, the current sources would go into compliance and become voltage sources themselves. That would mean there were now multiple voltage sources in parallel. Even if their voltage limits were set to exactly the same value, their outputs would still likely be very slightly different, and they would damage each other.

It’s important to be aware that putting a diode on each and every SMU instrument in the configuration has some

consequences. First, the inclusion of any diodes in the configuration means this method can only be used to source power but not to sink it because the diodes will not allow current to pass into the SMU instrument. The second consequence is that, in order to obtain maximum output voltage, you will need to use four-wire connections on the current sources around the diode because the voltage drop across diode may cause the current sources to reach compliance prematurely. At these current levels, the typical voltage drop across a diode is about 1V.

Summary

SMU instruments offer a simple, highly integrated approach to designing test and measurement systems for a wide range of electronic devices. For the growing number of test applications that demand the ability to source or measure higher currents, the techniques outlined in this article offer useful, cost-effective alternatives to combining separate sources and measurement instruments.

For more information on techniques for implementing high-current test configurations, download Keithley’s Application Note #3047, “Methods to Achieve Higher Currents from I-V Measurement Equipment,” available at www.keithley.com/data?asset=52630.

Figure 4. Incorrect and correct configurations for connecting SMU instruments in parallel.

a) This incorrect configuration could allow high currents to damage the SMU instrument that is sourcing a slightly lower voltage than the other one.

b) This quasi-Kelvin configuration, although it doesn’t run the same risk of instrument damage as the first configuration, introduces additional error into the measurement that must be accounted for in the system’s error budget and limits the maximum output of the SMU instrument.

c) This “hybrid” approach also prevents SMU instrument damage and allows adding SMU current sources as needed to reach the application’s current sourcing requirements.

“A diode offers a much faster response than a fuse and has

a much smaller maximum voltage drop across it than a resistor.”

http://www.keithley.com/data?asset=52630

2222


Cabling and Test Fixture SAFETY

In general, test cabling and test connections must all be designed to minimize resistance (R), capacitance (C), and inductance (L) between the DUT and SMU instrument. To minimize resistance, use heavy-gauge wire wherever possible and definitely within the test fixture itself. The gauge required will depend on the level of current being carried; for example, for cabling that must carry 40A, 12-gauge cable is probably necessary. For guidance on choosing cabling for higher current levels, refer to construction industry wire-gauge tables, such as the one available at: www.powerstream.com/Wire_Size.htm. Check the “Maximum Amps for Chassis Wiring” column to find the wire gauge needed to carry the level of current involved.

Low-resistance cabling is critical to preventing instrument damage. Choose cables with resistances of less than 30 milliohms per meter or lower for 10A pulses. Keep cable lengths as short as possible and always use low-inductance cables (such as twisted-pair or low-impedance coax types), heavy-gauge cable in order to limit the voltage drop across the leads. Ensure the voltage drop won’t be excessive by checking the SMU instrument’s voltage output headroom spec. For example, if you were using a Keithley Model 2602A SMU instrument to

output 20V, the test leads should have no more than 3V of voltage drop across them to avoid inaccurate results or instrument damage. It is specified for a maximum voltage of 3V between the HI and SENSE HI terminals and a maximum voltage of 3V between LO and SENSE LO.

Although many believe guarding can minimize the effects of cable charging, this is typically more of a concern for high-voltage testing than for high-current testing. Four-wire Kelvin connections must be kept as close to the DUT as possible; every millimeter makes a difference.

Also, it should be noted that voltage readback should be done with the SMU instrument that’s forcing voltage, because the current-sourcing instruments’ voltage readings will all vary quite a bit due to the connections, and will differ from what is actually seen at the DUT.

The jacks used on the test fixture should be of known high quality. For example, some red jacks use high amounts of ferrous content to produce the red coloring, which can lead to unacceptably high levels of leakage due to conduction. The resistance between the plugs to the case should be as high as possible and in all cases >1010 ohms.

Many published test setups recommend adding a resistor between the SMU instrument and the device’s gate when testing a field-effect transistor (FET) or IGBT. When pulsing large amounts of current through these kinds of devices, they tend to oscillate. Inserting a resistor on the gate will dampen these oscillations, thereby stabilizing the measurements; because the gate does not draw much current, the resistor does not cause a significant voltage drop.

If voltages in excess of 40V will be used during the test sequence, the test fixture and SMU instruments must have the proper interlock installed and be operated in accordance with normal safety procedures.

Many electrical test systems or instruments are capable of measuring or sourcing hazardous voltage and power levels. It’s also possible, under single fault conditions (e.g., a programming error or an instrument failure), to output hazardous levels even when the system indicates no hazard is present. These high levels make it essential to protect operators from any of these hazards at all times.

Protection methods include:

• Verify the operation of the test setup carefully before it is put into service.

• Design test fixtures to prevent operator contact with any hazardous circuit.

• Make sure the device under test is fully enclosed to protect the operator from any flying debris.

• Double insulate all electrical connections that an operator could touch. Double insulation ensures the operator is still protected even if one insulation layer fails.

• Use high reliability, fail-safe interlock switches to disconnect power sources when a test fixture cover is opened.

• Where possible, use automated handlers so operators do not require access to the inside of the test fixture or have a need to open guards.

• Provide proper training to all users of the system so they understand all potential hazards and know how to protect themselves from injury. It’s the responsibility of the test system designers, integrators, and installers to make sure operator and maintenance personnel protection is in place and effective.

23

TECH REPORT

23

Cabling and Test Fixture SAFETY

In general, test cabling and test connections must all be designed to minimize resistance (R), capacitance (C), and inductance (L) between the DUT and SMU instrument. To minimize resistance, use heavy-gauge wire wherever possible and definitely within the test fixture itself. The gauge required will depend on the level of current being carried; for example, for cabling that must carry 40A, 12-gauge cable is probably necessary. For guidance on choosing cabling for higher current levels, refer to construction industry wire-gauge tables, such as the one available at: www.powerstream.com/Wire_Size.htm. Check the “Maximum Amps for Chassis Wiring” column to find the wire gauge needed to carry the level of current involved.

Low-resistance cabling is critical to preventing instrument damage. Choose cables with resistances of less than 30 milliohms per meter or lower for 10A pulses. Keep cable lengths as short as possible and always use low-inductance cables (such as twisted-pair or low-impedance coax types), heavy-gauge cable in order to limit the voltage drop across the leads. Ensure the voltage drop won’t be excessive by checking the SMU instrument’s voltage output headroom spec. For example, if you were using a Keithley Model 2602A SMU instrument to

output 20V, the test leads should have no more than 3V of voltage drop across them to avoid inaccurate results or instrument damage. It is specified for a maximum voltage of 3V between the HI and SENSE HI terminals and a maximum voltage of 3V between LO and SENSE LO.

Although many believe guarding can minimize the effects of cable charging, this is typically more of a concern for high-voltage testing than for high-current testing. Four-wire Kelvin connections must be kept as close to the DUT as possible; every millimeter makes a difference.

Also, it should be noted that voltage readback should be done with the SMU instrument that’s forcing voltage, because the current-sourcing instruments’ voltage readings will all vary quite a bit due to the connections, and will differ from what is actually seen at the DUT.

The jacks used on the test fixture should be of known high quality. For example, some red jacks use high amounts of ferrous content to produce the red coloring, which can lead to unacceptably high levels of leakage due to conduction. The resistance between the plugs to the case should be as high as possible and in all cases >1010 ohms.

Many published test setups recommend adding a resistor between the SMU instrument and the device’s gate when testing a field-effect transistor (FET) or IGBT. When pulsing large amounts of current through these kinds of devices, they tend to oscillate. Inserting a resistor on the gate will dampen these oscillations, thereby stabilizing the measurements; because the gate does not draw much current, the resistor does not cause a significant voltage drop.

If voltages in excess of 40V will be used during the test sequence, the test fixture and SMU instruments must have the proper interlock installed and be operated in accordance with normal safety procedures.

Many electrical test systems or instruments are capable of measuring or sourcing hazardous voltage and power levels. It’s also possible, under single fault conditions (e.g., a programming error or an instrument failure), to output hazardous levels even when the system indicates no hazard is present. These high levels make it essential to protect operators from any of these hazards at all times.

Protection methods include:

• Verify the operation of the test setup carefully before it is put into service.

• Design test fixtures to prevent operator contact with any hazardous circuit.

• Make sure the device under test is fully enclosed to protect the operator from any flying debris.

• Double insulate all electrical connections that an operator could touch. Double insulation ensures the operator is still protected even if one insulation layer fails.

• Use high reliability, fail-safe interlock switches to disconnect power sources when a test fixture cover is opened.

• Where possible, use automated handlers so operators do not require access to the inside of the test fixture or have a need to open guards.

• Provide proper training to all users of the system so they understand all potential hazards and know how to protect themselves from injury. It’s the responsibility of the test system designers, integrators, and installers to make sure operator and maintenance personnel protection is in place and effective.

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26


Interview with Adam Fleder, President of TEGAM

TEGAM Turns Legacy Products into Niche Market Expertise

TEGAM specializes in test, measurement, and calibration instruments,

which they design, manufacture, and support. The company is

internationally recognized for its offering of radio frequency (RF)

power sensor calibration systems, RF attenuation measurement

systems, ratio standards, and ohm meters. In addition, the company

supplies inductance-capacitance-resistance (LCR) meters and

impedance bridges, arbitrary waveform generators, high-voltage

amplifiers, microelectromechanical systems (MEMS) engine drivers,

handheld thermometers, humidity meters, and other test and

measurement solutions.

In an interview with EEWeb, Adam Fleder, president of TEGAM, discussed

the company’s initiation of product development, their research and

development for power sensors, and extending their capability in

microwave power measurement. Fleder also discussed measurement

uncertainty as well as how the company leverages their expertise

with micro-ohms.

RF Thermistor Power Meter (Model 1830A)

INDUSTRY INTERVIEW

27

Interview with Adam Fleder, President of TEGAM

TEGAM Turns Legacy Products into Niche Market Expertise

TEGAM specializes in test, measurement, and calibration instruments,

which they design, manufacture, and support. The company is

internationally recognized for its offering of radio frequency (RF)

power sensor calibration systems, RF attenuation measurement

systems, ratio standards, and ohm meters. In addition, the company

supplies inductance-capacitance-resistance (LCR) meters and

impedance bridges, arbitrary waveform generators, high-voltage

amplifiers, microelectromechanical systems (MEMS) engine drivers,

handheld thermometers, humidity meters, and other test and

measurement solutions.

In an interview with EEWeb, Adam Fleder, president of TEGAM, discussed

the company’s initiation of product development, their research and

development for power sensors, and extending their capability in

microwave power measurement. Fleder also discussed measurement

uncertainty as well as how the company leverages their expertise

with micro-ohms.

RF Thermistor Power Meter (Model 1830A)

28














last year.”








our specialties.”

INDUSTRY INTERVIEW

29













last year.”








our specialties.”

3030



CURVESA

ND EDGES

Traditional Curve Tracer?What Will Take the Place of the


31

TECH REPORT

31


CURVES

AN

D EDGESTraditional Curve Tracer?What Will Take the Place of the


3232


DAWN OF THE PARAMETRIC CURVE TRACERIn response to these characterization challenges, device designers are turning to a new concept known as a parametric curve tracer, which combines the real-time, interactive simplicity of a curve tracer with the high-precision and parametric extraction capabilities of a modern parametric analyzer. In addition to one or more source measure unit (SMU) instruments and semiconductor characterization instruments, they include cables, a test fixture, software, and test libraries to provide measurements at up to 3000 volts and up to 100 amps. As new test needs evolve, their modular architecture can be

“A parametric curve tracer combines the real-time, interactive simplicity of a

curve tracer with the high-precision capabilities of a modern parametric analyzer.”

“Trace test mode is very handy for quickly determining whether a device

is good or bad.”

Watch Keithley’s short demo on Trace Test Mode

Watch Keithley’s short demo on Parametric Test Mode

reconfigured easily in the field.These parametric configurations offer the power required for the vast majority of high-power device design and development applications, and are optimized to address the characterization and test needs of research, reliability, failure analysis, and power-device applications engineers as well as power device designers, incoming inspection technicians, and many others.

TEST MODESParametric curve tracers offer two modes of operation: trace test mode and parametric test mode. Trace test mode presents an interface similar to the controls and display found on a traditional curve tracer. It allows for rapid generation of device characteristics and for interactive operation based on viewing the results in the graph. It incorporates knowledge of many device types and tests, which speeds and simplifies test setup. An on-screen slider provides real-time control and acts like the knob found on the traditional curve tracer. Trace test mode is very handy for quickly determining whether a device is good or bad. This mode is often used during device development or failure analysis.

33

TECH REPORT

33

DAWN OF THE PARAMETRIC CURVE TRACERIn response to these characterization challenges, device designers are turning to a new concept known as a parametric curve tracer, which combines the real-time, interactive simplicity of a curve tracer with the high-precision and parametric extraction capabilities of a modern parametric analyzer. In addition to one or more source measure unit (SMU) instruments and semiconductor characterization instruments, they include cables, a test fixture, software, and test libraries to provide measurements at up to 3000 volts and up to 100 amps. As new test needs evolve, their modular architecture can be

“A parametric curve tracer combines the real-time, interactive simplicity of a

curve tracer with the high-precision capabilities of a modern parametric analyzer.”

“Trace test mode is very handy for quickly determining whether a device

is good or bad.”

Watch Keithley’s short demo on Trace Test Mode

Watch Keithley’s short demo on Parametric Test Mode

reconfigured easily in the field.These parametric configurations offer the power required for the vast majority of high-power device design and development applications, and are optimized to address the characterization and test needs of research, reliability, failure analysis, and power-device applications engineers as well as power device designers, incoming inspection technicians, and many others.

TEST MODESParametric curve tracers offer two modes of operation: trace test mode and parametric test mode. Trace test mode presents an interface similar to the controls and display found on a traditional curve tracer. It allows for rapid generation of device characteristics and for interactive operation based on viewing the results in the graph. It incorporates knowledge of many device types and tests, which speeds and simplifies test setup. An on-screen slider provides real-time control and acts like the knob found on the traditional curve tracer. Trace test mode is very handy for quickly determining whether a device is good or bad. This mode is often used during device development or failure analysis.

http://www.keithley.com/centralized_display?mn=PCT&assetid=57665

http://www.keithley.com/centralized_display?mn=PCT&assetid=57829

3434


David Wyban is an applications engineer with Keithley Instruments, Inc., Cleveland, Ohio, which is part of the Tektronix test and measurement portfolio. He joined the company in 2006, working on the team that developed Keithley’s line of System SourceMeter® instruments. He holds a bachelor’s degree in electrical and computer engineering from Ohio State University. He can be reached at [email protected].

“Once configured, an entire suite of tests can run autonomously

without operator intervention.”

Parametric test mode offers access to all of the advanced capabilities of the SMU instruments within the PCT, allowing users to specify exactly how a test is to be performed. Built-in test libraries provide support for the most common device and test types; a vector math formulator supports accurate parameter extraction on these devices. Once configured, an entire suite of tests can run autonomously without operator intervention. This mode is often used in device qualification, process monitoring and datasheet generation applications.

CONCLUSIONLack of availability and emerging high-power test challenges have made traditional curve tracers untenable solutions for power device characterization. Fortunately, the extended capabilities that parametric curve tracers offer mean that engineers can be confident solutions for their emerging characterization challenges are available.

http://bit.ly/1jZ9pW5

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David ElienVP of Marketing & Business

Development, Cree, Inc.

New LED Filament Tower

Cutting Edge Flatscreen Technologies

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Designing forDurability

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Date post:	03-Apr-2016
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Modern Test and Measure: September 2014

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