MRAM - present state-of-the-art and future challenges · PDF fileMRAM - present...

MRAM MRAM -- present statepresent state--ofof--thethe--art art and future challengesand future challenges

Dr G. PanDr G. Pan

CRIST CRIST School of Computing, Communication & Electronics School of Computing, Communication & Electronics Faculty of Technology,Faculty of Technology,University of Plymouth, University of Plymouth, Plymouth, PL4 8AA, UKPlymouth, PL4 8AA, UK

16th January 2006 DSNetUK Workshop

OutlineOutline

The case for MRAM and its status in 2003/4 and todayThe case for MRAM and its status in 2003/4 and today

Different versions of MRAMDifferent versions of MRAM•• Field writing MRAM Field writing MRAM –– earlier Motorola versionearlier Motorola version•• Toggled MRAM Toggled MRAM –– 22ndnd generation Motorola versiongeneration Motorola version•• TAS MRAM TAS MRAM –– FP5 Strep project NEXTFP5 Strep project NEXT•• Spin torque MRAM Spin torque MRAM –– Best approach to dateBest approach to date•• EMAC MRAM EMAC MRAM –– FP6 Strep project EMACFP6 Strep project EMAC

MRAM research activities at CRISTMRAM research activities at CRIST

ConclusionsConclusions


IEEE Distinguished Lecture, 2004 @ Manchester University


MRAM is on the path to become the universal MRAM is on the path to become the universal memory to replace DRAM, SRAM and Flash memory to replace DRAM, SRAM and Flash memorymemory

MRAM is the enabling technology for computer MRAM is the enabling technology for computer systems on a single chipsystems on a single chip

MRAM is the “Holy Grail” of memoryMRAM is the “Holy Grail” of memory


Major industrial players in R&D of MRAM in 2003/4Major industrial players in R&D of MRAM in 2003/4

•• NVE NVE •• Freescale Semiconductors Inc. (Motorola)Freescale Semiconductors Inc. (Motorola)•• Cypress (SMS)Cypress (SMS)•• Agilent Agilent •• IBM/INFINEON IBM/INFINEON • ST/Philips/ Freescale alliance in Crolles•• AltisAltis•• Grandis Inc.Grandis Inc.•• Renesas TechnologyRenesas Technology•• SONYSONY•• SamsungSamsung•• HitachiHitachi•• Toshiba Toshiba •• …..…..


Status of industrial players in the end of 2005Status of industrial players in the end of 2005

•• NVE NVE •• Freescale Semiconductors Inc. (Motorola)Freescale Semiconductors Inc. (Motorola) xx

•• Cypress(SMS)Cypress(SMS)xx•• Agilent Agilent •• IBM/INFINEON IBM/INFINEON xx•• Altis Altis xx• ST/Philips/ Freescale alliance in Crolles xx

•• Grandis Inc. Grandis Inc. •• Renesas TechnologyRenesas Technology•• SONYSONY -- successful demo of 4 kb spin MRAM chipsuccessful demo of 4 kb spin MRAM chip•• SamsungSamsung•• Hitachi Hitachi –– achieved low current writing for spin MRAMachieved low current writing for spin MRAM•• Toshiba Toshiba •• …..…..

Joint project on spin MRAM

Spin MRAM is starting to show its commercial potential


Overview of MRAM technologyOverview of MRAM technology

Selling points of MRAMSelling points of MRAM•• NonNon--volatile, faster than SRAM. potentially cheap, low power volatile, faster than SRAM. potentially cheap, low power

consumption and high integration level.consumption and high integration level.

Competing technologies:Competing technologies:•• DRAM, SRAM, Flash memory and other emerging DRAM, SRAM, Flash memory and other emerging

memory technologies such as PCRAM and memory technologies such as PCRAM and FeRAMFeRAM


Key performance indicators of various memory Key performance indicators of various memory technologiestechnologies

poorpoorpoorexcellentRadiation hardness

<200pJ10-200 pJ~ 300 pJ<100pJWriting Energy

0.8-5 V2.5-5 V10-18 V0.3-5 VWriting voltage

6-70 ns40-70 ns40-70 ns2-40 nsAccess time

~ 1 ns~ 1 ns5– 10 µs<2 nsWriting time

100 F28 F22-4 F24-8 F2Bit size

SRAMDRAMFlashMRAM (MTJ)

VolatileNon-Volatile


Field writing MRAM Field writing MRAM –– Motorola Version 1Motorola Version 1

One transistor per cell structure


Writing Writing –– 2D magnetic selection2D magnetic selection•• is accomplished by Iis accomplished by IBB+I+IDD . Each line is ½ selected and . Each line is ½ selected and

provides half of the field required to switch the free layer of provides half of the field required to switch the free layer of a cell.a cell.

ID

IB+ID

Switching threshold

IB


Major features:Major features:•• NonNon--volatile.volatile.•• One transistor per cell architecture. One transistor per cell architecture.

Major limitations of FW MRAM:Major limitations of FW MRAM:Because writing is iBecause writing is i--field based (2D magnetic selection), it has the field based (2D magnetic selection), it has the

following limitations:following limitations:•• 1/2 selected lines could cause addressing errors due to switchin1/2 selected lines could cause addressing errors due to switching g

field distribution of the cells.field distribution of the cells.•• FW limits the level of integration, difficult to implement at hiFW limits the level of integration, difficult to implement at high gh

density due to stray field cross interference.density due to stray field cross interference.•• No parallel writing at high density due to cross interferences.No parallel writing at high density due to cross interferences.•• High power consumption due to inductive writing, increasing withHigh power consumption due to inductive writing, increasing with

reduction of cell sizes, typical writing current more than 10 reduction of cell sizes, typical writing current more than 10 mAmA..


Toggled MRAM Toggled MRAM –– Motorola version 2Motorola version 2

•• Proposed at Motorola by the late Leonid Proposed at Motorola by the late Leonid SavtchenkoSavtchenko: US Patent : US Patent 6,549,9066,549,906

•• Write operation is a rotation of a balanced SAFWrite operation is a rotation of a balanced SAF•• Toggle rather than “forced” writeToggle rather than “forced” write

H=0 H>0

SAF free layer

Spin Flop of a SAF free layer


Toggled MRAM switching sequenceToggled MRAM switching sequence

in 2004


Advantages of toggled MRAMAdvantages of toggled MRAM

limitations of toggled MRAMlimitations of toggled MRAM

How to achieve small writing current is still an issue, particularly at small cell sizes


Thermally assisted MRAM Thermally assisted MRAM (TAS MRAM)(TAS MRAM)

Advantages:• Semi-1D magnetic selection• Less likely to have addressing errors by ½ -selection as in FW MRAM due to smaller writing current at high temperature.• Less power consumption.

Drawbacks:One more wire than FW for writing.

Challenges:How to achieving high heating efficiency and low heating current.

Ih

Iw


Spin torque MRAMSpin torque MRAMBasic principle:If a highly spin polarised current flows into a ferromagnetic layer, there is a 'torque' applied by the injected electron spins on the local moment that tends to induce a precession of the local magnetisationalong this spin direction.

Transistor ON

Pinned layer

Tunnel barrier

AF layer

Top electrode

1-D magnetic selection, spin torque writing with much less current.

I


Spin polarised current induced magnetic switchingSpin polarised current induced magnetic switching

This phenomenon was predicted by Slonczeski* and Berger** respectively in 1996, and subsequently proved experimentally by various researchers since 2000.

Precession Spin transfer Damping

* US patent 5,695,864, **


Advantages of spin torque writingAdvantages of spin torque writing•• Retaining all the good features of Retaining all the good features of the previous versions the previous versions

of MRAM of MRAM •• No addressing errorsNo addressing errors: The writing process uses a much : The writing process uses a much

smaller current that is only flowing through the addressed smaller current that is only flowing through the addressed cell. cell.

•• MultiMulti--bit (parallel) writingbit (parallel) writing: As it has no half selection : As it has no half selection issue, it will not affect adjacent cells, fully compatible with issue, it will not affect adjacent cells, fully compatible with parallel writing, whatever the integration level.parallel writing, whatever the integration level.

•• Low power consumptionLow power consumption: The write current being : The write current being significantly reduced, the power consumption of writing significantly reduced, the power consumption of writing and reading operation is minimised.and reading operation is minimised.

•• Potentially high integration level: Potentially high integration level: if writing current can if writing current can be significantly reduced.be significantly reduced.


Key parametersKey parameters–– Junction RA and critical current density for Junction RA and critical current density for switching, switching, JJcc

0.01

0.1

1

10

100

1.00E+04 1.00E+05 1.00E+06 1.00E+07 1.00E+08

Current Density (A/cm 2)

Req

uire

d Tr

ansi

stor

Le

ngth

(µ

m)

020406080100120140160180

Writ

ing

Ener

gy (p

J)

The scalability of spin MRAM is determined by the required transistor length due to saturation current of CMOS transistors. Jc needs to be reduced at least down to 1MA/cm2 for achieving a competitive bit density.


Typical parameter values Typical parameter values •• If critical current density for switching is 10MA/cmIf critical current density for switching is 10MA/cm22).).•• For a junction size of 0.2x0.2 =0.04 For a junction size of 0.2x0.2 =0.04 µµmm22, the required minimum , the required minimum

writing current is 4 writing current is 4 mAmA..•• The maximum allowed writing current is constrained by the The maximum allowed writing current is constrained by the

junction breakdown voltage, junction breakdown voltage, VV < 0.8 V< 0.8 VBB..J < 0.8 VJ < 0.8 VBB/RA./RA.

•• For VFor VBB= 0.5 V, RA < 4 = 0.5 V, RA < 4 ΩΩ--µµmm22. . •• If RA is 3 If RA is 3 ΩΩ--µµmm22, J>133 mA/, J>133 mA/µµmm22. The CIMS writing current is 5 . The CIMS writing current is 5

mAmA for cell size of 0.04 for cell size of 0.04 µµmm22, which requires the CMOS to allow , which requires the CMOS to allow such a current to go through as well. For CMOS with such a current to go through as well. For CMOS with IIsatsat of 500 of 500 µµAA//µµm, the CMOS length will be 10 m, the CMOS length will be 10 µµm.m.

•• JJc needs to be reduced at least by one order of magnitude.needs to be reduced at least by one order of magnitude.


Technical challenges for spin torque MRAMTechnical challenges for spin torque MRAM

•• The reduction of the critical current density. At least The reduction of the critical current density. At least 1MA/cm2. Lower . Lower JJcc means higher integration level and means higher integration level and lower power consumption. lower power consumption.

•• MTJsMTJs with low RA, high MR and with low RA, high MR and VVbb, for improved process , for improved process tolerance, which will make the MRAM technology more tolerance, which will make the MRAM technology more competitive than its rivals.competitive than its rivals.


The discovery of The discovery of MgOMgO MTJMTJ•• MgOMgO MTJ with 1000% MR was theoretically predicted by MTJ with 1000% MR was theoretically predicted by

MathonMathon et al & Butler et al in 2001 and experimentally realised et al & Butler et al in 2001 and experimentally realised by IBM and by IBM and AnelvaAnelva in 2002 and 2004, respectively.in 2002 and 2004, respectively.

•• Crystalline tunnelling barrier produces much higher MR ratio forCrystalline tunnelling barrier produces much higher MR ratio forbetter signal amplitude and reliability, 230% in 2004 and 355% better signal amplitude and reliability, 230% in 2004 and 355% in 2005.in 2005.

•• Higher spin polarisation in writing current for reduced criticalHigher spin polarisation in writing current for reduced criticalcurrent density for switching.current density for switching.

•• Thicker barrier layer for better process tolerance. Thicker barrier layer for better process tolerance.


Low switching current achieved by Grandis Inc. and Low switching current achieved by Grandis Inc. and SingulusSingulus Technologies Technologies

Jc = 2.5 MA/cm2

@ 150% MR


Low switching current density achieved by Hitachi on Low switching current density achieved by Hitachi on MgOMgO

Jc = 0.8 MA/cm2

@ 70% MR


SONY demonstrated 4 kb memory cell for SONY demonstrated 4 kb memory cell for MgOMgO spin torque MRAM spin torque MRAM on 180 nm CMOS process in Dec 2005on 180 nm CMOS process in Dec 2005

Write speed: 2 nsWriting current: 0.2 mAWriting power: 1/30 of FW MRAM


Grandis and Renesas joint projectGrandis and Renesas joint project


SpinSpin--Injection MRAMInjection MRAM

The MRAM idea is based on spin injection through tunnelling barrier, aiming to realise a device based on FM/MgO/Sifollowing the RT spin injection in FM/MgO/GaAs.


MRAM research activities at CRISTMRAM research activities at CRISTDTI MNT project DTI MNT project –– 300mm BIBD MRAM deposition tool, £1.65M in 300mm BIBD MRAM deposition tool, £1.65M in grant value, started in Oct 2005.grant value, started in Oct 2005.

Our roles: Our roles: Film deposition,Film deposition, microfabricationmicrofabrication and characterisation of and characterisation of MTJ films & devices.MTJ films & devices.

Facilities we have: Facilities we have: •• Industrial standard Industrial standard cleanroomcleanroom (class 10, 100 and 1000)(class 10, 100 and 1000)•• SputterSputter--deposition, deposition, microfabricationmicrofabrication (0.8 (0.8 µµm minimum feature size), m minimum feature size), •• Fully computer controlled magnetoFully computer controlled magneto--transport and spin torque measurement transport and spin torque measurement

instruments using instruments using LabviewLabview and and KeithleyKeithley source/measurement meters.source/measurement meters.•• High sensitivity VSMHigh sensitivity VSM•• Magnetic field annealing system for two inch wafers and up to 50Magnetic field annealing system for two inch wafers and up to 5000 00 OeOe..•• LLG spin torque simulation softwareLLG spin torque simulation software•• Electron microscopesElectron microscopes

•• Nordiko 9550 GMR deposition tool Nordiko 9550 GMR deposition tool –– cassette for sixteen 4cassette for sixteen 4--inch inch wafers,wafers, 66--targets, loadtargets, load--locked, semilocked, semi--UHVUHV. .


Nordiko 9550 GMR toolNordiko 9550 GMR tool


ConclusionsConclusionsThe case for MRAM as a universal memory is still valid.The case for MRAM as a universal memory is still valid.The discovery of The discovery of MgOMgO MTJ has brought new life to MRAM.MTJ has brought new life to MRAM.Spin torque MRAM is so far the best known MRAM idea Spin torque MRAM is so far the best known MRAM idea and significant progresses have been made in the past and significant progresses have been made in the past year.year.New materials research, spin engineering and innovations New materials research, spin engineering and innovations are required to further increase the MR and reduce the are required to further increase the MR and reduce the JcJcin order for MRAM to compete with other memory in order for MRAM to compete with other memory technologies.technologies.The search for better MRAM ideas won’t stop at spin The search for better MRAM ideas won’t stop at spin MRAM. Better ideas may be developed as scientific MRAM. Better ideas may be developed as scientific breakthroughs being achieved in spintronics field.breakthroughs being achieved in spintronics field.

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