MS108 Computer System I
Lecture 4
Single Cycle Machine
Prof. Xiaoyao Liang
2015/3/181
NotesNotes
2
3
Basic HardwareBasic Hardware
4
Register FileRegister File
5
MemoryMemory
MIPS ISAMIPS ISA
6
Life of an InstructionLife of an Instruction
7
Reg-Reg ALUReg-Reg ALU
8
Reg-Imm ALUReg-Imm ALU
9
Conflict in Merging Conflict in Merging DatapathDatapath
10
11
ALU DatapathALU Datapath
12
Memory StructureMemory Structure
13
Load/StoreLoad/Store
14
MIPS ControlMIPS Control
15
Conditional Branch (BNEZ)Conditional Branch (BNEZ)
Register Indirect Jump Register Indirect Jump (JR)(JR)
16
Jump and Link (JALR)Jump and Link (JALR)
17
Absolute Jump (J, JAL)Absolute Jump (J, JAL)
18
19
Single Cycle MIPS Single Cycle MIPS DatapathDatapath
20
Single Cycle TimingSingle Cycle Timing
21
Control GenerationControl Generation
22
Control TableControl Table