+ All Categories
Home > Documents > MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte...

MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte...

Date post: 20-Dec-2015
Category:
View: 227 times
Download: 2 times
Share this document with a friend
18
6- 1 TIM - Timer MS_uC / dnd / V08 Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte 32K Byte Burst Flash Burst Flash 64K or 96K 64K or 96K Byte SRAM Byte SRAM 256K or 512K 256K or 512K Byte Burst Byte Burst Flash Flash OTP OTP Mem Mem UART UART I2C I2C SPI SPI TIM TIM RTC RTC EXT. EXT. Bus Bus GPIO GPIO USB USB 2.0FS 2.0FS CAN CAN 2.0B 2.0B Enet Enet MAC MAC PFQ PFQ BC BC DMA DMA INTR INTR Cntl Cntl ARM966E ARM966E CORE CORE w/DSP w/DSP 96 MHz 96 MHz CLK CLK Cntl Cntl ADC ADC LVD LVD BOD BOD PLL PLL JTAG JTAG ETM9 ETM9 STR912FAW44
Transcript
Page 1: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 1

TIM - Timer

MS_uC / dnd / V08

Programming MicrocontrollerTIM - Timer

Autumn term 2007

32K Byte 32K Byte Burst FlashBurst Flash

64K or 96K 64K or 96K Byte SRAM Byte SRAM

256K or 512K 256K or 512K Byte Burst Byte Burst

FlashFlash

OTP OTP MemMem

UARTUARTI2CI2CSPISPITIMTIMRTCRTC

EXT. EXT. Bus Bus

GPIOGPIO

USB USB 2.0FS 2.0FS

CAN CAN 2.0B 2.0B

Enet Enet MAC MAC

PFPFQ Q

BC BC

DMADMA

INTINTR R

CntlCntl

ARM96ARM966E 6E CORE CORE

w/DSPw/DSP96 MHz 96 MHz

CLK CLK CntlCntl

ADCADC

LVD LVD BODBOD

PLLPLL JTAJTAGG

ETMETM99

STR912FAW44

Page 2: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 2

TIM - Timer

MS_uC / dnd / V08

Timer Features

Four 16 bit Timers, support: Two Input Captures Two Output Compares PWM Out PWM Input One Pulse Mode

Two Clocks: External clocks, Internal PCLK

8 bit Prescaler DMA support on Timer 0/1

Input CapReg 2

APB Bus

Output CompReg 1

Ext CLK pin

16 BitCounter/Register

Input CapReg 1

EdgeDetectCircuit

Interrupt - Overflow, OCMP, ICAP

8 BitPrescaler

PCLK

Overflow

OutputComp 1

OutputComp 2

Output CompReg 2

EdgeDetectCircuit

Latch 2 Latch1 ICAP1ICAP2OCMP1OCMP2Control

Registers

16 Bit Prescaler

SCU_SRx

MCLK from SCU

®

Page 3: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 3

TIM - Timer

MS_uC / dnd / V08

Timers Features

16 Bit Up Counter Provide counter values for output compare and input capture

Counter Clock Control Internal clock – PCLK with 8 bit prescaler External clock – frequency must be less than ¼ of PLCK

One external clock input for Timer 0 and 1, another for Timer 2 and 3 MCLK clock (From SCU)

One clock input for Timer 0 and 1, another for Timer 2 and 3 Each clock has a 16 bit presacler Clock enable is defined in SCU_CLKCNTR register and Prescaler values

are defined in SCU_SCR1 and 2 registers Interrupt generation on timer events:

Counter Overflows, rolls over from FFFFh to 0000h After a capture event When compare register matches counter values

®

Page 4: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 4

TIM - Timer

MS_uC / dnd / V08

Timer Modes

Input Capture Mode Two input pins, user programmable edge polarity Capture counter values when input edge is detected Generate interrupt when enabled Can measure input pulse width

Output Compare Mode Two output compare pins, one for each compare register Compare Register is compared with counter value Generate output signal/waveform on pin when a match occurred User programmable output signal level

Other Timer Modes Based on the Input Capture and Output Compare logic

One Pulse Mode PWM Output Mode PWM Input Mode

®

Page 5: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 5

TIM - Timer

MS_uC / dnd / V08

Timer One Pulse Mode

Generation of a pulse synchronized with an external event

On Input Capture event

The timer output pin is toggled to the OLVL2 level

On Output compare event

The timer waits for the next Input Capture event The timer output pin is toggled to the OLVL1 level

The counter is reset to 0xFFFC

IEDG1 = 1

OC1R = 0x2ED0

OLVL1 = 0

OLVL2 = 1OLVL2

FFFC FFFD FFFE… 2ED0 2ED1 2ED2 2ED3 FFFCCounter

ICAP1

OCMP1 OLVL2 OLVL1

Compare 1

FFFC 2ED0

®

Page 6: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 6

TIM - Timer

MS_uC / dnd / V08

Timer PWM Output Mode

Automatic generation of a Pulse Width Modulated signal

The Output Compare 1 Register contains the length of the pulse

The OLVL2 bit contains the level during the pulse

The Output Compare 2 Register contains the period of the pulse

The OLVL1 bit contains the level after the pulse

OC2R = 0x34E2

OC1R = 0x2ED0

OLVL1= 0

OLVL2 = 1

Similar to the One Pulse Mode where the Input Capture event is replaced by the second Output Compare event

OLVL2

FFFC FFFD FFFE 34E22ED0 2ED1 … FFFCCounter

OCMP1 OLVL2 OLVL1

Compare 1 Compare 2

34E2

Compare 2

34E22ED0

®

Page 7: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 7

TIM - Timer

MS_uC / dnd / V08

Timer PWM Input Mode (TIM_CR)

External pulse and period measurement of an external wave

The First edge is configured through the IEDG1 bit

The Second edge is configured through the IEDG2 bit

The signal Full period is stored in the ICAP1

The Pulse length is stored in the ICAP2

Programmable first edge detection

Interrupt Generation

IC2R = 0x34E2

IC1R = 0x2ED0

IEDG1 = 1

IEDG2 = 0Period = ICAP1

Pulse Length = ICAP2

0000 0001 0002 34E22ED0 2ED1 … 0000Counter

ICAP1Capture 2 Capture 1

34E2

Capture 1

®

Page 8: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 8

TIM - Timer

MS_uC / dnd / V08

Timer Structure (1/2)

Page 9: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 9

TIM - Timer

MS_uC / dnd / V08

Timer Structure (2/2)

Page 10: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 10

TIM - Timer

MS_uC / dnd / V08

Presaler

timer clock = Peripheral clock divided by Prescaler

Page 11: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 11

TIM - Timer

MS_uC / dnd / V08

Timer Register Map

Page 12: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 12

TIM - Timer

MS_uC / dnd / V08

Control Register 1

Page 13: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 13

TIM - Timer

MS_uC / dnd / V08

Control Register 2

Page 14: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 14

TIM - Timer

MS_uC / dnd / V08ARM Peripheral Bus 0 access (APB0)

Page 15: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 15

TIM - Timer

MS_uC / dnd / V08

GPIO Access through Memory

Page 16: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 16

TIM - Timer

MS_uC / dnd / V08

Timer configuration

Page 17: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 17

TIM - Timer

MS_uC / dnd / V08

Library sources

Page 18: MS_uC / dnd / V08 6- 1 TIM - Timer Programming Microcontroller TIM - Timer Autumn term 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.

6- 18

TIM - Timer

MS_uC / dnd / V08

Library examples


Recommended