Abstract—A current-weighting-distribution-control (CWDC)strategy for multi-inverter systems to achieve current sharing ispresented in this paper. With a CWDC strategy, the invertersconnected in parallel are allowed to have different power ratingsand can achieve a weighted output current distribution by addingonly simple circuits to each inverter. In such systems, each inverterhas an outer voltage loop controller to govern system stability,an inner current loop controller to expedite dynamic response,and a weighting current controller to achieve current distributionand to reduce possible interactive effects among inverters. Exper-imental results from a two-inverter system and a three-invertersystem have demonstrated the feasibility of the proposed strategyin weighting current distribution and fast regulation during astep-load change or hot-swap operation.
Index Terms—Current sharing, current-weighting-distribu-tion-control, fault-tolerance, hot-swap operation, multi-invertersystems.
I. INTRODUCTION
I N RECENT years, parallel operation of inverters to obtaina large power capacity and to improve system reliability be-
came the trend of power system design. Two or more invertersoperating in parallel subject to the following constraints:
1) output voltages of the inverters must be with the same am-plitude, frequency, and in phase;
2) output currents of the inverters need to be properly dis-tributed according to their power ratings.
Additionally, structures and future research directions of dis-tributed power systems have been presented in [1], and the au-thors have highlighted that paralleling is usually used to improvethermal management, reliability, redundancy, modularity, main-tainability, and size reduction.
To meet some of the above mentioned features, several typesof active current sharing schemes have been proposed [2]–[14],among which a paralleled inverter system can be with eithera multiloop control or a single-loop control. Systems with asingle-loop control might have stability problems during tran-sient and result in low bandwidth. For systems with a dual-loopcontrol scheme, the outer-loop controller is in charge of outputvoltage regulation, while the inner loop controller monitors ei-ther the inductor current [3], [18] or the capacitor current [17],
Manuscript received August 17, 2005; revised May 9, 2006. Recommendedfor publication by Associate Editor P. Barbosa.
T.-F. Wu and H.-M. Hsieh are with the Elegant Power Application ResearchCenter (EPARC), Department of Electrical Engineering, National Chung ChengUniversity, Chiayi, Taiwan 621, R.O.C. (e-mail: [email protected]).
Y.-E. Wu is with the Department of Electrical Engineering, Wu-Feng Instituteof Technology, Chiayi, Taiwan 621, R.O.C. (e-mail: [email protected]).
Y.-K. Chen is with the Department of Aeronautical Engineering, NationalFormosa University, Yunlin, Taiwan 632, R.O.C. (e-mail: [email protected]).
Digital Object Identifier 10.1109/TPEL.2006.886622
[19], [22] of the output filter to achieve fast dynamic response.A dual-loop control scheme can have higher flexibility in de-signing a controller and can yield lower total harmonic distor-tion (THD) [15], [16], but it requires a complex analysis andparameter tuning.
To achieve current distribution, a paralleled inverter systemrequires a current-programming algorithm [2]. In the litera-ture [2]–[4], [9], [14], [20], [21], [28]–[30], there are manycurrent-programming algorithms, such as master-slave-con-trol (MSC) current programming, central-limit-control (CLC)current programming, frequency/voltage droop method, andaverage/highest current programming. For a system with anMSC current programming algorithm [9], [20], the mastermodule is responsible for output voltage regulation, while theslave ones track the current command provided by the masterto achieve equal current distribution. In such a system, if themaster module fails, the system must be shut down. For amulti-inverter system with a CLC algorithm [21], a current dis-tribution center is required to achieve equal current distributionamong inverters. Similarly, if the current distribution centerfails, the system must be also shut down. For a multi-invertersystem with a frequency/voltage droop method [28]–[30], realand active power flows are mainly controlled by the phaseangle and the amplitude of the output voltage, respectively.The notable advantage of this method is no needs of controlinterconnections among inverters. Nevertheless, the conven-tional droop method remains several drawbacks, such as slowtransient response, unbalanced harmonic current sharing andhighly dependent on the inverter output impedance. In [14], theinstantaneous voltage and current controller with the highestoutput as the command can quickly eliminate current variationand can achieve power balance among inverters. However, it issensitive to noise and difficult to achieve a weighting currentdistribution when the paralleling inverters are with differentpower ratings. In [3], although the average output currentscheme can reduce noise influence, it is still difficult to achieveweighting current distribution.
In this paper, inner-outer loop controllers are adopted to reg-ulate output voltage and to improve system response, and acurrent-weighting-distribution-control (CWDC) strategy is pro-posed to replace either the highest output current scheme [14]or the average output current scheme [3] to achieve weightedoutput current distribution among the inverters. With a CWDCstrategy, the parallel inverters in the systems can have differentpower ratings, and can achieve high modularity, high flexibilityand hot-swap operation.
In the paper, Section II presents the configuration and op-eration of the proposed multi-inverter system. In Section III,modeling of a single inverter and a multi-inverter system is dis-cussed. Three illustration examples are presented in Section IV,
WU et al.: CURRENT WEIGHTING DISTRIBUTION CONTROL STRATEGY 161
Fig. 1. (a) Block diagram of the proposed paralleled multi-inverter system, (b)circuit diagram of a single-inverter module, and (c) circuit diagram of n sets ofthe weighting current distribution circuits.
which have verified the theoretical discussion and system feasi-bility. Finally, a conclusion is presented in Section V.
II. SYSTEM CONFIGURATION AND OPERATION
A parallel multi-inverter system with the proposed CWDCstrategy is conceptually illustrated in Fig. 1(a), in which theschematic diagrams of each inverter power stage with its asso-ciated controllers are depicted in Fig. 1(b). Fig. 1(c) showssets of weighting current distribution circuits, and each inverteris associated with a set of the distribution circuit. All of the dis-tribution circuits are connected in parallel through Bus 1 andBus 2. For isolating a failed inverter module, two photo relaysare introduced to each set of the circuits. These photo relays areclosed during normal operation of the weighting current distri-bution circuits, while the corresponding photo relays are openedwhen one of the parallel-inverter modules fails. With the CWDCstrategy, inductor currents of the inverters are sensed as the in-puts to the distribution circuits.
In the system, for achieving modular design, all of theinverters are with the same configuration, and each inverterconsists of a half-bridge switch configuration and an –output filter, as shown in Fig. 1(b). The PIC 18F4431 microcon-troller performs procedure control, processes the output signal
of the voltage and current error amplifiers, and generatessinusoidal pulsewidth modulation (SPWM) driving signals forswitching devices. In addition, the microcontroller can generatea synchronous signal to other inverters for operating in unison,and control signals for protection purpose. Each weightingfunction of the CWDC strategy can be readily realized with
two operational amplifiers (OPs) and the weighting currentcommand of the th inverter can be obtained from theweighting current distribution circuits shown in Fig. 1(c), inwhich the values of andare related to the power ratings of inverters, is the numberof the paralleled inverters and (for 1,2, ) is aweighting factor which depend on the power ratings of the
th inverter module. The output of the first OP can bedetermined as follows:
(1)
where
(2)
denotes the sensed inductor current of the th invertermodule, is the weighted average current of the parallel-inverter modules. The output 1,2, of thesecond OP can be determined as follows:
(3)
With these circuits, we can obtain a paralleled inverter systemwith high modularity and flexibility.
In addition, the proposed configuration of the paralleledmulti-inverter system can achieve the features of hot swapand fault tolerance. Fig. 1(c) also shows these characteristicswhich are described as follows. Inverter 1 (1 kVA) and inverter2 (2 kVA) are, for instance, first connected in parallel; thusthe weighted average value is 1/3 , andthe weighting commands and will become1/3 and 2/3 , respectively. Now,if Inverter 3 (3 kVA) is synchronized with the other two in-verters and connected to the load, the average value becomes
and weighting commands ,and will be 1/6, 2/6, and 3/6 of the total output
current quantities , respectively. Duringoperation, if Inverter 3 fails to supply power, it will be isolatedand disconnected from the system by opening its photo relays;thus, the average value and commands will change back to thosewith only inverter 1 and inverter 2, achieving fault-toleranceand hot-swap features.
III. ANALYSIS OF A SYSTEM WITH CWDC STRATEGY
In the proposed multi-inverter system, a multiloop con-trol scheme is adopted to improve system response andflexibility. Each inverter with the CWDC strategy includesthree controllers: one is to track the current command
1,2, to achieve weighting current dis-tribution, another is used as an inner-loop current controller toimprove the system response, and the other is an outer-loopvoltage controller to regulate the output voltage. To designthese controllers, dynamics modeling of the inverters needs tobe performed first.
162 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 1, JANUARY 2007
Fig. 2. Control block diagram of the single-inverter system.
TABLE ISPECIFICATIONS AND COMPONENT VALUES OF
THE DISCUSSED SINGLE-INVERTER MODULE
A. Modeling of a Single-Inverter System
To design proper controllers for an SPWM controlledinverter, dynamics of the inverter is modeled based on thestate-space averaging method and it is illustrated by a controlblock diagram shown in Fig. 2, where is a sinusoidalvoltage reference, is the output voltage, is the feedbackvoltage signal, is the output current, is the capacitor cur-rent, is the inductor current, is the inner-current-loopcontroller and is the outer-voltage-loop controller. In thefigure, represents the feedback voltage gain, representsthe feedback current gain and is the PWM gain of theinverter. The voltage control loop acts as the outer loop. Thesensed output voltage is compared with the sinusoidal reference
and the error voltage is compensated by . The currentcontrol loop acts as the inner loop. A quantity proportional tothe capacitor current is sensed and compared with the outputof the voltage controller.
After compensated by current controller , the errorsignal summed up with the output of the weighting currentcontroller is compared with a triangular waveformto generate SPWM signal for inverter gate driving. The speci-fications and component values of the designed single-invertermodule are collected in Table I, where and are the outputfilter, and and are the ESRs of capacitor and inductor
, respectively.Fig. 3 shows the bode plots of the transfer function of
the inverter plant under two different load conditions (light loadand full load) and with the current controller open. It can beobserved that the case with a light load has lower phase marginand bandwidth; thus, design of the inverter-system controllersis based on this condition to ensure system stability under anyload conditions.
B. Design of the Inner and Outer Loop Controllers
The inner and outer loop transfer characteristics vary withloads, input voltages and component values in an inverter
Fig. 3. Bode plots of the transfer function i =d of the inverter plant.
Fig. 4. Bode plots of the transfer function K (s) = (v =v ) of an invertersystem with and without controller K (s) = 2.
system. To reduce the effects due to variations and to achieve fastdynamic response, linear proportional–integral (PI) controllersbased on the -factor algorithm [23], [25]–[27] are designed.
First, the inner-loop current controller is designed. Fig. 4shows bode plots of the inner-loop gain of the single-invertersystem with or without inner current-loop controller. In theseplots, a PI-controller 2 adopted from [24] is used as thecontroller, from which it can be observed that the resonant peakhas been suppressed dramatically, reducing current ringing alot.
Next, the outer-loop voltage controller is designed and addedto the single-inverter system. Design specifications of the outer-loop controller are given as follows:
1) phase margin: PM 60 , and2) crossover frequency: 20, where 20 kHz is
the switching frequency.The transfer function of the single-in-
verter system with 2 but without the output voltagefeedback can be derived from Fig. 2 and is shown as follows:
(4)
WU et al.: CURRENT WEIGHTING DISTRIBUTION CONTROL STRATEGY 163
Fig. 5. Type II compensator of theK-factor scheme.
Fig. 6. Bode plots of the overall system loop gain of the single-inverter systemincluding both inner- and outer-loop controllers.
where
where is the load. The outer-loop voltage controlleris designed with the -factor scheme. In the design, type IIcompensator, as shown in Fig. 5, is adopted for the proposedsingle-inverter system to improve phase margin and loop gain,and its transfer function is derived as follows:
(5)
From (5), it can be observed that type II compensator consistsof a pole, a zero, and an integrator. A proper outer-loop voltagecontroller is given as follows:
(6)
Fig. 6 shows the bode plots of the overall system loop gain ofthe designed single-inverter system, including both inner- andouter-loop controllers. It can be observed that the PM is 60which satisfies the design requirement.
C. Modeling of a Paralleled Multi-Inverter System
To investigate the current distribution among inverters, amulti-inverter system is designed with the inverters in parallelconnection, and each inverter includes a weighting current
Fig. 7. Control block diagram of a paralleled two-inverter system.
distribution circuit to achieve current sharing. For convenienceof explanation, a paralleled two-inverter system and its controlblock diagram are depicted in Fig. 7, in which each inverterincludes three controllers. These controllers are designed withthe -factor scheme.
For bringing the multiple inverters into parallel operation, theinverters must be synchronized. In the system, the synchronousprinciple is basically modified from the MSC algorithm exceptthat it is equipped with redundancy. The decision of master in-verter or slave inverter depends on their turn-on moment. Theinverter will act as a master inverter if it is turned on earlierthan the others, and it will send the synchronous signal to eachslave inverter for achieving synchronous operation. Once themaster inverter has been determined, the rest of system oper-ation will make no difference among the inverter. For a case offour inverters, connections among the inverters are illustrated inFig. 8(a), in which inverter 1 first acts as the master (IM) andthe other three inverters are the slaves ( , and ). Themaster inverter sends a synchronous signal to each slave inverterfor achieving synchronous operation. However, if a synchronoussignal is not received by the slave inverters, which means thatsomething is wrong with the master, the bypass switch SW1across the master module will be closed by its successive slaveone to ensure a continuity of load distribution among the healthyinverters, and its successive inverter will act as a new master.For example, if inverter 1 (the master) fails to supply power, thesynchronous signal cannot be received by inverters 2–4 (slaves),and then inverter 2 will take over to be the new master and senda protection signal to inverter 1 to close bypass switch SW1,as illustrated in Fig. 8(b). Note that in the system, each inverterhas been assigned an identification number (ID) and this ID willalso set its priority in taking over the role of the master. On theother hand, if a slave inverter (inverter 2) fails, it will be iso-lated by the master inverter by sending a protection signal to
164 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 1, JANUARY 2007
Fig. 8. Synchronous control architecture used for detecting and isolating dam-aged inverter modules: (a) during normal operation, (b) master module in failure,and (c) one slave in failure.
Fig. 9. Small-signal model of the two-inverter system.
close SW2, as illustrated in Fig. 8(c). With the architecture, fea-tures of fault-tolerance and hot-swap, thus, can be achieved inthe system.
Fig. 9 shows a small-signal model of the proposed two-in-verter system. It can be observed that interactions between thetwo modules may occur. Analytical expression of the transferfunction of the control to the desired outputs cannot be in asimple form. For feasibility and simplicity while without lossof physical meaning, numerical solutions are used to illustratethe required information for controller design.
Fig. 10. Bode plots of the transfer function K (s) = (i =d) of the two-inverter system with and without weighting current controllers.
D. Design of the Weighting Current Controller
In the proposed multi-inverter system, a weighting currentcontroller is used to track the current command
, and to achieve weighting current distribution. In the de-sign, we select the following specifications:
1) phase margin: PM 60 ;2) crossover frequency: 20, where 20 kHz is
the switching frequency.For simplicity of derivation, we assume that the parameters
of the paralleled two-inverter system are fully identical, and theESRs of the capacitors and inductors are negligible. Then, thetransfer function of the paralleled two-in-verter system without can be derived as
(7)
According to (7), the bode plots are shown in Fig. 10. The par-alleled inverter system without the controller possesses highcross-over bandwidth which is prone to noise disturbance. Thus,controller is designed with type II compensator andthe -factor scheme for improving noise immunity, and it isshown as follows:
(8)
Including the weighting current controller in eachinverter results in PM 95 and 1 kHz, as illustrated inFig. 10, which meets the specifications of the weighting currentcontroller.
IV. ILLUSTRATION EXAMPLES AND DISCUSSION
Two-inverter and three-inverter systems with weighting cur-rent controllers and inner-outer loop controllers are used to il-lustrate the previous analysis.
WU et al.: CURRENT WEIGHTING DISTRIBUTION CONTROL STRATEGY 165
TABLE IICIRCUIT PARAMETERS AND SPECIFICATIONS OF THE TWO-INVERTER SYSTEM
Fig. 11. Measured output voltage and current waveforms of the two-invertersystem with (a) a linear load and (b) a nonlinear load.
TABLE IIIMEASURED THD AND ODD HARMONICS OF THE OUTPUT VOLTAGE
OF THE TWO-INVERTER SYSTEM WITH A RECTIFIER LOAD
Example 1: Two-Inverter System With Identical Power Rat-ings: To investigate the current distribution between inverters,a two-inverter system is designed with the circuit parametersand specifications collected in Table II. Experimental resultsof the system with a resistive load or a rectifier load are il-lustrated in Fig. 11, of which the output power ratings of thetwo inverters are identical. In the figure, denotes the outputvoltage, denotes the total output current, and and arethe output currents of inverter 1 and inverter 2, respectively. Inthe system design, the weighting current controllers are adoptedto deal with the discrepancy between the paralleled inverters. Itcan be observed from these plots that equal current distributioncan be achieved regardless of the types of loads and componentdiscrepancy. Measured THD and odd harmonics of the outputvoltage of the two-inverter system operated with a rectifier loadare listed in Table III. It also shows high power quality, veri-fying the feasibility of the proposed system. If the two-invertersystem with component discrepancy between the power stagesis higher than 50%, the current sharing will be influenced, andoutput current ripple will be induced. Fig. 12 shows the simula-tion results of the two-inverter system with different output filtercomponents ( 1 mH and 18 F and 1.5 mHand 27 F). It can be observed that current sharing ca-pability is getting worse and output current ripple is significant.
Example 2: Two-Inverter System With Different Power Rat-ings: Experimental results of a two-inverter system with dif-ferent output power ratings are illustrated in Fig. 13, in whichthe power ratio of inverter 1 to inverter 2 is 1:2. It can also beobserved from these plots that weighting current distribution be-tween inverters can be achieved regardless of the types of loads(resistive, rectifier, or inductive load) and the system is stable.In addition, Fig. 14 shows the experimental measurements from
Fig. 12. Simulation results of the two-inverter system with different outputfilter components (L = 1 mH,C = 18�F,L = 1.5 mH,C = 27�F).
Fig. 13. Measured output voltage and current waveforms of the two-invertersystem with different power ratings (1:2) for (a) a resistive load, (b) a rectifierload, and (c) an inductive load.
Fig. 14. Measured results from a two-inverter system with load variations: (a)half load! full load, and (b) full load! half load.
a two-inverter system with load variation, and it can be seen thatthe proposed multi-inverter system with the CWDC strategy hasfast dynamic response and precise current distribution.
Protection of a system from damage is the most importantissue in a paralleled multi-inverter system. Thus, in a parallel-in-verter system, a damaged inverter module needs to be detectedand isolated promptly to prevent it from interfering with thehealthy inverters. To verify the features of fault-tolerance, mod-ularity and maintainability (hot-swap) of the proposed CWDCstrategy, a two-inverter system with a pure resistant load is op-erated, whose results are plotted in Fig. 15. Fig. 15(a) shows theexperimental results of a system with inverter 2 in failure and it
166 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 1, JANUARY 2007
Fig. 15. Measured output voltage and current waveforms of a two-invertersystem with a linear load: (a) inverter 2 in failure and (b) inverter 2 is connectedto the load.
Fig. 16. Simulation results of the two-inverter system with different weighting-current controller: (a) identical power ratings and (b) different power ratings.
Fig. 17. Simulation results of the two-inverter system with different voltagecontroller: (a) identical power ratings and (b) different power ratings.
is isolated from the system. It can be seen that the output voltageand current waveforms are sinusoidal and in phase without no-ticeable variation, and the other inverter still can continuouslysupply power to the load. Fig. 15(b) shows a plot in which theload is first supplied by inverter 1, and inverter 2 is then syn-chronized and connected to the load. It can be observed that theweighting current distribution can be achieved, and the wave-forms of output voltage and currents can also sustain sinusoidaland in phase.
For investigating the influences of voltage and current con-trollers for the parallel multi-inverter system, Figs. 16 andFig. 17 show the simulation results of the two-inverter systemwith different weighting-current controllers and voltage con-trollers (component discrepancy of the controllers is higher than20%), respectively. In the description, the component discrep-ancy means that the resistance and capacitance in the controllerare increased by 20%. It can be seen from Fig. 16 that precisecurrent sharing still can be achieved even though the two-in-verter system with different weighting-current controllers. Inthe proposed parallel inverter system, the weighting-currentcontroller is located in the inner loop and it is less influence tocurrent sharing than the outer voltage-loop controller due to theaction of the weighting current distribution circuit. However, itcan be observed from Fig. 17 that the current sharing capabilityis getting worse and the output current distortion is significantif the component discrepancy in the voltage controller is 20%.
Fig. 18. Measured output voltage and current waveforms of a three-invertersystem with a linear load: (a) inverter 3 in failure and (b) inverter 3 is connectedto the load.
TABLE IVCIRCUIT PARAMETERS AND SPECIFICATIONS OF
THE DISCUSSED THREE-INVERTER SYSTEM
TABLE VCOMPARISONS AMONG THE PERFORMANCE OF A MULTI-INVERTER
SYSTEM WITH MSC, CLC, OR CWDC STRATEGY
Example 3: Three-Inverter System: For further investigatingthe current-sharing performance of the proposed CWDCstrategy, a three-inverter system with a pure resistive load isimplemented, whose measured results are plotted in Fig. 18.The circuit parameters and specifications of the three-invertersystem are listed in Table IV. Fig. 18(a) shows waveforms of asystem with inverter 3 in failure. It can be seen that the outputvoltage and current waveforms are still sinusoidal and in phase.Fig. 18(b) shows a plot in which the load is first supplied byinverter 1 and inverter 2, and inverter 3 is then plugged intothe paralleled inverter system. It can be also seen that theoutput currents are precisely distributed, and the output voltagewaveform sustains sinusoidal.
In this paper, preliminary performance comparisons amongthe systems with MSC, CLC, and CWDC strategy are summa-rized in Table V. The investigated systems are: 1) with iden-tical modules, the components and input voltage of modules 1and 2 being of the same and 2) with different modules, mod-ules 1 and 2 being with different power ratings. According tothe experimental measurements, the performance characteris-tics of current sharing are close to each other for the systemswith these three controls. However, because a system with theMSC strategy is primarily dominated by the master inverter, itsfailure will shut down the system, degrading reliability and flex-ibility. While, for an inverter system with the CLC strategy, acurrent distribution center is required, so that the cost of con-trol circuits is higher than the others. Moreover, a system with
WU et al.: CURRENT WEIGHTING DISTRIBUTION CONTROL STRATEGY 167
either MSC or CLC needs to know the number of inverters inparallel operation a priori. Thus, if there is any inverter failureor it needs to add one more inverter to the system, the systemcontroller needs to determine a new number and recalculate acurrent command for each inverter, increasing CPU’s loading,reducing flexibility and possibly degrading dynamics.
The features of the proposed paralleled multi-inverter systemwith the CWDC strategy are summarized as follows.
1) A dual-loop control scheme is adopted to promote thesystem stability and flexibility in designing controllers,reducing THD significantly.
2) In the inner-loop control, capacitor current is fedback tospeed up response, improve robustness and reduce sensi-tivity to parameter variations.
3) Each inverter module in the paralleled multi-invertersystem is with identical configuration, and this config-uration can be also applied to a single inverter system,resulting in high modularity.
4) Fault-tolerance and hot-swap features can be readilyachieved.
5) Weighting current distribution circuits are developed toachieve weighting current distribution among inverters, sothat even inverters with different power ratings are still al-lowed to be connected in the system.
6) The weighting current distribution circuit in each invertermodule can be readily implemented with only two stagesof operational amplifiers, reducing circuit cost and CPU’sloading significantly.
V. CONCLUSION
A CWDC strategy for inverters in parallel operation to achieveweighting current distribution has been proposed in this paper.Each inverter in the proposed system consists of a voltage con-troller to govern system stability, a current controller to achievefast dynamic response, and a weighting current controller toachievecurrentsharingamongthe inverters.Experimental resultshave verified that a system with the proposed CWDC strategycan not only accommodate various types of loads and variationof component values, but also can achieve a weighting currentdistribution even when the paralleled inverters are with differentpower ratings. Additionally, a system with the CWDC strategycan readily achieve fault tolerance, hot-swap feature, and modu-larity, and can improve maintainability. In particular, the CWDCstrategy can be readily realized with two stages of operationalamplifiers, reducing cost significantly.
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168 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 1, JANUARY 2007
Tsai-Fu Wu (S’88–M’91–SM’98) received theB.S. degree in electronic engineering from NationalChiao-Tung University, Hsinchu, Taiwan, R.O.C.,in 1983, the M.S. degree in electrical and computerengineering from Ohio University, Athens, OH, in1988, and the Ph.D. degree in electrical engineeringand computer science from University of Illinois atChicago in 1992.
From 1985 to 1986, he was a System Engineer inSAMPO, Inc., Taiwan, in developing and designinggraphic terminals. He was a Teaching and Research
Assistant in the Department of Electrical Engineering and Computer Science,University of Illinois at Chicago, from 1988 to 1992. Since 1993, he has beenwith the Electrical Engineering Department, National Chung Cheng University,Chiayi, Taiwan, where he is currently a Professor and Director of the PowerElectronics Applied Research Laboratory (PEARL). His research interests in-clude developing and modeling of power converters, design of electronic dim-ming ballasts for fluorescent lamps, metal halide lamps and plasma displaypanels, design of solar-array supplied inverters for grid connection, and designof pulsed-electrical-field generators for trans-dermal drug delivery and food pas-teurization.
Dr. Wu received three Best Paper Awards from the Taipei Power ElectronicsAssociation (2003–2005) and was rated as one of the top 5% outstanding re-searchers by the National Science Council, Taiwan, in 2005. He is a SeniorMember of the CIE.
Yu-En Wu was born in Chiayi, Taiwan, R.O.C.,in 1964. He received the B.S. degree in electricalengineering from the Taiwan Institute of Tech-nology, Taipei, Taiwan, in 1989, the M.S. degree inelectrical engineering from Sun Yat-Sen University,Kaohsiung, Taiwan, in 1992, and the Ph.D. degree inelectrical engineering from National Chung ChengUniversity, Chiayi, in 2005.
From 1992 to 2005, he was a Lecturer in the De-partment of Electronic Engineering, Wu Feng Insti-tute of Technology, Chiayi, where he is currently an
Associate Professor. His research interests include modeling and control of con-verters, design and implementation of multi-inverter systems, parallel UPS sys-tems, DSP based application systems, and renewable energy systems.
Hui-Ming Hsieh was born in Changhua, Taiwan,R.O.C., in 1975. He received the B.S. degree fromthe National Taiwan University of Science andTechnology, Taipei, Taiwan, in 2000 and is currentlypursuing the Ph.D. degree in the Elegant PowerApplication Research Center (EPARC), Departmentof Electrical Engineering, National Chung ChengUniversity, Chiayi, Taiwan.
His research interests include design of convertersand inverters and microprocessor-based applicationsystems.
Yu-Kai Chen (S’98–M’99) was born in Chiayi,Taiwan, R.O.C., in 1967. He received the B.S. degreein electronic engineering from Feng Chia University,Tai-Chung, Taiwan, in 1990, the M.S. degree in in-formation and electronics engineering from NationalCentral University, Chung-Li, Taiwan, in 1994,and the Ph.D. degree in electrical engineering fromNational Chung Cheng University, Chiayii, in 1999.
From 1994 to 1999, he was a Lecturer with the De-partment of Electronic Engineering, Wu Feng Insti-tute of Technology, Chiayi. He was an Associate Pro-
fessor in the Department of Electrical Engineering, Chien Kuo Institute of Tech-nology, from 2000 to 2001. Since 2002, he has been with the Aeronautical Engi-neering Department, National Hu-Wei Institute of Technology, Yun-lin, Taiwan,where he is currently an Associate Professor. His research interests include mod-eling and control of dc–dc converters, design of converters and inverters, anddesign of solar-panel supplied systems, and DSP- and microprocessor-basedapplication systems with fuzzy and robust control.
