1 © 2012 Oclaro Inc. | Confidential and ProprietaryOPN-PRS-13035-0.0© 2012 Oclaro Inc. | Confidential and Proprietary
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Multichannel 1.3-um Lens-Integrated Surface-Emitting DFB Laser (LISEL) Arrays for High-speed Optical Interconnects at 100Gbps and beyond
September 2013Kiyo Hiramoto
Oclaro Japan Inc.Takashi Takemoto
Koichiro AdachiHitachi Ltd.,
Central Research Laboratory
ECOC 2013 WorkshopWS4 - Technologies for Short Reach Optical Interconnects
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ContentsBackground Market & ApplicationTrend for Inter‐connection inside systems
Multi‐channel LISEL array for Multi‐Tbps optical inter‐connectionTest Data at 25Gbps/chTest data at 40Gbps/ch
Demonstration results of Low power consumption 100Gbps CMOS micro‐transceiver Transmission Test DataVideo transmission demonstration Result
Summary
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IP Traffic Growth, 2012-20171 ExaByte = 1018 Bytes = 100,000 Libraries of Congress
Exabytes of Traffic Per M
onth
IP traffic will grow 3‐fold from 2012 to 2017, a compound annual growth rate of 23%. IP traffic in 2017 will be equivalent to 362 billion DVDs per year, 30 billion DVDs per month, or 41 million DVDs per hour.
Source: Cisco Visual Networking Index, 2013
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Network Architecture Ready for Higher Speeds
DSL
PON
Optical DWDM CoreUp to 80ch 40G
Optical DWDM CoreUp to 80ch 40G
BXC
ADM
10G Meshed 10G Aggregates to 40G
Cable
ADM
WirelessMedium
Business
Government
Access100M to 2.5G
40GbE & 100GbE Standard
Mobile BroadbandMobile Backhaul
Growing Traffic is spurring demand for higher speed
interfaces
WirelineAccess
MetroAccess
MetroCore
DWDMCore
1G/2.5G/10G 10G/40G/100G
21M 42M/100M+
1G/2.5G 1G/2.5G/10G
Data Centers Core Aggregation
10G 40G/100G 10G/40G 40G/100G/400G
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100Gbps interface expansion
Core networking Larger front panel bandwidth >2Tbps front panel bandwidth in 2015
IEEE is defining next generation 100GbE specifications to realize >2Tbps front panel bandwidth under IEEE 802.3bm Study Group.
Data centers Lowe cost and small size 100GbE
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Trend on data transmission inside systemsGrowing capacity on system
interface (>2Tbps)
Requirement for ≧ 20Gbps data rate/lane
Saturation on electrical I/F between LSIs and boards around 20Gbps
Requirement for Optical interconnection emerging
Backplane Board
Rack to rack
On board
Board to board
Server/Router
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0 25 50 75 100 125 150Temperature (⁰C)
Bit
rate
(Gb/
s)0
10
20
30
40
50850nm VCSEL1060nm VCSE1310nm VCSE
Berlin(2008)
NEC(2009)
NEC(2008)
NEC(2007)
Berlin(2010)NEC
(2007)
Agilent(2003)
Corning(2006)
Ulm(2007)
Berlin(2009)
Agilent(2007)
EMCORE(2010)
Avago(2010)
Milano(2009)
Chalmers .(2009)
Berlin (2011)
Berlin(2011)
Berlin(2010)
Berlin (2011)
Berlin (2011)Berlin
(2012)
JDSU(2007)
EPFL(2009)
Berlin(2011)
Chalmers(2010)
Berlin (2012)
Technology Trend for Multi-Tbps Optical transmission• Commonly used 850-nm VCSEL has limit in speed and transmission length
– Modulation Speed Limit due to small active cavity– Transmission Limit due to modal noise– Tradeoff between speed and reliability
• Low cost 1310-nm solution is required for >100G connection– Proven higher speeds of >40G– Link range of >2km at 40G– SMF has been becoming not expensive even for Data Center application
1m 10m 100m 1km 10km 100km 1000km10cm
400G
100G
40G
10G
1550nmCoherentPSK
850nm VCSEL(N=1)
1310nm DFB(N=1)
1550nmEML (N=1)
Multi-Fiber(N x 10G
850nm VCSEL)
Multi-Wavelength(N x 1310nm LISEL
Cooled > 2km)
Multi-Fiber(N x 1310nm LISELUn-cooled < 2km)
Multi-Wavelength(N x 1310nm DFB)
1550nmCoherent
1550nmPSK
Modula-tion
Speed Limit
TransmissionLimit
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Solution for Multi-Tbps optical interconnect 1310nm LISEL/LIPD technology
• Lens-Integrated Surface Emitting Laser (LISEL) developed by Hitachi Central Research Laboratory (CRL)– 1310nm DFB with surface emitting laser structure– High speed performance over 25Gb/s at high temperature – Low cost as VCSEL using on-wafer testing and burn-in – Easy to couple to single (mono-) and array fiber– Lens Integrated Surface Illuminated Photo-diode (LIPD) that is
compatible structure with LISEL
Fig. LISEL structure Fig. LIPD structure
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Objectives
Minimize Component
Objectives and LISEL Approaches
VCSELLISEL
Low CostOptical Coupling
Low Cost Chip
Low PowerConsumption
High Speed
Transmission Coverage
Chip Reliability
Wafer Level testing and Burn-in
Narrow divergenceoutput
Speed per Chip at Wide Temperature
Trade-off withSpeed at >10G
<100m w/FEC @ 25G
Speed at High Temperature
Small Cavity
Wafer Level testingand Burn-in
Lens Integrated
High Speed per Chip at >40G
Established DFB
10m-10km @ 25G
Confirmed at 40GExpected at >40G
Short Cavity byposition of Mirror
Low Cost
Reliable
HighPerformanc
e
Limit
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1310nm LISEL 25Gbps/ch operation• High speed operation of 25Gbps/ch achieved with short
cavity structure (<160 um)25Gbps x 4ch LISEL Array View Un-cooled 25Gbps Optical Waveforms
• Narrow far-field angle: 2o
• High speed:25Gbps• Flip-chip die bond
25Gbps
20 psIbias = 30 mA, Imod = 20 mA,
25ºC
Ibias = 60 mA, Imod = 30 mA,
85ºC
K. Adachi et al., CLEO2010, CME4 (2010)
K. Adachi et al., IPRM2011, We-7.2.1 (2011)
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1310nm LISEL Output Beam Pattern• Ultra-narrow far field patterns (2.5º (cavity) and 1.9º (horizontal))
achieved with lens-integration for easy coupling with fibers.Cavity (vertical) Horizontal
2.5º 1.9º28.2º 29.0º
LISEL LISELEELD EELD
Angle (degree)-50 -30 -10 10 30 50
Angle (degree)-50 -30 -10 10 30 50
Inte
nsity
(a.u
.)
Inte
nsity
(a.u
.)
K. Shinoda et al., OECC2010,6D1-3(2010)
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Ref: K. Adachi et al., IPC 2011, TuD3 (2011).
Measurement of SMF transmission
A part of this work was performed under management of the PETRA supported by NEDO.
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High Speed Operation at 40G
ISLC2012
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Lens Integrated Photodiode (LIPD)
A part of this work was performed under management of the PETRA supported by NEDO.
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Optical connecter
Heat-sink
LGA socket
Compact size (914mm2) Surface mount with passive alignment enables low cost module. Use of lens-integrated optical devices reduces components and assembly costs in transceiver design.
PD arrayDFB-LD array
Multi-layer ceramic package
12chparallelMMF
CMOSTransceiver
Chip(65nm CMOS)
Micro-transceiver with 25Gbps x 4ch Optical I/F
Courtesy of NEC
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5.3
mm
10 6.25 Gb/s SerDes
Sta
ndar
d I/O
IF Logic
4 25 Gb/s
SerDes(RX)
4 25Gb/s
SerDes(TX)
LC-PLL
RX 4ch
#0 #1
#2 #3
TIA
TX 4ch
#0 #1 #2 #3
LDD
3.6 mm
Low power consumption 100Gbps CMOS Transceiver Chip Analog frontend IC + Optical component: 1000mW or 10mW/Gbps
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Test configurationOptical Transceiver Optical Receiver
25-Gb/s Optical Waveform
25Gb/s
CICC’10
PRBS31
Electrical output waveform
MMF (4m)
PRBS31
6.25Gb/s LDD
TIA
Ele. I/F circuit Analog FE
PD
Opticalcomponent
Transceiver Chip
DFB-LD25
Gb/sIF
6.25 Gb/s
IF
IFlogic
Data 25Gb/sOptical
46.25Gb/s Electrical
Test results of CMOS Optical Transceiver
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MMF
Wavelength1.3µmDFB
Laser14 ~
28Gb/sNRZ
Optical source
PPG LNDriver
LN Modulator
4 25-Gb/s Optical Receiver
PCB
Package
4ch PIN-PD
TIA chipOscillo-scope
BERT
425Gb/s PD array(1.3m)
Test set up for receiver sensitivity measurement
Optical source:1.3μm LNModulator PD responsivity:0.8 A/W
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29-1 PRBS pattern, ER: 4.3dB High sensitivity –11.6dBm@14Gb/s; –9.7dBm@25Gb/s; –8.2dBm@28Gb/sLow jitter65%@25Gb/s; 51%@28Gb/s
Time (UI)
Bit
erro
r rat
e
28 Gb/s 25 Gb/s
51%
65%
-3
Bit
erro
r rat
e
–14 –12 –10 –8 OMA (dBm)
28 Gb/s 25 Gb/s 14 Gb/s -4
-5
-6-7-8-9
-10-11-12
-4-5-6-7-8-9
-10-11-12
0 0.2 0.4 -0.2 -0.4
–7.6-dBmOMA
ISSCC’13
Test results of High sensitivity CMOS optical receiver
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Electrical backplane
SWSWIFIF
IFIF
Courtesy of ALAXALA Networks
IF Board
SW Board
Opt.Ele.
100Gb/s CMOS Transceiver
Huge reduction in weight and # of cables Improved cooling efficiency due to wider
open space
Demonstration of router with optical backplane inter-connection
Optical backplane
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20Gb/s x 1ch
HDMI board
HDMI boardReceiver board
FPGA
Transmitter board
FPGAMMF
(100 m)
Videosource
Display
Transmitter board Receiver board
MMF(100m)
Display
Demonstration of video transmission over 100m MMF
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SummaryOptical interconnect is current urgent issue to connect chips on separate boards of next gen. routers and servers. 25Gb/s x 4‐lane micro transceiver with a signal format conversion to interface with switch or processor ASICs was demonstrated. Hybrid integration of surface accessible optical device arrays and one chip CMOS LSI on a common ceramic substrate was quite effective to build up the minimized 100Gb/s transceiver. The hybrid approach could be most practical way for electronics optics integration.
This work was partly supported by Photonics Electronics Technology Research Association (PETRA) and New Energy and Industrial Technology Development Organization (NEDO) in “Next-generation High-efficiency Network Device Project”
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