1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

102

1/02/2010 1:34:44 PMNB3000_Top.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A2

Sheet Title NB3000 Top Level

Assy:

81

NB3000AL - AlteraD-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

PSUPSU.SchDoc

SRAM

SRAM1SRAM_256Kx16_TSOP44

STATUS_LED

USER_STATUS_LEDSDB_LEDS_0603

SRAM1

SRAM2

MEM_COMMON

DAU_RESET_SW

BUZZER

ONE_WIRE_DB_PB

SW

DIP

USERIO

EXT_A

RS232

KEYBOARD

MOUSE

TFT_IO

DB_PROGRAM

STATUS_LED

USER_LEDS

RELAY

I2C

CODEC

VGA

ETH

DBSD

DBUSB

PWM

SPDIF

DAC

ADC

RS485

MIDI

DB_JTAG

DB_CLOCKS

DB_SPI

ISP176X

PROTOTYPE

SPAREIO

TFT_TSC

FPGA_USERFPGA.SCHDOC

INT EXT

VIDEO_OUTVGA_OUT.SCHDOC

CON

CON_VGACON_VGA_DB15

HOST_JTAG

LED1

LED2

1WID

DB_PROGRAM

CLK_PLL

FLASH_BOOT

HOSTUSB

SRAM

RTC

SD

HOST_AUDIO

DB_JTAG

DB_CLOCKS

FLASH_USER

DB_SPI

PB_A

EXTSPI

FLASH_GOLDEN

DIAGCOMMS

FPGA_HOSTHOST_FPGA.SchDoc

HOST_JTAG

HOST_JTAGHOST_JTAG.SchDoc

INT EXT

RS232RS232_HIN232

EXTINT

KEYBOARDPC_PS2

RS232#

KBD#

MSE#

RS232

KEYBOARD

EXTINT

MOUSEPC_PS2

DIPSW

DB_RESET

CON

CON_DBUSBCON_MINI_USBB_RA_KME04-USBMU03A01-1

DBUSB DBUSB#

CON

CON_DBSDCON_SD_KSDC012551

DBSD

EXTINT

DBUSB_TXRXUSB_CY7C68001-56LFC.SchDoc

INT EXT

ETHEthernet_RTL8201CL.SchDoc

ETH

CLK_PLL

CLK_PLLCLK_ICS307-02_PLL

1WID

NB_ID1WB_DS2502_ID

CON

CON_HOST_USBCON_MINI_USBB_RA_KME04-USBMU03A01-1

TFT_TSC TFT_TOUCH

LCDTFTTSC_XPT2046.SchDoc

TFT_TSC

TFT_IO

CON

CON_MOUSECON_PS2PORT_MINIDIN6F_BLACK

INT CON

PDA_SWITCHESSW_PB_SPNOx5_SMD

INT

TEST_RESETSW_RESET_SPNO

CON

USERPOWER

CON_IOCON_USER_20WBOXHDRRAMx2

UIO

BUZZER CODEC_AUD

AUDIO

SPK_L

SPK_R

HOST_AUDIO

AIN

AOUT_PBA

AUDIO_AMPAUDIO_AMP_NB2C

PB_AIN

AUDIO

SPK_L

USER_LEDS CON

USER_LEDLED_RGB_SMDx8.SCHDOC

USER_LEDS

VGA#VGA

SW

SRAM

SRAM2SRAM_256Kx16_TSOP44

RELAYS CON

RELAYRELAY_X4_IM03GR

RELAY

PWM CON

PWMPWM_5.8A_30V_X4

PWM

1V21V82V53V35V0

PBPOWER

1V21V82V53V35V0

I2C

DIGITALCODEC_AUD

AIN

AUDIO_CODECAudio_Codec.SchDoc

CODEC

SPK_L

SPK_R

CON_SPEAKERSCON_EXT_SPK

SPK_R

PB_AOUT

PBIO

LED1

LED2

LED1_EXT

LED2_EXT

LED_HOSTLED_RGB_SMDx2

SPDIF

CON_SPDIFCON_SPDIF_INOUT_A

SPDIF

SPI CON

DACDAC_DAC084S085_SPI

SPI CON

ADCADC_ADC084S021_SPI

DAC

ADC

CON

CON_ETHCON_ETHERNET_RJ45_LEDS

ETH#

TFT_IO

TFT_TOUCH

CON_LCDTFTCON_FFC40_LCDTFT.SCHDOC

CON

CON_RELAYCON_RELAYx4_KMRJIO3_5MM_12WAY

CON

CON_RS232CON_RS232DCE_DB9_TH

BOOT_FLASH

MOUNTSMounts.SchDoc

INT EXT

RS485RS485_ISL8491CON_PSUPWJACK+SWITCH.SchDoc

HOST_USBHOSTUSB# EXT INT

HOST_USB_TXRXUSB_CY7C68001-56LFC.SchDoc

VBATT

CON_BATTCON_BATT_COIN

VBATT VBATT RTC

RT CLOCKCLK_PCF2123_RTC

HOST_RTC

USERPOWER

USER_POWERUSERPWR.SCHDOC

CON

CON_HOST_SDCON_SD_KSDC012551

RS485# CON

CON_RS485CON_RS485_RJ45

INT EXT

MIDI INTERFACEMIDI_FULL

CON

CON_MIDICON_MIDI_DIN5

MIDI#MIDI

RS485

HOST_AUDIO

PBCTRL

DB_PROGRAM

HOST_JTAG

HOST_ID

HOST_CLK

HOST_SRAM

HOST_LED1

HOST_LED2

HOST_SD

DB_SRAM1

DB_SRAM2

DB_MEM

DB_STATUS

ADC#

RELAYS#

PWM#

DAC#

UIO_PWR

DB_JTAG

DB_CLOCKS

PB_SPI

USER_FLASH

DB_SPI

EXT

ONE_WIRE_DB_PB

AIN

I2C

SPI

AOUT

CTRL

PBPOWER

CON_PERIPHERAL_BRDPBCON

USER_LEDS

SW_PDA

SPARE_IO

CON_LEDKBDCON_NB3000_LEDKB

SERFLASH

SYSBOOTFLASH_M25PX0_SPI_8Mbit

GOLD_FLASHSERFLASH

GOLDENFLASH_M25PX0_SPI_8Mbit

FLASH

USER_FLASHFLASHSPI_M25PX0

INT

SW_DIP8_SMTSW_DIP8_SMT

CON

CON_KEYBOARDCON_PS2PORT_MINIDIN6F_BLACK

CON

CON_USB1CON_USBA_RA_UPRIGHT

LEDS#

ATE DIAGCOMMS

ATE INTERFACECON_NB3000_ATE_INTF

ISP176X

PORT1

PORT2

PORT3

USB_USERHOSTUSB_ISP1760

ATE

VGA#

SPDIF

UIO

ADC#

DAC#

AUDIO

HOST_JTAG

PWM

RS232#

RS485#

KBD#

MSE#

MIDI#

HOST_ID

ATEINTERFACE

VGA#

SPDIF

UIO

ADC#

DAC#

AUDIO

HOST_JTAG

PWM#

RS232#

RS485#

KBD#

MSE#

MOUSE

ISP176X

PORT1

PORT2

PORT3

PROTOTYPE

USER_PROTOTYPE_AREAPROTOTYPE_A

PROTOTYPE

CON

CON_AUDIOCON_AUDIO_AC99_NOMIC.SCHDOC

DIAGCOMMS

MIDI#

HOST_ID

SW#

SPAREIO

MEM

COMMON_MEMORYCommonMemory

CON

CON_ADCCON_ADCx4_KMRJIO3_5MM_6WAY

CON

CON_DACCON_DACx4_KMRJIO3_5MM_6WAY

CON

CON_PWMCON_PWMx4_KMRJIO3_5MM_6WAY

CON

CON_USB2CON_USBA_RA_UPRIGHT

CON

CON_USB3CON_USBA_RA_UPRIGHT

SRAM

SRAM_HOSTSRAM_256Kx16_TSOP44

TFT_TOUCH

INT

USB_CLKOSC_24MHZ.SchDoc HOST_USB.XTALIN

HOST_USB.XTALOUT

CMOSOUT

XTALINXTALOUT

OSC

DBUSB.XTALIN

NLADCNLADCNLADCNLADC

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLATE

NLAUDIO

NLBOOT0FLASHNLBOOT0FLASHNLBOOT0FLASHNLBOOT0FLASH

NLCODECNLCODECNLCODECNLCODECNLCODECNLCODECNLCODECNLCODECNLCODEC

NLDACNLDACNLDAC

NLDB0CLOCKSNLDB0CLOCKSNLDB0CLOCKSNLDB0JTAGNLDB0JTAGNLDB0JTAGNLDB0JTAGNLDB0JTAGNLDB0JTAGNLDB0JTAGNLDB0JTAG

NLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEM

NLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAM

NLDB0RESET

NLDB0SPINLDB0SPINLDB0SPINLDB0SPINLDB0SPI

NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1

NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2

NLDB0STATUS

NLDBSDNLDBSDNLDBSDNLDBSD

NLDBUSB#NLDBUSB#NLDBUSB#NLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSB

NLDBUSB0XTALIN

NLDBUSB

NLDIAGCOMMSNLDIAGCOMMSNLDIAGCOMMSNLDIAGCOMMS

NLETH#NLETH#NLETH#NLETH#NLETH#NLETH#NLETH#NLETH#NLETHNLETHNLETHNLETHNLETHNLETHNLETHNLETHNLETHNLETH

NLGOLD0FLASHNLGOLD0FLASHNLGOLD0FLASHNLGOLD0FLASH

NLHOST0AUDIONLHOST0AUDIO

NLHOST0CLKNLHOST0CLKNLHOST0CLKNLHOST0CLKNLHOST0CLK

NLATE

NLHOST0ID

NLATE

NLHOST0ID

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLATE

NLHOST0JTAG

NLHOST0LED1NLHOST0LED1NLHOST0LED1

NLHOST0LED2NLHOST0LED2NLHOST0LED2

NLHOST0RTCNLHOST0RTCNLHOST0RTCNLHOST0RTCNLHOST0RTCNLHOST0RTCNLHOST0RTC

NLHOST0SDNLHOST0SDNLHOST0SDNLHOST0SD

NLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAM

NLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USB

NLHOST0USB0XTALIN

NLHOST0USB

NLHOST0USB0XTALOUT

NLHOSTUSB#NLHOSTUSB#NLHOSTUSB#

NLI2CNLI2C

NLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176X

NLATE

NLKBD#

NLATE

NLKBD#NLKEYBOARDNLKEYBOARD

NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#NLLEDS#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#

NLATE

NLMIDI#NLMIDINLMIDI

NLMOUSENLMOUSE

NLATE

NLMSE#

NLATE

NLMSE#

NLPB0AINNLPB0AINNLPB0AINNLPB0AOUTNLPB0AOUT

NLPB0SPINLPB0SPINLPB0SPI

NLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRL

NLPORT1NLPORT1NLPORT1

NLPORT2NLPORT2NLPORT2

NLPORT3NLPORT3NLPORT3

NLPWMNLPWMNLPWMNLPWM

NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#NLRELAYS#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#

NLATE

NLRS232#NLRS232NLRS232NLRS232NLRS232

NLATE

NLRS485#

NLATE

NLRS485#

NLATE

NLRS485#

NLATE

NLRS485#NLRS485NLRS485NLRS485NLRS485

NLSPAREIONLSPAREIONLSPAREIONLSPAREIO

NLATE

NLSPDIF

NLATE

NLSPDIF

NLSPK0LNLSPK0L

NLSPK0RNLSPK0R

NLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IO

NLTFT0TOUCHNLTFT0TOUCHNLTFT0TOUCHNLTFT0TOUCHNLTFT0TSCNLTFT0TSCNLTFT0TSCNLTFT0TSCNLTFT0TSCNLTFT0TSC

NLUIO0PWRNLUIO0PWRNLUIO0PWRNLUIO0PWR

NLUSER0FLASHNLUSER0FLASHNLUSER0FLASHNLUSER0FLASHNLUSER0FLASH

NLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDSNLUSER0LEDS

NLVBATT

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#

NLATE

NLVGA#NLVGANLVGANLVGA

NLADC#

NLATE

NLADC#

NLATE

NLADC#

NLATE

NLADC#

NLATENLATE

NLDAC#

NLATE

NLDAC#

NLATE

NLDAC#

NLATE

NLDAC#

NLATE

NLPWM#

NLATE

NLPWM#

NLATE

NLPWM#

NLATE

NLPWM#

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLATE

NLUIO

NLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEMNLDB0MEM

NLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAMNLDB0PROGRAM

NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1NLDB0SRAM1

NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2NLDB0SRAM2

NLDBSDNLDBSDNLDBSDNLDBSD

NLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSBNLDBUSB

NLDIPSWNLDIPSWNLDIPSWNLDIPSWNLDIPSWNLDIPSWNLDIPSWNLDIPSW

NLETHNLETHNLETHNLETHNLETHNLETHNLETHNLETH

NLHOST0SDNLHOST0SDNLHOST0SDNLHOST0SD

NLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAMNLHOST0SRAM

NLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USBNLHOST0USB

NLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176XNLISP176X

NLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRLNLPBCTRL NLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIONLPBIO

NLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPENLPROTOTYPE

NLRELAYNLRELAYNLRELAYNLRELAY

NLSW#NLSW#NLSW#NLSW#NLSW#NLSWNLSWNLSWNLSWNLSW

NLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IONLTFT0IO

NLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGANLVGA

1

1

2

2

3

3

4

4

D D

C C

B B

A A

2 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title NB3000 POWER SUPPLIES

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

C2220uF 10V

GROUND TEST POINTS

C1220uF 10V

iPWRNET

iPWRNET

5V0

VIN VOUT

ADJ

PSU_1V2PSU_NCP630_ADJ

1V2 POWER

1V2

C410uF 20V

C310uF 20V

TP25V0

TP43V3

TP52V5

TP61V8

TP71V2

TP3+B

TP1GND

GND

POWER TEST POINTS

GND5V0 3V3 2V5 1V8 1V2+BGND GND GND

GND

GND

5V0

GND

5V0

2V5

VOUT

ADJ

SET_1V2PSU_NCP630SET_1V21V2

VIN VOUT

ADJ

PSU_1V8PSU_1084_ADJ

1V8 POWER

1V8

3V3

VOUT

ADJ

SET_1V8PSU_1084SET_1V81V8

VIN VOUT

ADJ

PSU_2V5PSU_1084_ADJ

2V5 POWER

2V5

5V0

VOUT

ADJ

SET_2V5PSU_1084SET_2V52V5

VIN VOUT

ADJ

PSU_3V3PSU_1084_ADJ

3V3 POWER

3V3

5V0

VOUT

ADJ

SET_3V3PSU_1084SET_3V33V3

1 2NT1

GNDAUGND

iPWRNET

12

J11x2 HEADER MALE

12

J21x2 HEADER MALE

12

J31x2 HEADER MALE

TP8GND

2V5SET 1V2SET

1V8SET3V3SET

GND SHIELD

R24810M 1%

C1694.7nF 250V

VINVOUT

COM

PSU_A3V3_ADCPSU_TC1017R_3V3

3V35V0

ADCDAC_3V3

AGND

12 NT2

12 NT1

12

NT3

1 2NT11

GNDAGND

iPWRNET

PIC101

PIC102

COC1 PIC201

PIC202

COC2 PIC301

PIC302

COC3 PIC401

PIC402

COC4

PIC16901PIC16902

COC169

PIJ101

PIJ102

COJ1

PIJ201

PIJ202

COJ2

PIJ301

PIJ302

COJ3

PINT101 PINT102

CONT1

PINT201PINT202

CONT2

PINT301PINT302

CONT3

PINT1101 PINT1102

CONT11

PIR24801PIR24802

COR248

PITP101

COTP1

PITP201

COTP2

PITP301

COTP3

PITP401

COTP4

PITP501

COTP5

PITP601

COTP6

PITP701

COTP7

PITP801

COTP8

PITP301 PITP701

NL1V2SET

PITP601

NL1V8SET

PITP501

NL2V5SET

PITP401

NL3V3SET

PIC101 PIC201 PIC301 PIC401

PINT102

PITP201

PINT201

PINT301

PINT1101

PINT101

PIC102 PIC202 PIC302 PIC402

PIC16902

PIJ101

PIJ102

PIJ201

PIJ202

PIJ301

PIJ302

PINT102

PINT1102

PIR24802

PITP101 PITP801

PINT101

PINT202

PINT302

PIC16901

PIR24801

1

1

2

2

3

3

4

4

D D

C C

B B

A A

3 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_1084_ADJ.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU AP1084KL ADJ

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

GND

C310uF 20V

C4220uF 10V

C110uF 20V

GND GND

C21uF 25V

GND

VIN VOUT

ADJ

IN3

1

OUT 2ADJ

U1AP1084KL

PIC101

PIC102COC1 PIC201

PIC202COC2 PIC301

PIC302COC3

PIC401

PIC402COC4

PIU101PIU102PIU103

COU1

PIU101

POADJ

PIC102 PIC202 PIC302 PIC402

PIC101 PIC201

PIU103POVIN

PIC301 PIC401

PIU102 POVOUT

POADJ

POVIN POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

4 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_1084SET_1V8.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU AP1084KL 1V8

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

R1120R 1%

R256R 1%

GND

VOUT

ADJ

Vout = VREF { R21+ R1 }VREF = 1.25v

+ IADJ

I ADJ = 55uA (0.000055)

1.8V Output

R2

Calculation for 1.8V;

= 1.25V x (1+R2/R1) + 0.000055 x R2

= 1.25V x (1+56/120) + 0.000055 x 56

= 1.25V x 1.47 + 0.00308

= 1.83641V

PIR101

PIR102COR1

PIR201

PIR202

COR2

PIR101

PIR201

POADJ

PIR202

PIR102

POVOUT

POADJ

POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

5 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_1084SET_2V5.SchDoc

Project Title

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Revision:

Sheet ofTime:A4

Sheet Title PSU AP1084KL SET TO 2V5

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

GND

VOUT

ADJ

Vout = VREF { R21+ R1 }VREF = 1.25v

+ IADJ

I ADJ = 55uA (0.000055)

2.5V Output

R1120R 1%

R2120R 1%

R2

Calculation for 2.5V;

= 1.25V x (1+R2/R1) + 0.000055 x R2

= 1.25V x (1+120/120) + 0.000055 x 120

= 1.25V x 2 + 0.0066

= 2.50066V

PIR101

PIR102COR1

PIR201

PIR202

COR2

PIR101

PIR201

POADJ

PIR202

PIR102

POVOUT

POADJ

POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

6 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_1084SET_3V3.SchDoc

Project Title

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Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU AP1084KL SET TO 3V3

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

GND

VOUT

ADJ

Vout = VREF { R21+ R1 }VREF = 1.25v

+ IADJ

I ADJ = 55uA (0.000055)

3.3V Output

R1120R 1%

R2200R 1%

R2

Calculation for 3.3V;

= 1.25V x (1+R2/R1) + 0.000055 x R2

= 1.25V x (1+200/120) + 0.000055 x 200

= 1.25V x 2.67 + 0.011

= 3.34433V

PIR101

PIR102COR1

PIR201

PIR202

COR2

PIR101

PIR201

POADJ

PIR202

PIR102

POVOUT

POADJ

POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

7 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_NCP630_ADJ.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU NCP630A ADJ

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

GND GND

VOUT

ADJ

GND

C310uF 20V

C4220uF 10V

IN2 OUT 4

ADJ 5EN1

GN

D3

U1NCP630A

GND GND

VIN

C210uF 20V

C1220uF 10V

PIC101

PIC102COC1

PIC201

PIC202COC2

PIC301

PIC302COC3

PIC401

PIC402COC4

PIU101

PIU102

PIU103PIU104

PIU105

COU1

PIU105

POADJ

PIC102 PIC202 PIC302 PIC402

PIU103PIC101 PIC201

PIU101

PIU102POVIN

PIC301 PIC401

PIU104 POVOUT

POADJ

POVIN POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

8 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_NCP630SET_1V2.SchDoc

Project Title

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Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU NCP630A SET TO 1V2

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

GND

VOUT

ADJ

Vout = VREF { R11+ R2 }VREF = 1.216v

+ IADJ

I ADJ = 40nA (0.000000040)

1.2V Output

R210K 1%

R2

R10R 5%

Calculation for 1.2V;

= 1.216V x (1+R1/R2) + 0.000000040 x R2

= 1.216V x (1+0/10000) + 0.000000040 x 10000

= 1.216V x 1 + 0.0004

= 1.2164V

PIR101

PIR102COR1

PIR201

PIR202

COR2

PIR101

PIR201

POADJ

PIR202

PIR102

POVOUT

POADJ

POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

9 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPSU_TC1017R_3V3.SchDoc

Project Title

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Date:File:

Revision:

Sheet ofTime:A4

Sheet Title PSU TC1017R 3V3

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

VIN

VIN1

GND 2SHDN3NC 4VO 5

U1TC1017R-3.3VLTTR

C31uF 10V

C210uF 20V

C11uF 10V

VOUT

3V3

150mA

COM

50uVRMS

PIC101

PIC102COC1

PIC201

PIC202COC2

PIC301

PIC302COC3

PIU101

PIU102PIU103

PIU104

PIU105

COU1

PIC101 PIC202 PIC301PIU102

POCOM

PIU104

PIC102 PIU101

PIU103

POVIN

PIC201 PIC302PIU105

POVOUT

POCOM

POVIN POVOUT

1

1

2

2

3

3

4

4

D D

C C

B B

A A

10 81

NB3000AL - Altera02

1/02/2010 1:34:44 PMPWJACK+SWITCH.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title Power Jack & Switch

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

1

23

J1POWERJACK 3 HEADER

23

1

S1S2

SW1SPDT SUB

5V0+B +B

GND

D105V 5W

GND

+B

PID1001

PID1002COD10PIJ101

PIJ102

PIJ103

COJ1

PISW101

PISW102

PISW103

PISW10S1PISW10S2

COSW1

PID1002PIJ101 PISW103

PISW101

PISW102

PID1001PIJ102PIJ103

PISW10S1PISW10S2

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

1102

1/02/2010 1:34:45 PMHost_FPGA.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A2

Sheet Title Host Controller - Altera - EP3C10

Assy:

81

NB3000AL - AlteraD-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

FLASH2_CS_NDIN

DOUTSCLK

FLASH1_CS_N

SERIALFLASH

TMSTDO

TDITCK

TMSTDO

TDITCK

HARD

SOFT

HARDSOFT_JTAG

DAT[3..0]CMDCLK

DETECTPROTECT

SDTMS

TDO

TDI

TCK

TMS

TDOTDI

TCK

HARD

SOFT

HARDSOFT_JTAG

FPGA_TDIFPGA_TCKFPGA_TMSFPGA_TDO

NEXUS_TMSNEXUS_TDO

NEXUS_TDINEXUS_TCK

CLKOE

USER FPGA JTAG HOST USB SRAM - 64K/256K x 16

HOSTUSB

HOST_SOFT_TDI

HOST_SOFT_TMS

HOST_SOFT_TDO

HOST_SOFT_TCK

REF_CLKFPGA_CLK

HOST JTAG

HOST_JTAG

HOST_HARD_TDIHOST_HARD_TMS

HOST_HARD_TDOHOST_HARD_TCK

ONE WIRE ID

USERFLASH_DOUT

USERFLASH1_CS_N

USERFLASH2_CS_N

CLKGEN_CS_N

RTC_CS

RTC_DOUT

USERFLASH_SCLK

CLKGEN_SCLK

RTC_SCLK

USERFLASH_DIN

CLKGEN_DIN

RTC_DIN

SD_DAT[3..0]SD_CMDSD_CLKSD_DETECTSD_PROTECT

SD

DB_JTAG

SYSTEM CLOCKS

FLASH_USER

HOST RTC

FLASH_BOOT_CLKFLASH_BOOT_DIN

USER 8MB SPI FLASH x2

SYSBOOT

LED1_GREENLED1_BLUE

LED1_RED

LED2_GREENLED2_BLUE

LED2_RED

Host LEDsHOST SD CARD

HOST AUDIO - Delta-Sigma

USER FPGA PROGRAM

USER FPGA SPI

USER FPGA CLOCKS

TMSTCK

TDI

TDO

DCLK

HOST_NonIOHost_FPGA_NonIO.SchDoc

LR

STEREO

AOUT_RAOUT_L

HOST_AUDIO

CS_N

DINDOUT

INT_N

SCLK

CLKOUTCLKOE

RTC

RTC

CLKOUTRTC_INT_N

FPGA_CCLK

FPGA_DINFPGA_DONE

FPGA_ID[3..0]

FPGA_INITFPGA_M[2..0]

FPGA_PROG_CLKFPGA_PROG_PWR_ON

FPGA_PROGRAM

DINDONE

INSTALLEDID[3..0]

CCLKPROGRAM

M[2..0]INIT

PROG_PWR_ONPROG_CLK

DAU_CTRL

DB_PROGRAM

R1_HOST5R6 1%

DATAEXT_PROG

1W

1WID

CLK_FIXEDCLK_PROG

CS_NDIN

SCLK

CLK_PLL

CLK_PLL

A[18..0]D[15..0]

NCSNWENOE

NBHENBLE

SRAM-256Kx16SRAM_A[18..0]SRAM_D[15..0]

SRAM_NWESRAM_NOE

SRAM_NCS

SRAM_NBHE

SRAM

SRAM_NBLE

GREENRED

BLUE

RGB_LED

LED1

GREENRED

BLUE

RGB_LED

LED2

REF_CLKFPGA_CLK

FPGA_CLK1

DB_CLOCKSREF_CLKFPGA_CLK

DB_CLK1DB_CLOCKS

MODESEL

CLKDIN

DOUT

DB_SPI DAU_SPI_CLK

DAU_SPI_DINDAU_SPI_DOUT

DAU_SPI_MODEDAU_SPI_SEL

DB_SPI

PLATFORM UPGRADE

HARD

SOFT

DETECT

TDITDOTCKTMS

TDITDOTCKTMS

ENCLK[2..0]

IDPIO[1..2]

ONE_WIRE_PB_ID_AONE_WIRE_PIOA[1..2]

PB_SPAREA[1..4]

CLK_ENACLK_EXTA[2..0]

EXTSPI_CSA_N[1..0]

AUTO_TDI_HARDAUTO_TDO_HARD

AUTO_TMS_HARDAUTO_TCK_HARD

AUTO_TDI_SOFTAUTO_TDO_SOFTAUTO_TCK_SOFTAUTO_TMS_SOFT

AUTO_JTAG

JTAG

CLK

1W

SPI_CS_N[1..0]SPARE[1..4]

PBCTRL

PB_A

PB - Control

DOUTDIN

SCLK

EXTSPI

EXTSPI_SCLK

EXTSPI_DOUTEXTSPI_DINEXTSPI DIN

DOUT

SCLK

FLASH_CS_N

SERFLASH

FLASH_BOOT

GOLDEN

FLASH_GOLD_CS_N

DINDOUT

SCLK

FLASH_CS_N

SERFLASH

FLASH_GOLDEN

READYINT_N

SLOEFIFOADR2FIFOADR0FIFOADR1

PKTENDFLAGD_CS_N

FLAGAFLAGBFLAGC

WR_NRD_N

D[15..0]RESET_N

IFCLKXTALIN

VBUS

XTALOUT

USB_INTF

USB2

HUSB_WR_NHUSB_RD_NHUSB_D[15..0]HUSB_RESET_N

HUSB_READYHUSB_INT_N

HUSB_SLOEHUSB_FIFOADR2HUSB_FIFOADR0HUSB_FIFOADR1HUSB_PKTEND

HUSB_FLAGAHUSB_FLAGBHUSB_FLAGC

HUSB_IFCLK

HUSB_VBUS

HUSB_FLAGD_CS_N

R14K7 1%

3V3

R24K7 1%

R310K 1%

GND

3V3

PB SPI

1V2

3V3

HOST_DECOUPLING_CAPS_1V2FPGA_Bypass_1V2.SCHDOC

HOST_DECOUPLING_CAPS_3V3FPGA_Bypass_3V3.SCHDOC

USB_XTALINUSB_XTALOUT

3V3

3V3

R269330R 1%

R2702K2 1%

R2711K 1%

DIAG_DOUT

DIAG_CLKDIAG_DIN

DIAG_CS_N

DINDOUT

SCLK

FLASH_CS_N

DIAGCOMMS

DIAGCOMMS

3V3DIAG_CS_NR994K7 1%

ONE_WIRE_ID

BA

NK

1 IOD4

IO E5

IO F5

IO, (DQS2L/CQ3L)/(DQS2L/CQ3L) B1

IO, DIFFIO_L1p C2

IO, DIFFIO_L1n, (DATA1, ASDO) C1

IO, VREFB1N0 F3

IO, DIFFIO_L2p, (FLASH_nCE, nCSO) D2

IO, DIFFIO_L2n D1

IO G5

IO, DIFFIO_L3p F2

IO, DIFFIO_L3n F1

IO, DIFFIO_L4p, (DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0) G2

IO, DIFFIO_L4n G1

IO, (DATA0) H2

U30A

EP3C10F256C8

BA

NK

2 IO, DIFFIO_L5p, (DQ1L)/_J2

IO, DIFFIO_L5n, (DQ1L)/_ J1

IO J6

IO, DIFFIO_L6p K6

IO, DIFFIO_L6n L6

IO, DIFFIO_L7p K2

IO, DIFFIO_L7n, (DQ1L)/_ K1

IO, DIFFIO_L8p, (DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1) L2

IO, DIFFIO_L8n, (DQ1L)/_ L1

IO, VREFB2N0 L3

IO, DIFFIO_L9p, (DQ1L)/_ N2

IO, DIFFIO_L9n, (DQ1L)/_ N1

IO, RUP1, (DQ1L)/_ K5

IO, RDN1, (DQ1L)/_ L4

IO, (DQS3L/CQ3L#)/(DQS3L/CQ3L#) R1

IO, DIFFIO_L10p, (DQ1L)/_ P2

IO, DIFFIO_L10n, (DM1L/BWS#1L)/_ P1

U30B

EP3C10F256C8

BA

NK

3 IO, DIFFIO_B1pN3

IO, DIFFIO_B1n, (DM3B/BWS#3B)/(DM5B1/BWS#5B1) P3

IO, DIFFIO_B2p, (DQ3B)/(DQ5B) R3

IO, DIFFIO_B2n T3

IO, (DQS1B/CQ1B#,DPCLK2)/(DQS1B/CQ1B#,DPCLK2) T2

IO, PLL1_CLKOUTp R4

IO, PLL1_CLKOUTn T4

IO, DIFFIO_B4p, (DQ3B)/(DQ5B) N5

IO, DIFFIO_B4n, (DQ3B)/(DQ5B) N6

IO, (DQ3B)/(DQ5B) M6

IO, VREFB3N0 P6

IO, DIFFIO_B5p, (DQS3B/CQ3B#)/(DQS3B/CQ3B#) M7

IO, DIFFIO_B5n K8

IO, DIFFIO_B6p, (DQ3B)/(DQ5B) R5

IO, DIFFIO_B6n T5

IO, DIFFIO_B7p, (DQ3B)/(DQ5B) R6

IO, DIFFIO_B7n T6

IO, (DQ3B)/(DQ5B) L7

IO, DIFFIO_B8p, (DQ3B)/(DQ5B) R7

IO, DIFFIO_B8n, (DQS5B/CQ5B#)/(DQS5B/CQ5B#) T7

IO, DIFFIO_B9p, (DQ3B)/(DQ5B) L8

IO, DIFFIO_B9n, (DM5B/BWS#5B)/(DM5B0/BWS#5B0) M8

IO, DIFFIO_B10p, (DQ5B)/(DQ5B) N8

IO, DIFFIO_B10n, (DQ5B)/(DQ5B) P8

IO, DIFFIO_B11p R8

IO, DIFFIO_B11n T8

U30C

EP3C10F256C8

BA

NK

4 IO, DIFFIO_B12pR9

IO, DIFFIO_B12n T9

IO, DIFFIO_B13p K9

IO, DIFFIO_B13n L9

IO, DIFFIO_B14p M9

IO, DIFFIO_B14n, (DQ5B)/(DQ5B) N9

IO, DIFFIO_B15p, (DQ5B)/(DQ5B) R10

IO, DIFFIO_B15n, (DQS4B/CQ5B)/(DQS4B/CQ5B) T10

IO, DIFFIO_B16p, (DQ5B)/(DQ5B) R11

IO, DIFFIO_B16n T11

IO, DIFFIO_B17p, (DQ5B)/(DQ5B) R12

IO, DIFFIO_B17n, (DQ5B)/(DQ5B) T12

IO, DIFFIO_B18p K10

IO, DIFFIO_B18n L10

IO, (DQS2B/CQ3B)/(DQS2B/CQ3B) P9

IO, VREFB4N0 P11

IO, DIFFIO_B19p R13

IO, DIFFIO_B19n, (DQ5B)/(DQ5B) T13

IO, RUP2 M10

IO, RDN2 N11

IO, DIFFIO_B20p, (DQ5B)/(DQ5B) T14

IO, DIFFIO_B20n, (DQS0B/CQ1B,DPCLK3)/(DQS0B/CQ1B,DPCLK3) T15

IO R14

IO, DIFFIO_B21p P14

IO, DIFFIO_B21n L11

IO, DIFFIO_B22p M11

IO, DIFFIO_B22n N12

U30D

EP3C10F256C8

BA

NK

5 ION13

IO M12

IO L12

IO K12

IO, RUP3, (DM1R/BWS#1R)/_ N14

IO, RDN3, (DQ1R)/_ P15

IO, DIFFIO_R11n, (DQS3R/CQ3R#)/(DQS3R/CQ3R#) P16

IO, DIFFIO_R11p, (DQ1R)/_ R16

IO K11

IO, DIFFIO_R10n, (DQ1R)/_ N16

IO, DIFFIO_R10p, (DQ1R)/_ N15

IO, VREFB5N0 L14

IO, (DQ1R)/_ L13

IO, DIFFIO_R9n, (DQ1R)/_ L16

IO, DIFFIO_R9p L15

IO J11

IO, DIFFIO_R8n, (DQ1R)/_ K16

IO, DIFFIO_R8p, (DQS1R/CQ1R#,DPCLK4)/(DQS1R/CQ1R#,DPCLK4) K15

IO, DIFFIO_R7n, (DEV_OE) J16

IO, DIFFIO_R7p, (DEV_CLRn) J15

IO, DIFFIO_R6n, (DQ1R)/_ J14

IO, DIFFIO_R6p J12

IO, (DQ1R)/_ J13

U30E

EP3C10F256C8

BA

NK

6 IO, DIFFIO_R5nH16

IO, DIFFIO_R5p H15

IO, DIFFIO_R4n, (INIT_DONE) G16

IO, DIFFIO_R4p, (CRC_ERROR) G15

IO F13

IO, DIFFIO_R3n, (nCEO) F16

IO, DIFFIO_R3p, (CLKUSR) F15

IO, (DQS0R/CQ1R,DPCLK5)/(DQS0R/CQ1R,DPCLK5) B16

IO, VREFB6N0 F14

IO, DIFFIO_R2n D16

IO, DIFFIO_R2p D15

IO G11

IO, DIFFIO_R1n, (DQS2R/CQ3R)/(DQS2R/CQ3R) C16

IO, DIFFIO_R1p C15

U30F

EP3C10F256C8

BA

NK

7 IO, DIFFIO_T21nC14

IO, DIFFIO_T21p, (DQ5T)/(DQ5T) D14

IO, DIFFIO_T20n D11

IO, DIFFIO_T20p, (DQS0T/CQ1T,DPCLK6)/(DQS0T/CQ1T,DPCLK6) D12

IO, DIFFIO_T19n A13

IO, DIFFIO_T19p, (DQ5T)/(DQ5T) B13

IO, PLL2_CLKOUTn A14

IO, PLL2_CLKOUTp B14

IO, RUP4 E11

IO, RDN4 E10

IO, DIFFIO_T18n, (DQ5T)/(DQ5T) A12

IO, DIFFIO_T18p, (DQ5T)/(DQ5T) B12

IO, DIFFIO_T17n, (DQ5T)/(DQ5T) A11

IO, DIFFIO_T17p, (DQ5T)/(DQ5T) B11

IO, VREFB7N0 C11

IO, DIFFIO_T16n F10

IO, DIFFIO_T16p, (DQS2T/CQ3T)/(DQS2T/CQ3T) F9

IO, DIFFIO_T15n F11

IO, DIFFIO_T15p A15

IO, DIFFIO_T14n, (DQ5T)/(DQ5T) A10

IO, DIFFIO_T14p, (DQ5T)/(DQ5T) B10

IO, DIFFIO_T13n, (DQ5T)/(DQ5T) C9

IO, DIFFIO_T13p, (DM5T/BWS#5T)/(DM5T0/BWS#5T0) D9

IO, (DQS4T/CQ5T)/(DQS4T/CQ5T) E9

IO, DIFFIO_T12n A9

IO, DIFFIO_T12p B9

U30G

EP3C10F256C8

BA

NK

8 IO, DIFFIO_T11nA8

IO, DIFFIO_T11p B8

IO, (DQS5T/CQ5T#)/(DQS5T/CQ5T#) C8

IO, (DQ3T)/(DQ5T) D8

IO, DIFFIO_T10n, (DATA2), (DQ3T)/(DQ5T) E8

IO, DIFFIO_T10p, (DATA3) F8

IO, DIFFIO_T9n, (DQ3T)/(DQ5T) A7

IO, DIFFIO_T9p, (DATA4), (DQ3T)/(DQ5T) B7

IO, DIFFIO_T8n F6

IO, DIFFIO_T8p F7

IO, VREFB8N0 C6

IO, DIFFIO_T7n, (DQS3T/CQ3T#)/(DQS3T/CQ3T#) A6

IO, DIFFIO_T7p, (DQ3T)/(DQ5T) B6

IO, (DATA5), (DQ3T)/(DQ5T) E7

IO, (DATA6), (DQ3T)/(DQ5T) E6

IO, (DATA7), (DQ3T)/(DQ5T) A5

IO, DIFFIO_T5n A2

IO, DIFFIO_T5p, (DQ3T)/(DQ5T) B5

IO, DIFFIO_T4n, (DM3T/BWS#3T)/(DM5T1/BWS#5T1) A4

IO, DIFFIO_T4p B4

IO, DIFFIO_T3n D5

IO, DIFFIO_T3p D6

IO, DIFFIO_T2n A3

IO, DIFFIO_T2p, (DQS1T/CQ1T#,DPCLK7)/(DQS1T/CQ1T#,DPCLK7) B3

IO, DIFFIO_T1n C3

IO, DIFFIO_T1p D3

U30H

EP3C10F256C8

CLK0, DIFFCLK_0p E2

CLK1, DIFFCLK_0n E1

CLK2, DIFFCLK_1p M2

CLK3, DIFFCLK_1n M1

CLK7, DIFFCLK_3n M16CLK6, DIFFCLK_3p M15CLK5, DIFFCLK_2n E16CLK4, DIFFCLK_2p E15

U30I

EP3C10F256C8

FPGA_CLK

DAU_SPI_DIN

FPGA_DONE

FLASH_GOLD_CS_N

HUSB_D14

HUSB_RD_N

HUSB_D9

HUSB_D7

HUSB_D13

HUSB_D2

HUSB_D10

SRAM_D4

SRAM_A2

SRAM_D0

LED2_BLUE

FPGA_DIN

FPGA_ID3

NEXUS_TDO

FPGA_TCK

HUSB_FLAGD_CS_N

HUSB_PKTEND

DAU_SPI_MODE

HOST_SOFT_TDO

HUSB_FLAGA

HUSB_VBUS

SRAM_A1

SRAM_NOE

LED2_RED

HUSB_RESET_N

HUSB_D11

HUSB_INT_N

HUSB_IFCLK

SRAM_D6

SRAM_D14SRAM_NWE

RTC_DIN

LED1_GREEN

AUTO_TDO_HARD

FPGA_ID1

DAU_SPI_SELFPGA_INIT

HUSB_D8

HUSB_FIFOADR2

HUSB_D3SRAM_A0

SRAM_NBHE

SRAM_D11

NEXUS_TMS

DAU_SPI_DOUTDAU_SPI_CLK

HUSB_FIFOADR0

HUSB_FLAGC

HUSB_FLAGB

AUTO_TDI_HARDAOUT_R

CLKOE

LED1_RED

FPGA_TMSHUSB_D15

FPGA_TDI

HUSB_D0HUSB_D6

HUSB_D5

SRAM_NCS

DB_CLK1

CLKGEN_SCLKSRAM_D8

RTC_CS

SRAM_D10

HOST_SOFT_TMSSRAM_D15

PB_SPAREA2

SRAM_A16SRAM_A3

AUTO_TDI_SOFTUSERFLASH_SCLK

SRAM_A12

SRAM_A14HUSB_READY

HOST_SOFT_TDISRAM_A18HUSB_D4

PB_SPAREA3

DIAG_DOUT

CLK_EXTA0

SRAM_D12

SRAM_A10

HUSB_D12

REF_CLK

EXTSPI_DIN

CLK_EXTA1

CLK_EXTA2

SRAM_A11

ONE_WIRE_IDSRAM_D9

HOST_SOFT_TCK

HUSB_WR_N

FLASH_BOOT_CLK

RTC_INT_NONE_WIRE_PIOA1DIAG_CLK

USERFLASH_DOUT

EXTSPI_CSA_N0USERFLASH_DIN

SD_DETECT

SD_CLK

SRAM_A8

SRAM_A13

EXTSPI_DOUTDIAG_CS_N

SD_DAT0

AUTO_TMS_HARD

FPGA_ID0

SRAM_NBLECLKGEN_CS_N

SD_PROTECT

SD_DAT1

ONE_WIRE_PB_ID_A

SRAM_A15

SD_CMDSD_DAT3

DIAG_DIN

SD_DAT2

PLL1

PLL2

HUSB_SLOE

HUSB_FIFOADR1

AUTO_TCK_HARD

NEXUS_TCK

SRAM_A4

EXTSPI_SCLKAOUT_L

AUTO_TDO_SOFT

CLKOUT

EXTSPI_CSA_N1

FPGA_M0

RTC_DOUT

RTC_SCLK

FLASH_BOOT_DOUT

FLASH_BOOT_CS_N

NEXUS_TDI

SRAM_D1

AUTO_TCK_SOFT

FPGA_CCLK

PB_SPAREA4

ONE_WIRE_PIOA2

CLK_ENA

SRAM_A7

SRAM_A9

SRAM_A6

SRAM_A17

USERFLASH1_CS_N

CLKGEN_DIN

AUTO_JTAG

LED1_BLUE

AUTO_TMS_SOFT

LED2_GREEN

FPGA_TDO

FPGA_ID2

SRAM_D3

SRAM_D5

HUSB_D1

FLASH_BOOT_DIN

USERFLASH2_CS_N

PB_SPAREA1

FPGA_PROGRAM

SRAM_A5

SRAM_D13

SRAM_D7SRAM_D2

FLASH_GOLD_CS_NFLASH_BOOT_CS_N

FLASH_GOLD_CS_N

FLASH_BOOT_CLKFLASH_BOOT_DIN

FLASH_MAIN_CS_N

FLASH_MAIN_CS_N

PLATFORM UPGRADENO JUMPER INSTALLED - BOOT FROM MAIN FLASHJUMPER PINS 1 AND 2 - BOOT FROM GOLD FLASH

Altera SCD

Altera SCD

FLASH_BOOT_SEL

GND

3V3

FLASH_BOOT_CLK

FLASH_BOOT_SELFLASH_BOOT_SEL

FLASH_BOOT_SEL

FLASH_MAIN_CS_N

B1 1

GND 2

B0 3A4VCC5 S 6

U69FSA4157

12

J241x2 HEADER MALE

FLASH_BOOT_DATAOUT

FLASH_BOOT_DATAOUT

FLASH_BOOT_DATAOUT

EXT

INT

PULLDOWNPULLDNx3.SCHDOC

EXT INT

PULLDOWNPULLDNx3.SCHDOC

PIJ2401PIJ2402

COJ24

PIR101 PIR102

COR1

PIR10HOST01PIR10HOST02

COR10HOST

PIR201 PIR202

COR2

PIR301 PIR302

COR3

PIR9901 PIR9902

COR99

PIR26901 PIR26902

COR269

PIR27001 PIR27002

COR270

PIR27101 PIR27102

COR271PIU300B1

PIU300C1

PIU300C2

PIU300D1

PIU300D2

PIU300D4

PIU300E5

PIU300F1

PIU300F2

PIU300F3

PIU300F5

PIU300G1

PIU300G2

PIU300G5

PIU300H2

COU30A

PIU300J1

PIU300J2

PIU300J6

PIU300K1

PIU300K2

PIU300K5

PIU300K6

PIU300L1

PIU300L2

PIU300L3

PIU300L4

PIU300L6

PIU300N1

PIU300N2

PIU300P1

PIU300P2PIU300R1

COU30B

PIU300K8

PIU300L7

PIU300L8

PIU300M6

PIU300M7

PIU300M8

PIU300N3

PIU300N5

PIU300N6

PIU300N8

PIU300P3

PIU300P6

PIU300P8

PIU300R3

PIU300R4

PIU300R5

PIU300R6

PIU300R7

PIU300R8

PIU300T2PIU300T3

PIU300T4

PIU300T5

PIU300T6

PIU300T7

PIU300T8

COU30C

PIU300K9

PIU300K10

PIU300L9

PIU300L10

PIU300L11

PIU300M9

PIU300M10

PIU300M11

PIU300N9

PIU300N11

PIU300N12

PIU300P9PIU300P11

PIU300P14

PIU300R9

PIU300R10

PIU300R11

PIU300R12

PIU300R13

PIU300R14

PIU300T9

PIU300T10

PIU300T11

PIU300T12

PIU300T13

PIU300T14

PIU300T15

COU30D

PIU300J11

PIU300J12

PIU300J13

PIU300J14

PIU300J15

PIU300J16

PIU300K11

PIU300K12

PIU300K15

PIU300K16

PIU300L12

PIU300L13

PIU300L14

PIU300L15

PIU300L16

PIU300M12PIU300N13

PIU300N14

PIU300N15

PIU300N16

PIU300P15

PIU300P16PIU300R16

COU30E

PIU300B16

PIU300C15

PIU300C16

PIU300D15

PIU300D16

PIU300F13

PIU300F14

PIU300F15

PIU300F16

PIU300G11

PIU300G15

PIU300G16PIU300H15

PIU300H16

COU30FPIU300A9

PIU300A10

PIU300A11

PIU300A12

PIU300A13

PIU300A14

PIU300A15

PIU300B9

PIU300B10

PIU300B11

PIU300B12

PIU300B13

PIU300B14

PIU300C9

PIU300C11

PIU300C14

PIU300D9

PIU300D11

PIU300D12

PIU300D14

PIU300E9

PIU300E10

PIU300E11

PIU300F9

PIU300F10

PIU300F11

COU30G

PIU300A2

PIU300A3

PIU300A4

PIU300A5

PIU300A6

PIU300A7

PIU300A8

PIU300B3

PIU300B4

PIU300B5

PIU300B6

PIU300B7

PIU300B8

PIU300C3

PIU300C6

PIU300C8

PIU300D3

PIU300D5

PIU300D6

PIU300D8

PIU300E6PIU300E7

PIU300E8

PIU300F6

PIU300F7

PIU300F8

COU30H

PIU300E1

PIU300E2

PIU300E15

PIU300E16

PIU300M1PIU300M2

PIU300M15

PIU300M16

COU30I

PIU6901

PIU6902

PIU6903PIU6904

PIU6905 PIU6906

COU69

PIR102

PIR202

PIR9902

PIR26902

PIR27002

PIU6905

PIU300G2

NLAOUT0LPOHOST0AUDIO

PIU300F2

NLAOUT0RPOHOST0AUDIO

PIU300R1

NLAUTO0JTAG

POPB0A

PIU300F3

NLAUTO0TCK0HARD

POPB0A

PIU300L1

NLAUTO0TCK0SOFT

POPB0A

PIU300F1

NLAUTO0TDI0HARD

POPB0A

PIU300J1

NLAUTO0TDI0SOFT

POPB0A

PIU300D3

NLAUTO0TDO0HARD

POPB0A

PIU300J2

NLAUTO0TDO0SOFT

POPB0A

PIU300P9

NLAUTO0TMS0HARD

POPB0A

PIU300R8

NLAUTO0TMS0SOFT

POPB0A

PIU300M9

NLCLK0ENAPOPB0A

PIU300P16

NLCLKGEN0CS0N

POCLK0PLL

PIU300P11

NLCLKGEN0DINPOCLK0PLL

PIU300F15

NLCLKGEN0SCLK

POCLK0PLL

PIU300C3

NLCLKOEPORTC

PIU300K1

NLCLKOUT

PORTC

PIU300E7

NLDAU0SPI0CLK

PODB0SPI

PIU300A3

NLDAU0SPI0DINPODB0SPI

PIU300E6

NLDAU0SPI0DOUT

PODB0SPI

PIU300B10

NLDAU0SPI0MODEPODB0SPI

PIU300D5

NLDAU0SPI0SELPODB0SPI

PIR10HOST01

PIU300F14NLDB0CLK1

PIU300N2

NLDIAG0CLKPODIAGCOMMS

PIR9901

PIU300P2

NLDIAG0CS0N

PODIAGCOMMS

PIU300T4

NLDIAG0DINPODIAGCOMMS

PIU300K5

NLDIAG0DOUTPODIAGCOMMS

PIU300L2

NLEXTSPI0DINPOEXTSPI

PIU300P1

NLEXTSPI0DOUTPOEXTSPI

PIU300G1

NLEXTSPI0SCLKPOEXTSPI

PIU300L6

NLFLASH0BOOT0CLKPOFLASH0BOOT

POFLASH0GOLDEN

PIU300D2 PIU6904NLFLASH0BOOT0CS0N

PIR302

NLFLASH0BOOT0DATAOUTPOFLASH0BOOT

POFLASH0GOLDEN

PIU300C1

NLFLASH0BOOT0DINPOFLASH0BOOT

POFLASH0GOLDEN

PIR301PIU300H2NLFLASH0BOOT0DOUT

PIJ2401

PIR27101

PIU300K16

PIU6906

NLFLASH0BOOT0SEL

PIR201

PIU300A5

PIU6901

NLFLASH0GOLD0CS0N

POFLASH0GOLDEN

PIR101

PIU6903

NLFLASH0MAIN0CS0N

POFLASH0BOOT

PIU300A2

NLFPGA0CCLKPODB0PROGRAM

PIU300E2

NLFPGA0CLK

POCLK0PLL

PODB0CLOCKS

PIU300B3

NLFPGA0DIN

PODB0PROGRAM

PIU300A4

NLFPGA0DONE

PODB0PROGRAM

PIU300D6

NLFPGA0INIT

PODB0PROGRAM

NLFPGA0PROG0CLK

PODB0PROGRAM

NLFPGA0PROG0PWR0ON

PODB0PROGRAM

PIU300T9

NLFPGA0PROGRAMPODB0PROGRAM

PIU300B6

NLFPGA0TCK

PODB0JTAG

PIU300F8

NLFPGA0TDI

PODB0JTAG

PIU300R10

NLFPGA0TDO

PODB0JTAG

PIU300F6

NLFPGA0TMS

PODB0JTAG

PIR27102

PIU6902

NLHOST0HARD0TCK

POHOST0JTAG

NLHOST0HARD0TDI

POHOST0JTAG

NLHOST0HARD0TDO

POHOST0JTAG

NLHOST0HARD0TMS

POHOST0JTAG

PIU300E15

NLHOST0SOFT0TCKPOHOST0JTAG

PIU300J14

NLHOST0SOFT0TDI

POHOST0JTAG

PIU300B11

NLHOST0SOFT0TDO

POHOST0JTAG

PIU300G15

NLHOST0SOFT0TMSPOHOST0JTAG

PIU300E8

NLHUSB0FIFOADR0

POHOSTUSB

PIU300D16

NLHUSB0FIFOADR1

POHOSTUSB

PIU300D9

NLHUSB0FIFOADR2

POHOSTUSB

PIU300B12

NLHUSB0FLAGA

POHOSTUSB

PIU300E11

NLHUSB0FLAGB

POHOSTUSB

PIU300E9

NLHUSB0FLAGC

POHOSTUSB

PIU300B7

NLHUSB0FLAGD0CS0N

POHOSTUSB

PIU300C11

NLHUSB0IFCLK

POHOSTUSB

PIU300C9

NLHUSB0INT0N

POHOSTUSB

PIU300B9

NLHUSB0PKTEND

POHOSTUSB

PIU300A7

NLHUSB0RD0N

POHOSTUSB

PIU300J13

NLHUSB0READY

POHOSTUSB

PIU300C6

NLHUSB0RESET0NPOHOSTUSB

PIU300B8

NLHUSB0SLOEPOHOSTUSB

PIU300B13

NLHUSB0VBUS

POHOSTUSB

PIU300L16

NLHUSB0WR0N

POHOSTUSB

POLED1POLED1POLED1

PIU300R7

NLLED10BLUE

PIU300K8

NLLED10GREEN

PIU300F5

NLLED10RED

POLED2POLED2POLED2

PIU300B1

NLLED20BLUE

PIU300R9

NLLED20GREEN

PIU300C2

NLLED20RED

PODB0PROGRAM

PO1WID

PIJ2402

PIR26901

PIR10HOST02

PODB0CLOCKS

PIR27001

PIU300E1

PIU300E16

PIU300L8

PIU300L10

PIU300L15

PIU300M1PIU300M2

PIU300M10

PIU300M16

PIU300N9

PIU300P8

PIU300T10

PIU300T11

PIU300T2

NLNEXUS0TCK

PODB0JTAG

PIU300L9

NLNEXUS0TDIPODB0JTAG

PIU300B5

NLNEXUS0TDO

PODB0JTAG

PIU300E5

NLNEXUS0TMS

PODB0JTAG

PIU300L13

NLONE0WIRE0IDPO1WID

PIU300R6

NLONE0WIRE0PB0ID0A

POPB0A

PIU300M15

NLREF0CLK

POCLK0PLL

PODB0CLOCKS

PIU300G5

NLRTC0CS

PORTC

PIU300D1

NLRTC0DINPORTC

PIU300K10

NLRTC0DOUT

PORTC

PIU300M12

NLRTC0INT0N

PORTC

PIU300M6

NLRTC0SCLK

PORTC

PIU300N12

NLSD0CLKPOSD

PIU300R3

NLSD0CMD

POSD

PIU300N8

NLSD0DETECTPOSD

PIU300R4

NLSD0PROTECTPOSD

PIU300D14

NLSRAM0NBHE

POSRAM

PIU300P15

NLSRAM0NBLE

POSRAM

PIU300F13

NLSRAM0NCS

POSRAM

PIU300B16

NLSRAM0NOEPOSRAM

PIU300C16

NLSRAM0NWEPOSRAM

NLUSB0XTALIN

POHOSTUSB

NLUSB0XTALOUT

POHOSTUSB

PIU300P6

NLUSERFLASH10CS0N

POFLASH0USER

PIU300T7

NLUSERFLASH20CS0N

POFLASH0USER

PIU300N6

NLUSERFLASH0DIN

POFLASH0USER

PIU300N3

NLUSERFLASH0DOUTPOFLASH0USER

PIU300J6

NLUSERFLASH0SCLKPOFLASH0USER

PIU300K6

NLCLK0EXTA020000

NLCLK0EXTA0

POPB0A

PIU300L3

NLCLK0EXTA020000

NLCLK0EXTA1

POPB0A

PIU300L4

NLCLK0EXTA020000

NLCLK0EXTA2

POPB0A

PIU300N5

NLEXTSPI0CSA0N010000

NLEXTSPI0CSA0N0

POPB0A

PIU300M7

NLEXTSPI0CSA0N010000

NLEXTSPI0CSA0N1

POPB0A

PIU300B4

NLFPGA0ID030000

NLFPGA0ID3

PODB0PROGRAM

PIU300R11

NLFPGA0ID030000

NLFPGA0ID2

PODB0PROGRAM

PIU300D4

NLFPGA0ID030000

NLFPGA0ID1

PODB0PROGRAM

PIU300P14

NLFPGA0ID030000

NLFPGA0ID0

PODB0PROGRAMNLFPGA0M020000

PODB0PROGRAMNLFPGA0M020000

PODB0PROGRAM

PIU300K9

NLFPGA0M020000

NLFPGA0M0

PODB0PROGRAM

PIU300F7

NLHUSB0D0150000

NLHUSB0D15

POHOSTUSB

PIU300A6

NLHUSB0D0150000

NLHUSB0D14

POHOSTUSB

PIU300A10

NLHUSB0D0150000

NLHUSB0D13

POHOSTUSB

PIU300K15

NLHUSB0D0150000

NLHUSB0D12

POHOSTUSB

PIU300C8

NLHUSB0D0150000

NLHUSB0D11

POHOSTUSB

PIU300A12

NLHUSB0D0150000

NLHUSB0D10

POHOSTUSB

PIU300A8

NLHUSB0D0150000

NLHUSB0D9

POHOSTUSB

PIU300D8

NLHUSB0D0150000

NLHUSB0D8

POHOSTUSB

PIU300A9

NLHUSB0D0150000

NLHUSB0D7

POHOSTUSB

PIU300F10

NLHUSB0D0150000

NLHUSB0D6

POHOSTUSB

PIU300F11

NLHUSB0D0150000

NLHUSB0D5

POHOSTUSB

PIU300J16

NLHUSB0D0150000

NLHUSB0D4

POHOSTUSB

PIU300D11

NLHUSB0D0150000

NLHUSB0D3

POHOSTUSB

PIU300A11

NLHUSB0D0150000

NLHUSB0D2

POHOSTUSB

PIU300R14

NLHUSB0D0150000

NLHUSB0D1

POHOSTUSB

PIU300F9

NLHUSB0D0150000

NLHUSB0D0

POHOSTUSB

PIU300N1

NLONE0WIRE0PIOA010020

NLONE0WIRE0PIOA1

POPB0A

PIU300M8

NLONE0WIRE0PIOA010020

NLONE0WIRE0PIOA2

POPB0A

PIU300L7

NLPB0SPAREA010040

NLPB0SPAREA4

POPB0A

PIU300K2

NLPB0SPAREA010040

NLPB0SPAREA3

POPB0A

PIU300T6

NLPB0SPAREA010040

NLPB0SPAREA2

POPB0A

PIU300T8

NLPB0SPAREA010040

NLPB0SPAREA1

POPB0A

PIU300T3

NLSD0DAT030000

NLSD0DAT3

POSD

PIU300T5

NLSD0DAT030000

NLSD0DAT2

POSD

PIU300R5

NLSD0DAT030000

NLSD0DAT1

POSD

PIU300P3

NLSD0DAT030000

NLSD0DAT0

POSD

PIU300J15

NLSRAM0A0180000

NLSRAM0A18

POSRAM

PIU300N15

NLSRAM0A0180000

NLSRAM0A17

POSRAM

PIU300H15

NLSRAM0A0180000

NLSRAM0A16

POSRAM

PIU300R16

NLSRAM0A0180000

NLSRAM0A15

POSRAM

PIU300J12

NLSRAM0A0180000

NLSRAM0A14

POSRAM

PIU300N16

NLSRAM0A0180000

NLSRAM0A13

POSRAM

PIU300J11

NLSRAM0A0180000

NLSRAM0A12

POSRAM

PIU300L12

NLSRAM0A0180000

NLSRAM0A11

POSRAM

PIU300K12

NLSRAM0A0180000

NLSRAM0A10

POSRAM

PIU300N11

NLSRAM0A0180000

NLSRAM0A9

POSRAM

PIU300N14

NLSRAM0A0180000

NLSRAM0A8

POSRAM

PIU300M11

NLSRAM0A0180000

NLSRAM0A7

POSRAM

PIU300N13

NLSRAM0A0180000

NLSRAM0A6

POSRAM

PIU300T12

NLSRAM0A0180000

NLSRAM0A5

POSRAM

PIU300E10

NLSRAM0A0180000

NLSRAM0A4

POSRAM

PIU300H16

NLSRAM0A0180000

NLSRAM0A3

POSRAM

PIU300A14

NLSRAM0A0180000

NLSRAM0A2

POSRAM

PIU300B14

NLSRAM0A0180000

NLSRAM0A1

POSRAM

PIU300D12

NLSRAM0A0180000

NLSRAM0A0

POSRAM

PIU300G16

NLSRAM0D0150000

NLSRAM0D15

POSRAM

PIU300C15

NLSRAM0D0150000

NLSRAM0D14

POSRAM

PIU300T13

NLSRAM0D0150000

NLSRAM0D13

POSRAM

PIU300K11

NLSRAM0D0150000

NLSRAM0D12

POSRAM

PIU300D15

NLSRAM0D0150000

NLSRAM0D11

POSRAM

PIU300G11

NLSRAM0D0150000

NLSRAM0D10

POSRAM

PIU300L14

NLSRAM0D0150000

NLSRAM0D9

POSRAM

PIU300F16

NLSRAM0D0150000

NLSRAM0D8

POSRAM

PIU300T14

NLSRAM0D0150000

NLSRAM0D7

POSRAM

PIU300C14

NLSRAM0D0150000

NLSRAM0D6

POSRAM

PIU300R13

NLSRAM0D0150000

NLSRAM0D5

POSRAM

PIU300A13

NLSRAM0D0150000

NLSRAM0D4

POSRAM

PIU300R12

NLSRAM0D0150000

NLSRAM0D3

POSRAM

PIU300T15

NLSRAM0D0150000

NLSRAM0D2

POSRAM

PIU300L11

NLSRAM0D0150000

NLSRAM0D1

POSRAM

PIU300A15

NLSRAM0D0150000

NLSRAM0D0

POSRAM

PO1WIDPO1WID0DATAPO1WID0EXT0PROG

POCLK0PLLPOCLK0PLL0CLK0FIXEDPOCLK0PLL0CLK0PROGPOCLK0PLL0CS0NPOCLK0PLL0DINPOCLK0PLL0SCLK

PODB0CLOCKSPODB0CLOCKS0FPGA0CLKPODB0CLOCKS0FPGA0CLK1PODB0CLOCKS0REF0CLK

PODB0JTAGPODB0JTAG0HARDPODB0JTAG0HARD0TCKPODB0JTAG0HARD0TDIPODB0JTAG0HARD0TDOPODB0JTAG0HARD0TMSPODB0JTAG0SOFTPODB0JTAG0SOFT0TCKPODB0JTAG0SOFT0TDIPODB0JTAG0SOFT0TDOPODB0JTAG0SOFT0TMS

PODB0PROGRAMPODB0PROGRAM0CCLKPODB0PROGRAM0DINPODB0PROGRAM0DONEPODB0PROGRAM0ID0PODB0PROGRAM0ID1PODB0PROGRAM0ID2PODB0PROGRAM0ID3PODB0PROGRAM0ID030000PODB0PROGRAM0INITPODB0PROGRAM0INSTALLEDPODB0PROGRAM0M0PODB0PROGRAM0M1PODB0PROGRAM0M2PODB0PROGRAM0M020000PODB0PROGRAM0PROG0CLKPODB0PROGRAM0PROG0PWR0ONPODB0PROGRAM0PROGRAM

PODB0SPIPODB0SPI0CLKPODB0SPI0DINPODB0SPI0DOUTPODB0SPI0MODEPODB0SPI0SEL

PODIAGCOMMSPODIAGCOMMS0DINPODIAGCOMMS0DOUTPODIAGCOMMS0FLASH0CS0NPODIAGCOMMS0SCLK

POEXTSPIPOEXTSPI0DINPOEXTSPI0DOUTPOEXTSPI0SCLKPOFLASH0BOOTPOFLASH0BOOT0DINPOFLASH0BOOT0DOUTPOFLASH0BOOT0FLASH0CS0NPOFLASH0BOOT0SCLK

POFLASH0GOLDENPOFLASH0GOLDEN0DINPOFLASH0GOLDEN0DOUTPOFLASH0GOLDEN0FLASH0CS0NPOFLASH0GOLDEN0SCLK

POFLASH0USERPOFLASH0USER0DINPOFLASH0USER0DOUTPOFLASH0USER0FLASH10CS0NPOFLASH0USER0FLASH20CS0NPOFLASH0USER0SCLK

POHOST0AUDIOPOHOST0AUDIO0LPOHOST0AUDIO0R

POHOST0JTAGPOHOST0JTAG0HARDPOHOST0JTAG0HARD0TCKPOHOST0JTAG0HARD0TDIPOHOST0JTAG0HARD0TDOPOHOST0JTAG0HARD0TMSPOHOST0JTAG0SOFTPOHOST0JTAG0SOFT0TCKPOHOST0JTAG0SOFT0TDIPOHOST0JTAG0SOFT0TDOPOHOST0JTAG0SOFT0TMS

POHOSTUSBPOHOSTUSB0D0POHOSTUSB0D1POHOSTUSB0D2POHOSTUSB0D3POHOSTUSB0D4POHOSTUSB0D5POHOSTUSB0D6POHOSTUSB0D7POHOSTUSB0D8POHOSTUSB0D9POHOSTUSB0D10POHOSTUSB0D11POHOSTUSB0D12POHOSTUSB0D13POHOSTUSB0D14POHOSTUSB0D15POHOSTUSB0D0150000POHOSTUSB0FIFOADR0POHOSTUSB0FIFOADR1POHOSTUSB0FIFOADR2POHOSTUSB0FLAGAPOHOSTUSB0FLAGBPOHOSTUSB0FLAGCPOHOSTUSB0FLAGD0CS0NPOHOSTUSB0IFCLKPOHOSTUSB0INT0NPOHOSTUSB0PKTENDPOHOSTUSB0RD0NPOHOSTUSB0READYPOHOSTUSB0RESET0NPOHOSTUSB0SLOEPOHOSTUSB0VBUSPOHOSTUSB0WR0NPOHOSTUSB0XTALINPOHOSTUSB0XTALOUT

POLED1POLED10BLUEPOLED10GREENPOLED10RED

POLED2POLED20BLUEPOLED20GREENPOLED20RED

POPB0APOPB0A01W0IDPOPB0A01W0PIO1POPB0A01W0PIO2POPB0A01W0PIO010020POPB0A0CLK0CLK0POPB0A0CLK0CLK1POPB0A0CLK0CLK2POPB0A0CLK0CLK020000POPB0A0CLK0ENPOPB0A0JTAG0DETECTPOPB0A0JTAG0HARD0TCKPOPB0A0JTAG0HARD0TDIPOPB0A0JTAG0HARD0TDOPOPB0A0JTAG0HARD0TMSPOPB0A0JTAG0SOFT0TCKPOPB0A0JTAG0SOFT0TDIPOPB0A0JTAG0SOFT0TDOPOPB0A0JTAG0SOFT0TMSPOPB0A0SPARE1POPB0A0SPARE2POPB0A0SPARE3POPB0A0SPARE4POPB0A0SPARE010040POPB0A0SPI0CS0N0POPB0A0SPI0CS0N1POPB0A0SPI0CS0N010000

PORTCPORTC0CLKOEPORTC0CLKOUTPORTC0CS0NPORTC0DINPORTC0DOUTPORTC0INT0NPORTC0SCLK

POSDPOSD0CLKPOSD0CMDPOSD0DAT0POSD0DAT1POSD0DAT2POSD0DAT3POSD0DAT030000POSD0DETECTPOSD0PROTECT

POSRAMPOSRAM0A0POSRAM0A1POSRAM0A2POSRAM0A3POSRAM0A4POSRAM0A5POSRAM0A6POSRAM0A7POSRAM0A8POSRAM0A9POSRAM0A10POSRAM0A11POSRAM0A12POSRAM0A13POSRAM0A14POSRAM0A15POSRAM0A16POSRAM0A17POSRAM0A18POSRAM0A0180000POSRAM0D0POSRAM0D1POSRAM0D2POSRAM0D3POSRAM0D4POSRAM0D5POSRAM0D6POSRAM0D7POSRAM0D8POSRAM0D9POSRAM0D10POSRAM0D11POSRAM0D12POSRAM0D13POSRAM0D14POSRAM0D15POSRAM0D0150000POSRAM0NBHEPOSRAM0NBLEPOSRAM0NCSPOSRAM0NOEPOSRAM0NWE

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1

2

2

3

3

4

4

D D

C C

B B

A A

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NB3000AL - Altera02

1/02/2010 1:34:45 PMHOST_FPGA_NonIO.SchDoc

Project Title

Size:

Date:File:

Revision:

Sheet ofTime:A4

Sheet Title Host FPGA Pwr and Programming

Assy: D-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

TMSTCK

TDITDO

3V3

1V2

GND GND

3V33V3

R24K7 1%

R34K7 1%

R14K7 1%

VCCINT G6

VCCINT G7

VCCINT G8

VCCINT G9

VCCINT G10

VCCINT H6

VCCINT H11

VCCINT K7

VCCIO1E3

VCCIO1G3

VCCIO2K3

VCCIO2M3

VCCIO3P4

VCCIO3P7

VCCIO3T1

VCCIO4P10

VCCIO4P13

VCCIO4T16

VCCIO5K14

VCCIO5M14

VCCIO6E14

VCCIO6G14

VCCIO7A16

VCCIO7C10

VCCIO7C13

VCCIO8A1

VCCIO8C4

VCCIO8C7

U30K

EP3C10F256C8

GNDH7

GNDH8

GNDH9

GNDH10

GNDJ7

GNDJ8

GNDJ9

GNDJ10

GNDB2

GNDB15

GNDC5

GNDC12

GNDD7

GNDD10

GND E4

GND E13

GND G4

GND G13

GND K4

GND K13

GND M4

GND M13

GND N7

GND N10

GND P5

GND P12

GND R2

GND R15

U30L

EP3C10F256C8

R154 100R 1%R155 100R 1%

R157 100R 1%R156 100R 1%

3V3

R2794K7 1%

3V3

R2804K7 1%

3V3

R2814K7 1%

3V3

R2824K7 1%

GND

GND3V3

GND

nSTATUSF4

DCLKH1

nCONFIGH5

TDIH4

TCKH3

TMSJ5

TDOJ4

nCEJ3

CONF_DONEH14

MSEL0H13

MSEL1H12

MSEL2G12

U30J

EP3C10F256C8

VCCA1L5 GNDA1 M5

VCCD_PLL1N4

VCCA2F12 GNDA2 E12

VCCD_PLL2D13

U30M

EP3C10F256C8

GND

PLL VCC Decoupling2V5

VCCA_PLL6

VCCA_PLL5

2V5

i PLL

i PLL

L81K at 100MHz 300mA

L91K at 100MHz 300mA

VCCA_PLL6

VCCA_PLL51V2

GND

C3592.2uF 6.3V

C3632.2uF 6.3V

C3600.1uF 16V

C3640.1uF 16V

C36510nF 16V

C36110nF 16V

C3621nF 50V

C3661nF 50V

GND

C3670.1uF 16V C3680.1uF 16V

3V3 3V3

GND GND

DCLK

3V3

PIC35901

PIC35902COC359

PIC36001

PIC36002COC360

PIC36101

PIC36102COC361

PIC36201

PIC36202COC362

PIC36301

PIC36302COC363

PIC36401

PIC36402COC364

PIC36501

PIC36502COC365

PIC36601

PIC36602COC366

PIC36701

PIC36702COC367 PIC36801

PIC36802COC368

PIL801 PIL802

COL8

PIL901 PIL902

COL9

PIR101

PIR102

COR1 PIR201

PIR202

COR2 PIR301

PIR302

COR3

PIR15401 PIR15402COR154

PIR15501 PIR15502COR155

PIR15601 PIR15602COR156

PIR15701 PIR15702COR157

PIR27901

PIR27902

COR279 PIR28001

PIR28002

COR280 PIR28101

PIR28102

COR281 PIR28201

PIR28202

COR282

PIU300F4

PIU300G12

PIU300H1

PIU300H3

PIU300H4

PIU300H5

PIU300H12

PIU300H13

PIU300H14

PIU300J3

PIU300J4

PIU300J5

COU30J

PIU300A1

PIU300A16

PIU300C4

PIU300C7

PIU300C10

PIU300C13

PIU300E3

PIU300E14

PIU300G3

PIU300G6

PIU300G7

PIU300G8

PIU300G9

PIU300G10

PIU300G14

PIU300H6

PIU300H11

PIU300K3

PIU300K7

PIU300K14

PIU300M3

PIU300M14

PIU300P4

PIU300P7

PIU300P10

PIU300P13

PIU300T1

PIU300T16

COU30K

PIU300B2

PIU300B15

PIU300C5

PIU300C12

PIU300D7

PIU300D10

PIU300E4

PIU300E13

PIU300G4

PIU300G13

PIU300H7

PIU300H8

PIU300H9

PIU300H10

PIU300J7

PIU300J8

PIU300J9

PIU300J10

PIU300K4

PIU300K13

PIU300M4

PIU300M13

PIU300N7

PIU300N10

PIU300P5

PIU300P12

PIU300R2

PIU300R15

COU30L

PIU300D13

PIU300E12PIU300F12

PIU300L5 PIU300M5

PIU300N4

COU30M

PIU300D13

PIU300G6

PIU300G7

PIU300G8

PIU300G9

PIU300G10

PIU300H6

PIU300H11

PIU300K7

PIU300N4

PIL801

PIL901

PIC36701 PIC36801

PIR101 PIR201 PIR301PIR27901 PIR28001 PIR28101 PIR28201

PIU300A1

PIU300A16

PIU300C4

PIU300C7

PIU300C10

PIU300C13

PIU300E3

PIU300E14

PIU300G3

PIU300G14PIU300H12

PIU300K3

PIU300K14

PIU300M3

PIU300M14

PIU300P4

PIU300P7

PIU300P10

PIU300P13

PIU300T1

PIU300T16

PIU300H1PODCLK

PIC35902 PIC36002 PIC36102 PIC36202

PIC36302 PIC36402 PIC36502 PIC36602

PIC36702 PIC36802

PIU300B2

PIU300B15

PIU300C5

PIU300C12

PIU300D7

PIU300D10

PIU300E4

PIU300E12

PIU300E13

PIU300G4

PIU300G12

PIU300G13

PIU300H7

PIU300H8

PIU300H9

PIU300H10

PIU300H13

PIU300J3

PIU300J7

PIU300J8

PIU300J9

PIU300J10

PIU300K4

PIU300K13

PIU300M4

PIU300M5

PIU300M13

PIU300N7

PIU300N10

PIU300P5

PIU300P12

PIU300R2

PIU300R15

PIR102

PIU300F4

PIR202

PIU300H5

PIR302

PIU300H14

PIR15402

PIR27902

PIU300H4

PIR15502

PIR28002

PIU300J4

PIR15602

PIR28102

PIU300H3

PIR15702

PIR28202

PIU300J5

PIR15601POTCK

PIR15401POTDIPIR15501POTDO

PIR15701POTMS

PIC35901 PIC36001 PIC36101 PIC36201PIL802

PIU300L5

NLVCCA0PLL5

PIC36301 PIC36401 PIC36501 PIC36601PIL902

PIU300F12

NLVCCA0PLL6

PODCLK

POTCK

POTDIPOTDO

POTMS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

D D

C C

B B

A A

021/02/2010 1:34:45 PMFPGA.SCHDOC

Project Title

Size: Assy:

Date:File:

Revision:

Time:

A0

Sheet Title

13Sheet of

USER FPGA Connections

81

NB3000AL - AlteraD-820-0053

Altium Limited3 Minna CloseBelroseNSW 2085Australia

FPGA_TCK

FPGA_TDI

FPGA_TMS

FPGA_TDO

FPGA_PROGRAM

FPGA_M0

3V3

FPGA_PROGRAM

FPGA_TDO

FPGA_INIT

SRAM1_NCS

SRAM1_A[18..0]SRAM1_D[15..0]

SRAM1_NBHE

SRAM1_NWESRAM1_NOE

FPGA_DONE

FPGA_ID3

FPGA_ID0

FPGA_ID1

STATUS_LED

BUZZER BUZZER

SCLSDA

IO[35..0]

FPGA_CCLK

FPGA_DINFPGA_DONE

FPGA_ID[3..0]

FPGA_INITFPGA_M[2..0]

FPGA_PROG_CLKFPGA_PROG_PWR_ON

FPGA_PROGRAM

SW[4..0]

ONE_WIRE_DB_PBONE_WIRE_DB_PB

SRAM2_NCS

SRAM2_A[18..0]SRAM2_D[15..0]

SRAM2_NBHE

SRAM2_NWESRAM2_NOE

R14K7 1%

R24K7 1%

R34K7 1%

R44K7 1%

R8

100R 1%R9

100R 1%R10

100R 1%R12

100R 1%

R14 100R 1%

R18 100R 1%

R23 100R 1%

R24

100R 1%R22

100R 1%R20

100R 1%

SRAM1_NBLE

SRAM2_NBLE

BUS_SDRAM_CLKBUS_SDRAM_FEEDBACK

1 2NT2

1 2NT3

1 2NT4

1 2NT5

A[18..0]D[15..0]

NCSNWENOE

NBHENBLE

SRAM-256Kx16

SRAM2

A[18..0]D[15..0]

NCSNWENOE

NBHENBLE

SRAM-256Kx16

SRAM1

BUS_A[24..1]BUS_D[31..0]

BUS_NOEBUS_NWE

BUS_NBE[3..0]

BUS_SRAM_NCSBUS_FLASH_NCS

BUS_SDRAM_NCS

BUS_SDRAM_CKEBUS_SDRAM_CLK

BUS_SDRAM_NCASBUS_SDRAM_NRAS

BUS_FLASH_NRESETBUS_FLASH_NBUSY

HOSTMEMORYBUS_A[24..1]BUS_D[31..0]

BUS_NBE[3..0]BUS_NWEBUS_NOE

BUS_FLASH_NCS

BUS_FLASH_NRESETBUS_FLASH_NBUSY

BUS_SDRAM_NCS

BUS_SDRAM_CKEBUS_SDRAM_CLKBUS_SDRAM_NCASBUS_SDRAM_NRAS

BUS_SRAM_NCS

COMMON MEMORY RESOURCES

MEM_COMMON

STANDALON MEMORY RESOURCES

DINDONE

INSTALLEDID[3..0]

CCLKPROGRAM

M[2..0]INIT

PROG_PWR_ONPROG_CLK

DAU_CTRL

JTAG

PROGRAM

CLOCKS

DB_PROGRAM

DAU_RESET_SW

PERIPHERALS

SW D[4..0]

SW5

DATACLOCK

PS2

KBCLOCKKBDATA

MOUSECLOCKMOUSEDATA

RS232_CTS

RS232_RTSRS232_RX

RS232_TX

RS232

KEYBOARD

MOUSE

RXD

TXDRTS

CTS

RS232_INT

DATACLOCK

PS2

DAU_RESET_SW

USERIO IO[35..0]

IO36

SCLSDA

I2C

I2C

3V3

GND

GND

GND

TFT_TSC_CLK

TFT_TSC_DINTFT_TSC_CS_N

TFT_TSC_BUSYTFT_TSC_DOUT

GREENRED

BLUE

LED0_RLED0_GLED0_B

LED1_RLED1_GLED1_B

LED2_RLED2_GLED2_B

LED3_RLED3_GLED3_B

LED4_RLED4_GLED4_B

LED5_RLED5_GLED5_B

LED6_RLED6_GLED6_B

LED7_RLED7_GLED7_B

CODECI2S_DINCODECI2S_DOUTCODECI2S_BCLK

CODECI2S_MCLKCODECI2S_WCLK

CODECSPI_DOUTCODECSPI_DIN

CODECSPI_CLKCODECSPI_CS

CODEC

I2S_DOUTI2S_DIN

I2S_BCLKI2S_WCLKI2S_MCLK

SPI_CLK

SPI_DINSPI_DOUTSPI_CS_N

AUDIO_DIGITAL

DIP[7..0]DIP D[7..0]

SW8

DBUSB

CLKCMD

DAT[3..0]DETECT

PROTECT

SD

DBSD

SDCLKSDCMD

SDDETECTSDPROTECT

SDDAT[3..0]

E_RXC

E_MDIOE_MDCE_RXERE_CRS

E_RXDVE_RESETB_E

E_TXENE_COLE_TXC

E_RXCE_TXC

E_TXD[3..0]

E_TXENE_COL

E_RXD[3..0]

E_RXDVE_RESETB_E

E_MDIOE_MDC

E_RXERE_CRS

Ethernet

E_TXD[3..0]E_RXD[3..0]

ETH

INOUT

SPDIF

SPDIFSPDIF_OUTSPDIF_IN

RED[7..0]GREEN[7..0]

BLUE[7..0]VGA_CLK

VGA_VSYNCVGA_HSYNC

VGA

VGA

VGA_RED[7..0]VGA_GREEN[7..0]VGA_BLUE[7..0]VGA_CLK

VGA_VSYNCVGA_HSYNC

TFT_CSTFT_RSTFT_WRTFT_RDTFT_RESET

TFT_DB[17..0]

TFT_TSC_IRQ_N

TFT_BLIGHT

RELAY RELAY[3..0]RELAY[3..0]

RELAY4

ADC

CSCLK

DINDOUT

ADC_SPI ADC_CSADC_CLK

ADC_DINADC_DOUT

DACCS

CLKDIN

DAC_SPIDAC_CSDAC_CLKDAC_DIN

MIDI MIDI_TXMIDI_RX

MIDI_INT

MIDI_TXMIDI_RX

TMSTDO

TDITCK

JTAG

TMSTDO

TDITCK

JTAG

HARD

SOFT

HARDSOFT_JTAGFPGA_TDIFPGA_TCKFPGA_TMSFPGA_TDO

NEXUS_TMSNEXUS_TDO

NEXUS_TDINEXUS_TCK

DB_JTAG

REF_CLKFPGA_CLK

FPGA_CLK1

DB_CLOCKS

REF_CLKaFPGA_CLK

DAU_FPGA_CLK1DB_CLOCKS

PWM

PWM0PWM1PWM2PWM3

PWM4P0_PWMP1_PWMP2_PWMP3_PWM

RS485 TX_EN

RXDRX_EN

TXD

RS485_INT

MODESEL

CLKDIN

DOUT

DB_SPI DAU_SPI_CLK

DAU_SPI_DINDAU_SPI_DOUT

DAU_SPI_MODEDAU_SPI_SEL

DB_SPI

TFT_TSC

TFT_IO

CSRS

WRRD

RESET

DB[17..0]

BL

IR38KTXIR38KRX

TFT_IO

485_RXD485_RX_EN485_TX_EN485_TXD

USER_LEDS

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

USER_LEDS

GREENRED

BLUE

GREENRED

BLUE

GREENRED

BLUE

GREENRED

BLUE

GREENRED

BLUE

GREENRED

BLUE

GREENRED

BLUE

EXT_A EXTEND_A[49..0]D[49..0]

PBIO

READYINT_N

SLOEFIFOADR2FIFOADR0FIFOADR1

PKTENDFLAGD_CS_N

FLAGAFLAGBFLAGC

WR_NRD_N

D[15..0]RESET_N

IFCLKXTALIN

VBUS

XTALOUT

USB_INTF

USB2

USB_WR_NUSB_RD_NUSB_D[15..0]USB_RESET_N

USB_READYUSB_INT_N

USB_SLOEUSB_FIFOADR2USB_FIFOADR0USB_FIFOADR1USB_PKTEND

USB_FLAGAUSB_FLAGBUSB_FLAGC

USB_IFCLK

USB_VBUS

USB_FLAGD_CS_N

USER/DB FPGA

SPI

FPGA_DIN

FPGA_INITFPGA_CCLK

1V2 3V3USER_DECOUPLING_CAPS_1V2FPGA_Bypass_1V2.SCHDOC

USER_DECOUPLING_CAPS_3V3FPGA_Bypass_3V3.SCHDOC

1 2

NT3

BUS_A[17..1]BUS_D[31..0]

BUS_NWE

BUS_ISP176X_DREQ

BUS_ISP176X_NIRQ

BUS_ISP176X_NCS

BUS_ISP176X_DACK

PROTOTYPE IO[35..0]IO[35..0]

IO36

R2722K2 1%

R2732K2 1%

R2742K2 1%

R2752K2 1%

3V3

3V3

GND

GND BUS_SDRAM_CKE

BUS_SDRAM_CLK

BUS_NOE

ISP176X_RST

DAU_FPGA_CLK1BUS_SDRAM_FEEDBACK

FPGA_CLK

NEXUS_TCKREF_CLKa

BUS_SDRAM_CLK

SPAREIO1SPAREIO2

SPAREIO4SPAREIO3

IR38KTXIR38KRX

BUS_A[17..1]BUS_D[31..0]BUS_NREAD

BUS_NCSBUS_DMA_REQBUS_DMA_ACK

BUS_NIRQ

BUS_NWRITE

ISP176X_NRESET

ISP176X

ISP176X

R2774K7 1%

R2784K7 1%

3V3 3V3

ONE_WIRE_DB_PB

R2834K7 1%

3V3

1234

SPAREIO

SPAREIO

BA

NK

1 IO, DIFFIO_L1pD3

IO, DIFFIO_L1n, (DQ2L)/(DQ1L)/(DQ1L) C2

IO M9

IO, DIFFIO_L2p, (DQ2L)/(DQ1L)/(DQ1L) D2

IO, DIFFIO_L2n, (DQ2L)/(DQ1L)/(DQ1L) D1

IO, VREFB1N0 H7

IO, DIFFIO_L3p E5

IO, DIFFIO_L3n E4

IO, DIFFIO_L4p, (nRESET), (DQ2L)/(DQ1L)/(DQ1L) G6

IO, DIFFIO_L4n, (DQ2L)/(DQ1L)/(DQ1L) G5

IO, DIFFIO_L5p H4

IO, DIFFIO_L5n H3

IO, DIFFIO_L6p J5

IO, DIFFIO_L6n G7

IO, DIFFIO_L7p, (DQS2L/CQ3L,CDPCLK0)/(DQS2L/CQ3L,CDPCLK0)/(DQS2L/CQ3L,CDPCLK0) E3

IO, DIFFIO_L7n, (DQ2L)/(DQ1L)/(DQ1L) F3

IO, DIFFIO_L8p, (DQ2L)/(DQ1L)/(DQ1L) F5

IO, DIFFIO_L8n, (DATA1, ASDO) F4

IO, VREFB1N1 L5

IO, DIFFIO_L9p, (DQ2L)/(DQ1L)/(DQ1L) G4

IO, DIFFIO_L9n G3

IO, DIFFIO_L10p, (FLASH_nCE, nCSO) E2

IO, DIFFIO_L10n J6

IO, DIFFIO_L11p, _/(DQ1L)/(DQ1L) E1

IO, DIFFIO_L11n J7

IO, DIFFIO_L12p, (DM2L)/(DM1L0/BWS#1L0)/(DM1L0/BWS#1L0) F2

IO, DIFFIO_L12n, (DQ0L)/(DQ1L)/(DQ1L) F1

IO, DIFFIO_L13p K4

IO, DIFFIO_L13n K3

IO, DIFFIO_L14p K7

IO, DIFFIO_L14n L6

IO, DIFFIO_L15p L8

IO, DIFFIO_L15n L7

IO, DIFFIO_L16p M8

IO, DIFFIO_L16n M7

IO, DIFFIO_L17p L4

IO, DIFFIO_L17n L3

IO, DIFFIO_L18p H6

IO, DIFFIO_L18n H5

IO, DIFFIO_L19p J4

IO, DIFFIO_L19n, (DQ0L)/(DQ1L)/(DQ1L) J3

IO, VREFB1N2 N8

IO, DIFFIO_L20p, (DQ0L)/(DQ1L)/(DQ1L) G2

IO, DIFFIO_L20n G1

IO, DIFFIO_L21p M3

IO, DIFFIO_L21n, (DQ0L)/(DQ1L)/(DQ1L) K1

IO, DIFFIO_L22p N4

IO, DIFFIO_L22n N3

IO M4

IO, (DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0) K2

IO, DIFFIO_L23p L2

IO, DIFFIO_L23n, (DQ0L)/(DQ1L)/(DQ1L) L1

IO, VREFB1N3 M5

IO, DIFFIO_L24p M2

IO, DIFFIO_L24n, (DQ0L)/(DQ1L)/(DQ1L) M1

IO, DIFFIO_L25p P2

IO, DIFFIO_L25n, (DQ0L)/(DQ1L)/(DQ1L) P1

IO, (DATA0) N7

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2 IO, DIFFIO_L26p, (DQ0L)/(DQ1L)/(DQ1L)R2

IO, DIFFIO_L26n, _/(DQ1L)/(DQ1L) R1

IO, DIFFIO_L27p, (DM0L)/(DM1L1/BWS#1L1)/(DM1L1/BWS#1L1) U3

IO, DIFFIO_L27n U2

IO, DIFFIO_L28p, (DQ1L)/(DQ3L)/(DQ1L) R3

IO, DIFFIO_L28n R6

IO, DIFFIO_L29p, (DQ1L)/(DQ3L)/(DQ1L) R4

IO, DIFFIO_L29n R7

IO, DIFFIO_L30p, (DQ1L)/(DQ3L)/(DQ1L) T4

IO, DIFFIO_L30n T3

IO, VREFB2N0 T8

IO, DIFFIO_L31p U4

IO, DIFFIO_L31n, (DQ1L)/(DQ3L)/(DQ1L) R5

IO, DIFFIO_L32p, (DQ1L)/(DQ3L)/(DQ1L) U1

IO, DIFFIO_L32n, (DQ1L)/(DQ3L)/(DQ1L) V4

IO, DIFFIO_L33p V3

IO, DIFFIO_L33n, (DQ1L)/(DQ3L)/(DQ1L) V2

IO V9

IO, DIFFIO_L34p, (DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1) AB2

IO, DIFFIO_L34n AB1

IO, (DQ1L)/(DQ3L)/(DQ1L) V1

IO, DIFFIO_L35p, (DQ1L)/(DQ3L)/(DQ1L) W2

IO, DIFFIO_L35n, (DM1L/BWS#1L)/(DM3L0/BWS#3L0)/(DM1L2/BWS#1L2) W1

IO, DIFFIO_L36p W3

IO, DIFFIO_L36n W4

IO, DIFFIO_L37p V6

IO, DIFFIO_L37n U5

IO, DIFFIO_L38p Y5

IO, DIFFIO_L38n Y6

IO, DIFFIO_L39p V5

IO, DIFFIO_L39n, (DQ3L)/(DQ3L)/(DQ1L) U6

IO, DIFFIO_L40p AA7

IO, DIFFIO_L40n AA6

IO, VREFB2N1 T7

IO, DIFFIO_L41p AA8

IO, DIFFIO_L41n Y7

IO, DIFFIO_L42p, (DQ3L)/(DQ3L)/(DQ1L) Y4

IO, DIFFIO_L42n Y3

IO, DIFFIO_L43p T9

IO, DIFFIO_L43n, (DQ3L)/(DQ3L)/(DQ1L) AC2

IO, DIFFIO_L44p W8

IO, DIFFIO_L44n, (DQ3L)/(DQ3L)/(DQ1L) AC1

IO, DIFFIO_L45p V7

IO, DIFFIO_L45n, (DQ3L)/(DQ3L)/(DQ1L) AC3

IO, DIFFIO_L46p, (DQ3L)/(DQ3L)/(DQ1L) AD2

IO, DIFFIO_L46n AD1

IO, DIFFIO_L47p, (DQ3L)/(DQ3L)/(DQ1L) AB3

IO, DIFFIO_L47n, (DQ3L)/(DQ3L)/(DQ1L) AA4

IO W9

IO, DIFFIO_L48p AB7

IO, DIFFIO_L48n AC7

IO, VREFB2N2 V8

IO, DIFFIO_L49p AE1

IO, DIFFIO_L49n, (DQ3L)/(DQ3L)/(DQ1L) AE2

IO, DIFFIO_L50p AA5

IO, DIFFIO_L50n, (DM3L/BWS#3L)/(DM3L1/BWS#3L1)/(DM1L3/BWS#1L3) AF2

IO, DIFFIO_L51p AB6

IO, DIFFIO_L51n AB5

IO AA3

IO, RUP1 U7

IO, RDN1 U8

IO, DIFFIO_L52p AC4

IO, DIFFIO_L52n AD3

IO AD4

IO, (DQS3L/CQ3L#,CDPCLK1)/(DQS3L/CQ3L#,CDPCLK1)/(DQS3L/CQ3L#,CDPCLK1) AE3

IO, VREFB2N3 AB4

IO AB8

IO, DIFFIO_L53p AC5

IO, DIFFIO_L53n AD5

IO, DIFFIO_L54p AE4

IO, DIFFIO_L54n AF3

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3 IO, DIFFIO_B1pAC11

IO, DIFFIO_B1n AD11

IO, DIFFIO_B2p AD12

IO, DIFFIO_B2n, (DM1B)/_/_ AE6

IO, DIFFIO_B3p, (DQ1B)/_/_ AF4

IO, DIFFIO_B3n AB12

IO, VREFB3N3 Y10

IO, DIFFIO_B4p AG4

IO, DIFFIO_B4n, (DQ1B)/_/_ AG3

IO, DIFFIO_B5p AE7

IO, DIFFIO_B5n AE8

IO, DIFFIO_B6p, (DQS1B/CQ1B#,CDPCLK2)/(DQS1B/CQ1B#,CDPCLK2)/(DQS1B/CQ1B#,CDPCLK2) AD7

IO, DIFFIO_B6n Y12

IO, PLL1_CLKOUTp AE5

IO, PLL1_CLKOUTn AF5

IO, DIFFIO_B7p, (DQ1B)/_/_ AH3

IO, DIFFIO_B7n W10

IO, (DQ1B)/_/_ AF6

IO, VREFB3N2 AA12

IO, DIFFIO_B8p AC12

IO, DIFFIO_B8n, (DQ1B)/_/_ AH4

IO, DIFFIO_B9p AC10

IO, DIFFIO_B9n, (DQ1B)/_/_ AD8

IO, DIFFIO_B10p, (DQ1B)/_/_ AG6

IO, DIFFIO_B10n AB13

IO, DIFFIO_B11p, (DQ1B)/_/_ AH6

IO, DIFFIO_B11n AA13

IO, DIFFIO_B12p, (DM3B/BWS#3B)/(DM3B1/BWS#3B1)/(DM5B3/BWS#5B3) AB9

IO, DIFFIO_B12n, (DQ3B)/(DQ3B)/(DQ5B) AD10

IO, DIFFIO_B13p, (DQ3B)/(DQ3B)/(DQ5B) AG7

IO, DIFFIO_B13n Y13

IO, (DQ3B)/(DQ3B)/(DQ5B) AH7

IO, DIFFIO_B14p, (DQ3B)/(DQ3B)/(DQ5B) AC8

IO, DIFFIO_B14n, (DQ3B)/(DQ3B)/(DQ5B) AA10

IO Y14

IO, DIFFIO_B15p, (DQ3B)/(DQ3B)/(DQ5B) AG8

IO, DIFFIO_B15n Y15

IO, VREFB3N1 AB11

IO, DIFFIO_B16p, (DQS3B/CQ3B#,DPCLK2)/(DQS3B/CQ3B#,DPCLK2)/(DQS3B/CQ3B#,DPCLK2) AE10

IO, DIFFIO_B16n, (DQ3B)/(DQ3B)/(DQ5B) AH8

IO, DIFFIO_B17p, (DQ3B)/(DQ3B)/(DQ5B) AF7

IO, DIFFIO_B17n AH10

IO, DIFFIO_B18p, (DQ3B)/(DQ3B)/(DQ5B) AF9

IO, DIFFIO_B18n AH12

IO, DIFFIO_B19p, (DM5B/BWS#5B)/(DM3B0/BWS#3B0)/(DM5B2/BWS#5B2) AF8

IO, DIFFIO_B19n AF12

IO, DIFFIO_B20p, (DQ5B)/(DQ3B)/(DQ5B) AE9

IO, DIFFIO_B20n AF13

IO, DIFFIO_B21p, (DQ5B)/(DQ3B)/(DQ5B) AF10

IO, DIFFIO_B21n, (DQS5B/CQ5B#,DPCLK3)/(DQS5B/CQ5B#,DPCLK3)/(DQS5B/CQ5B#,DPCLK3) AF11

IO, VREFB3N0 AA14

IO, DIFFIO_B22p, (DQ5B)/(DQ3B)/(DQ5B) AG10

IO, DIFFIO_B22n, (DQ5B)/(DQ3B)/(DQ5B) AE12

IO, DIFFIO_B23p, (DQ5B)/(DQ3B)/(DQ5B) AE11

IO, DIFFIO_B23n, (DQ5B)/(DQ3B)/(DQ5B) AG11

IO, DIFFIO_B24p, (DQ5B)/(DQ3B)/(DQ5B) AH11

IO, DIFFIO_B24n AB14

IO, DIFFIO_B25p, (DQ5B)/(DQ3B)/(DQ5B) AE13

IO, DIFFIO_B25n AC14

IO, DIFFIO_B26p, (DQ5B)/(DQ3B)/(DQ5B) AG12

IO, DIFFIO_B26n AD14

IO, DIFFIO_B27p AE14

IO, DIFFIO_B27n AF14

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4 IO, DIFFIO_B28pAB15

IO, DIFFIO_B28n, (DM4B)/(DM5B1/BWS#5B1)/(DM5B1/BWS#5B1) AC15

IO, DIFFIO_B29p AD15

IO, DIFFIO_B29n, _/(DQ5B)/(DQ5B) AE15

IO AA16

IO, VREFB4N3 AA15

IO, DIFFIO_B30p, (DQ4B)/(DQ5B)/(DQ5B) AF15

IO, DIFFIO_B30n, (DQ4B)/(DQ5B)/(DQ5B) AG17

IO, DIFFIO_B31p, (DQ4B)/(DQ5B)/(DQ5B) AH17

IO, DIFFIO_B31n W16

IO, DIFFIO_B32p, (DQ4B)/(DQ5B)/(DQ5B) AF16

IO, DIFFIO_B32n, (DQS4B/CQ5B,DPCLK4)/(DQS4B/CQ5B,DPCLK4)/(DQS4B/CQ5B,DPCLK4) AF17

IO, DIFFIO_B33p, (DQ4B)/(DQ5B)/(DQ5B) AB16

IO, DIFFIO_B33n AE16

IO, DIFFIO_B34p, (DQ4B)/(DQ5B)/(DQ5B) AE17

IO, DIFFIO_B34n, (DQ4B)/(DQ5B)/(DQ5B) AG18

IO, DIFFIO_B35p, (DQ4B)/(DQ5B)/(DQ5B) AH18

IO, DIFFIO_B35n, (DM2B)/(DM5B0/BWS#5B0)/(DM5B0/BWS#5B0) AH19

IO, DIFFIO_B36p, (DQ2B)/(DQ5B)/(DQ5B) AD17

IO, DIFFIO_B36n AF18

IO, (DQS2B/CQ3B,DPCLK5)/(DQS2B/CQ3B,DPCLK5)/(DQS2B/CQ3B,DPCLK5) AE18

IO, VREFB4N2 Y17

IO, DIFFIO_B37p, (DQ2B)/(DQ5B)/(DQ5B) AG21

IO, DIFFIO_B37n AC17

IO, DIFFIO_B38p, (DQ2B)/(DQ5B)/(DQ5B) AH21

IO, DIFFIO_B38n, (DQ2B)/(DQ5B)/(DQ5B) AG22

IO, DIFFIO_B39p, (DQ2B)/(DQ5B)/(DQ5B) AH22

IO, DIFFIO_B39n AG19

IO, DIFFIO_B40p, (DQ2B)/(DQ5B)/(DQ5B) AH23

IO, DIFFIO_B40n, (DQ2B)/(DQ5B)/(DQ5B) AE19

IO, DIFFIO_B41p, (DQ2B)/(DQ5B)/(DQ5B) AF24

IO, DIFFIO_B41n AF19

IO, DIFFIO_B42p, (DM0B)/(DQ5B)/(DQ5B) AF25

IO, DIFFIO_B42n, (DQ0B)/_/_ AF20

IO, (DQ0B)/_/_ AD18

IO, DIFFIO_B43p Y19

IO, DIFFIO_B43n, (DQ0B)/_/_ AE21

IO, VREFB4N1 AC18

IO, DIFFIO_B44p AB18

IO, DIFFIO_B44n AA19

IO, DIFFIO_B45p AD19

IO, DIFFIO_B45n AE20

IO, DIFFIO_B46p AC19

IO, DIFFIO_B46n AB19

IO, RUP2 AA17

IO, RDN2 AB17

IO AD21

IO, DIFFIO_B47p AF21

IO, DIFFIO_B47n, (DQ0B)/_/_ AE25

IO, DIFFIO_B48p AC21

IO, DIFFIO_B48n, (DQS0B/CQ1B,CDPCLK3)/(DQS0B/CQ1B,CDPCLK3)/(DQS0B/CQ1B,CDPCLK3) AF26

IO, DIFFIO_B49p AG25

IO, DIFFIO_B49n, (DQ0B)/_/_ AH25

IO, VREFB4N0 AB20

IO, DIFFIO_B50p AG23

IO, DIFFIO_B50n, (DQ0B)/_/_ AF22

IO, DIFFIO_B51p, (DQ0B)/_/_ AE24

IO, DIFFIO_B51n, (DQ0B)/_/_ AG26

IO, PLL4_CLKOUTp AE23

IO, PLL4_CLKOUTn AF23

IO, DIFFIO_B52p AD22

IO, DIFFIO_B52n AE22

IO, DIFFIO_B53p AB21

IO, DIFFIO_B53n AC22

IO AH26

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5 IO, DIFFIO_R56nAA21

IO, DIFFIO_R56p AB22

IO, DIFFIO_R55n, (DM3R/BWS#3R)/(DM3R1/BWS#3R1)/(DM1R3/BWS#1R3) AB24

IO, DIFFIO_R55p AC24

IO, RUP3 AA22

IO, RDN3 AB23

IO AD25

IO, (DQS3R/CQ3R#,CDPCLK4)/(DQS3R/CQ3R#,CDPCLK4)/(DQS3R/CQ3R#,CDPCLK4) AF27

IO, DIFFIO_R54n AE26

IO, DIFFIO_R54p AE27

IO, DIFFIO_R53n Y22

IO, DIFFIO_R53p AD24

IO, VREFB5N3 AA24

IO, DIFFIO_R52n AC25

IO, DIFFIO_R52p, (DQ3R)/(DQ3R)/(DQ1R) AD26

IO, DIFFIO_R51n, (DQ3R)/(DQ3R)/(DQ1R) AE28

IO, DIFFIO_R51p AA23

IO, DIFFIO_R50n, (DQ3R)/(DQ3R)/(DQ1R) AD28

IO, DIFFIO_R50p Y23

IO, DIFFIO_R49n, (DQ3R)/(DQ3R)/(DQ1R) AD27

IO, DIFFIO_R49p AC26

IO, DIFFIO_R48n, (DQ3R)/(DQ3R)/(DQ1R) Y24

IO, DIFFIO_R48p W22

IO, DIFFIO_R47n, (DQ3R)/(DQ3R)/(DQ1R) AC28

IO, DIFFIO_R47p W21

IO, DIFFIO_R46n, (DQ3R)/(DQ3R)/(DQ1R) AC27

IO, DIFFIO_R46p, (DQ3R)/(DQ3R)/(DQ1R) AB26

IO V26

IO, VREFB5N2 U24

IO V22

IO, DIFFIO_R45n, (DQ3R)/(DQ3R)/(DQ1R) AA26

IO, DIFFIO_R45p U26

IO, DIFFIO_R44n, (DM1R/BWS#1R)/(DM3R0/BWS#3R0)/(DM1R2/BWS#1R2) AB28

IO, DIFFIO_R44p, (DQ1R)/(DQ3R)/(DQ1R) AB27

IO, DIFFIO_R43n V21

IO, DIFFIO_R43p, (DQ1R)/(DQ3R)/(DQ1R) Y26

IO, DIFFIO_R42n U20

IO, DIFFIO_R42p, (DQ1R)/(DQ3R)/(DQ1R) W26

IO, DIFFIO_R41n, (DQ1R)/(DQ3R)/(DQ1R) W27

IO, DIFFIO_R41p, (DQ1R)/(DQ3R)/(DQ1R) W28

IO, DIFFIO_R40n AB25

IO, DIFFIO_R40p, (DQ1R)/(DQ3R)/(DQ1R) V28

IO, DIFFIO_R39n AA25

IO, DIFFIO_R39p V27

IO, VREFB5N1 U23

IO W25

IO, DIFFIO_R38n, (DQ1R)/(DQ3R)/(DQ1R) V25

IO, DIFFIO_R38p R22

IO, DIFFIO_R37n V24

IO, DIFFIO_R37p U27

IO, DIFFIO_R36n V23

IO, DIFFIO_R36p, (DQ1R)/(DQ3R)/(DQ1R) U28

IO, DIFFIO_R35n Y25

IO, DIFFIO_R35p T26

IO, DIFFIO_R34n W20

IO, DIFFIO_R34p U22

IO, DIFFIO_R33n V20

IO, DIFFIO_R33p, (DQS1R/CQ1R#,DPCLK6)/(DQS1R/CQ1R#,DPCLK6)/(DQS1R/CQ1R#,DPCLK6) T25

IO, DIFFIO_R32n, (DEV_OE) T22

IO, DIFFIO_R32p, (DEV_CLRn) T21

IO, DIFFIO_R31n, (DQ1R)/(DQ3R)/(DQ1R) R26

IO, DIFFIO_R31p R25

IO, DIFFIO_R30n, (DM0R)/(DM1R1/BWS#1R1)/(DM1R1/BWS#1R1) R28

IO, DIFFIO_R30p U25

IO, VREFB5N0 R24

IO, _/(DQ1R)/(DQ1R) R27

IO, DIFFIO_R29n R23

IO, DIFFIO_R29p R21

IO P21

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6 IO, DIFFIO_R28nK25

IO, DIFFIO_R28p M24

IO, DIFFIO_R27n, (INIT_DONE) P26

IO, DIFFIO_R27p, (CRC_ERROR) P25

IO, DIFFIO_R26n H26

IO, DIFFIO_R26p L25

IO, VREFB6N3 N21

IO, DIFFIO_R25n N25

IO, DIFFIO_R25p G24

IO, DIFFIO_R24n, (nCEO) P28

IO, DIFFIO_R24p, (CLKUSR) P27

IO, DIFFIO_R23n, (DQS0R/CQ1R,DPCLK7)/(DQS0R/CQ1R,DPCLK7)/(DQS0R/CQ1R,DPCLK7) N26

IO, DIFFIO_R23p L22

IO, DIFFIO_R22n, (DQ0R)/(DQ1R)/(DQ1R) M28

IO, DIFFIO_R22p M23

IO, (DQ0R)/(DQ1R)/(DQ1R) M27

IO, DIFFIO_R21n L20

IO, DIFFIO_R21p, (DQ0R)/(DQ1R)/(DQ1R) M26

IO, DIFFIO_R20n K22

IO, DIFFIO_R20p L23

IO J26

IO, DIFFIO_R19n H25

IO, DIFFIO_R19p K21

IO, VREFB6N2 M25

IO, DIFFIO_R18n J23

IO, DIFFIO_R18p, (DQ0R)/(DQ1R)/(DQ1R) L28

IO, DIFFIO_R17n, (DQ0R)/(DQ1R)/(DQ1R) L27

IO, DIFFIO_R17p, (DQ0R)/(DQ1R)/(DQ1R) L24

IO, DIFFIO_R16n E25

IO, DIFFIO_R16p, (DQ0R)/(DQ1R)/(DQ1R) K28

IO, DIFFIO_R15n F24

IO, DIFFIO_R15p, (DQ0R)/(DQ1R)/(DQ1R) K27

IO, DIFFIO_R14n J24

IO, DIFFIO_R14p, (DM2R)/(DM1R0/BWS#1R0)/(DM1R0/BWS#1R0) L26

IO, DIFFIO_R13n H23

IO, DIFFIO_R13p, _/(DQ1R)/(DQ1R) J25

IO, DIFFIO_R12n, (nWE), (DQ2R)/(DQ1R)/(DQ1R) G28

IO, DIFFIO_R12p, (nOE), (DQ2R)/(DQ1R)/(DQ1R) G27

IO, DIFFIO_R11n H22

IO, DIFFIO_R11p H24

IO, VREFB6N1 M21

IO, DIFFIO_R10n G25

IO, DIFFIO_R10p, (DQ2R)/(DQ1R)/(DQ1R) K26

IO, DIFFIO_R9n G26

IO, DIFFIO_R9p G23

IO, DIFFIO_R8n, (nAVD), (DQ2R)/(DQ1R)/(DQ1R) F28

IO, DIFFIO_R8p, (RDY) F27

IO, DIFFIO_R7n, (PADD23), (DQ2R)/(DQ1R)/(DQ1R) E28

IO, DIFFIO_R7p G22

IO, DIFFIO_R6n, (DQ2R)/(DQ1R)/(DQ1R) E27

IO, DIFFIO_R6p H21

IO, (DQ2R)/(DQ1R)/(DQ1R) F26

IO, DIFFIO_R5n, (PADD22) D28

IO, DIFFIO_R5p, (PADD21), (DQ2R)/(DQ1R)/(DQ1R) D27

IO, DIFFIO_R4n, (PADD20), (DQS2R/CQ3R,CDPCLK5)/(DQS2R/CQ3R,CDPCLK5)/(DQS2R/CQ3R,CDPCLK5) C27

IO, DIFFIO_R4p F25

IO, VREFB6N0 J22

IO, DIFFIO_R3n E26

IO, DIFFIO_R3p E24

IO, DIFFIO_R2n D25

IO, DIFFIO_R2p D24

IO, DIFFIO_R1n D26

IO, DIFFIO_R1p C26

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7 IOG21

IO, DIFFIO_T52n, (DQ0T)/_/_ B26

IO, DIFFIO_T52p, (DQ0T)/_/_ D22

IO, DIFFIO_T51n, (DQ0T)/_/_ E22

IO, DIFFIO_T51p J19

IO, DIFFIO_T50n, (DQ0T)/_/_ A26

IO, DIFFIO_T50p G20

IO, (DQ0T)/_/_ B25

IO, DIFFIO_T49n G19

IO, DIFFIO_T49p, (DQS0T/CQ1T,CDPCLK6)/(DQS0T/CQ1T,CDPCLK6)/(DQS0T/CQ1T,CDPCLK6) A25

IO, DIFFIO_T48n, (DQ0T)/_/_ F21

IO, DIFFIO_T48p, (DQ0T)/_/_ C25

IO, VREFB7N0 F22

IO, (DQ0T)/_/_ A23

IO, DIFFIO_T47n H19

IO, DIFFIO_T47p, (DM0T)/_/_ B23

IO, PLL2_CLKOUTn C23

IO, PLL2_CLKOUTp D23

IO, DIFFIO_T46n, (DQ2T)/(DQ5T)/(DQ5T) C24

IO, DIFFIO_T46p E21

IO, RUP4 F19

IO, RDN4 E19

IO, (DQ2T)/(DQ5T)/(DQ5T) C22

IO, DIFFIO_T45n, (DQ2T)/(DQ5T)/(DQ5T) D21

IO, DIFFIO_T45p, (PADD0) B22

IO, VREFB7N1 F18

IO, DIFFIO_T44n, (DQ2T)/(DQ5T)/(DQ5T) C21

IO, DIFFIO_T44p D19

IO, DIFFIO_T43n, (DQ2T)/(DQ5T)/(DQ5T) A22

IO, DIFFIO_T43p, (DQ2T)/(DQ5T)/(DQ5T) A21

IO, DIFFIO_T42n, (DQ2T)/(DQ5T)/(DQ5T) B21

IO, DIFFIO_T42p, (DQ2T)/(DQ5T)/(DQ5T) E18

IO, DIFFIO_T41n, (PADD1), _/(DQ5T)/(DQ5T) C18

IO, DIFFIO_T41p, (PADD2) D18

IO, DIFFIO_T40n, (DM2T)/(DM5T0/BWS#5T0)/(DM5T0/BWS#5T0) C20

IO, DIFFIO_T40p H17

IO, VREFB7N2 G17

IO, DIFFIO_T39n, (DQ4T)/(DQ5T)/(DQ5T) D20

IO, DIFFIO_T39p, (DQ4T)/(DQ5T)/(DQ5T) C19

IO, DIFFIO_T38n, (PADD3), (DQ4T)/(DQ5T)/(DQ5T) C17

IO, DIFFIO_T38p G18

IO H15

IO, DIFFIO_T37n F17

IO, DIFFIO_T37p, (PADD4), (DQS2T/CQ3T,DPCLK8)/(DQS2T/CQ3T,DPCLK8)/(DQS2T/CQ3T,DPCLK8) D17

IO, DIFFIO_T36n, (PADD5), (DQ4T)/(DQ5T)/(DQ5T) A19

IO, DIFFIO_T36p, (PADD6), (DQ4T)/(DQ5T)/(DQ5T) B19

IO, DIFFIO_T35n, (PADD7) A18

IO, DIFFIO_T35p, (PADD8), (DQ4T)/(DQ5T)/(DQ5T) B18

IO, DIFFIO_T34n, (DQ4T)/(DQ5T)/(DQ5T) E17

IO, DIFFIO_T34p J16

IO, DIFFIO_T33n J17

IO, DIFFIO_T33p H16

IO, DIFFIO_T32n G16

IO, DIFFIO_T32p F15

IO, VREFB7N3 G15

IO, DIFFIO_T31n, (PADD9), (DQ4T)/(DQ5T)/(DQ5T) C16

IO, DIFFIO_T31p, (PADD10) D16

IO, DIFFIO_T30n H14

IO, DIFFIO_T30p K15

IO, DIFFIO_T29n, (PADD11), _/(DQ5T)/(DQ5T) A17

IO, DIFFIO_T29p, (PADD12), (DQS4T/CQ5T,DPCLK9)/(DQS4T/CQ5T,DPCLK9)/(DQS4T/CQ5T,DPCLK9) B17

IO, DIFFIO_T28n, (DM4T)/(DM5T1/BWS#5T1)/(DM5T1/BWS#5T1) E15

IO, DIFFIO_T28p J14

IO, DIFFIO_T27n, (PADD13) C15

IO, DIFFIO_T27p, (PADD14), (DQ5T)/(DQ3T)/(DQ5T) D15

U8GEP3C40F780C8N

BA

NK

8 IO, DIFFIO_T26n, (DQ5T)/(DQ3T)/(DQ5T)C13

IO, DIFFIO_T26p, (DQ5T)/(DQ3T)/(DQ5T) D13

IO, DIFFIO_T25n, (DQ5T)/(DQ3T)/(DQ5T) C14

IO, DIFFIO_T25p, (PADD15) D14

IO, DIFFIO_T24n, (PADD16), (DQ5T)/(DQ3T)/(DQ5T) C12

IO, DIFFIO_T24p, (PADD17), (DQS5T/CQ5T#,DPCLK10)/(DQS5T/CQ5T#,DPCLK10)/(DQS5T/CQ5T#,DPCLK10) D12

IO, DIFFIO_T23n, (DQ5T)/(DQ3T)/(DQ5T) A12

IO, DIFFIO_T23p B12

IO, VREFB8N0 G14

IO, DIFFIO_T22n K13

IO, DIFFIO_T22p F14

IO, (DQ5T)/(DQ3T)/(DQ5T) E14

IO, DIFFIO_T21n H12

IO, DIFFIO_T21p J12

IO, DIFFIO_T20n, (DATA2), (DQ5T)/(DQ3T)/(DQ5T) A11

IO, DIFFIO_T20p, (DATA3), (DQ5T)/(DQ3T)/(DQ5T) B11

IO, DIFFIO_T19n, (PADD18) A10

IO, DIFFIO_T19p, (DATA4), (DM5T/BWS#5T)/(DM3T0/BWS#3T0)/(DM5T2/BWS#5T2) B10

IO, DIFFIO_T18n, (PADD19) G13

IO, DIFFIO_T18p, (DATA15), (DQ3T)/(DQ3T)/(DQ5T) H13

IO, DIFFIO_T17n B8

IO, DIFFIO_T17p, (DQ3T)/(DQ3T)/(DQ5T) C10

IO D11

IO, VREFB8N1 F11

IO, DIFFIO_T16n, (DATA14), (DQS3T/CQ3T#,DPCLK11)/(DQS3T/CQ3T#,DPCLK11)/(DQS3T/CQ3T#,DPCLK11) E12

IO, DIFFIO_T16p, (DATA13) F12

IO, DIFFIO_T15n, (DQ3T)/(DQ3T)/(DQ5T) D10

IO, DIFFIO_T15p F10

IO, DIFFIO_T14n, (DQ3T)/(DQ3T)/(DQ5T) E11

IO, DIFFIO_T14p E8

IO, DIFFIO_T13n E10

IO, DIFFIO_T13p E7

IO, DIFFIO_T12n, (DQ3T)/(DQ3T)/(DQ5T) A7

IO, DIFFIO_T12p G10

IO, DIFFIO_T11n G11

IO, DIFFIO_T11p, (DATA5), (DQ3T)/(DQ3T)/(DQ5T) B7

IO, DIFFIO_T10n B3

IO, DIFFIO_T10p J10

IO, DIFFIO_T9n F8

IO, DIFFIO_T9p F7

IO, VREFB8N2 G12

IO, DIFFIO_T8n A6

IO, DIFFIO_T8p, (DATA6), (DQ3T)/(DQ3T)/(DQ5T) B6

IO, DIFFIO_T7n, (DATA7), (DQ3T)/(DQ3T)/(DQ5T) C11

IO, DIFFIO_T7p H10

IO G8

IO, DIFFIO_T6n, (DQ3T)/(DQ3T)/(DQ5T) C9

IO, DIFFIO_T6p, (DATA8) D9

IO, DIFFIO_T5n, (DATA9), (DM3T/BWS#3T)/(DM3T1/BWS#3T1)/(DM5T3/BWS#5T3) A8

IO, DIFFIO_T5p, (DQ1T)/_/_ C8

IO, (DQ1T)/_/_ D8

IO, DIFFIO_T4n, (DATA10), (DQ1T)/_/_ C7

IO, DIFFIO_T4p, (DATA11) D7

IO, VREFB8N3 G9

IO, (DQ1T)/_/_ D6

IO, DIFFIO_T3n, (DQ1T)/_/_ A4

IO, DIFFIO_T3p, (DATA12), (DQS1T/CQ1T#,CDPCLK7)/(DQS1T/CQ1T#,CDPCLK7)/(DQS1T/CQ1T#,CDPCLK7) B4

IO, DIFFIO_T2n, (DQ1T)/_/_ A3

IO, DIFFIO_T2p, (DQ1T)/_/_ C6

IO, DIFFIO_T1n H8

IO, DIFFIO_T1p, (DQ1T)/_/_ C4

IO, (DM1T)/_/_ D4

IO, PLL3_CLKOUTn C5

IO, PLL3_CLKOUTp D5

IO C3

U8HEP3C40F780C8N

TMS

CONF_DONE

DCLK

TCK

nSTATUS

TDI

nCONFIG

TDO

U_FPGA_PowerFPGA_NonIO.SchDoc

CLK0, DIFFCLK_0p J2

CLK1, DIFFCLK_0n J1

CLK2, DIFFCLK_1p Y2

CLK3, DIFFCLK_1n Y1

CLK15, DIFFCLK_6p AG14CLK14, DIFFCLK_6n AH14CLK13, DIFFCLK_7p AG15CLK12, DIFFCLK_7n AH15

CLK7, DIFFCLK_3n Y28CLK6, DIFFCLK_3p Y27CLK5, DIFFCLK_2n J28CLK4, DIFFCLK_2p J27

CLK8, DIFFCLK_5n A15

CLK9, DIFFCLK_5p B15

CLK10, DIFFCLK_4n A14

CLK11, DIFFC