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From Nano Devices to NanoFrom Nano Devices to Nano
L. H r L. H r
IMSEIMSE--CNMCNM
Universidad de Sevilla & CSIUniversidad de Sevilla & CSI
Acknowledgement for the RTD material to J.M. Quintana andAcknowledgement for the RTD material to J.M. Quintana and
11
. .. . ,, --
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ThroughThrough anan overviewoverview ofof problemsproblems andand
otentialotential solutionssolutions
MotivateMotivate aa discussiondiscussion onon howhow futurefuture
,, ,,byby thethe designerdesigner communitycommunity..
22
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Microelectronics today: needs and trendsMicroelectronics today: needs and trends LimitationsLimitations
PredictionsPredictions
Extending MOS beyond its limitsExtending MOS beyond its limits
Challenges to enable newChallenges to enable new devicesdevicesConclusionsConclusions
33
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ea ure s ze approac ng e p ys ca ron ersea ure s ze approac ng e p ys ca ron ers
Fabrication process reaching limitsFabrication process reaching limitsower consump onower consump on a ma n concerna ma n concern
Quantum effects need to be accounted forQuantum effects need to be accounted for
o u oo u oA diversity of solutions are emergingA diversity of solutions are emerging
incorporated into the design flow?incorporated into the design flow?
44
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Multimedia Audio Video RadarMultimedia Audio Video Radar
Computing (Portable, Powerful, Friendly)Computing (Portable, Powerful, Friendly)onnect v ty o y, ome, ar, ce, oronnect v ty o y, ome, ar, ce, or
-- --One device.One device.
..
Very High SpeedVery High Speed
One human interfaceOne human interface
Low CostLow Cost
55
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100b
Number of transistors
on a chip in thousands10b
100-billion
??
1b
100,000
processors
1-billion
10,000
Pentium
transistors
,
100
4004
8028680386
80486
Pentium II
Pentium III
1
10
8080
8086Pentium
Pentium Pro
66
'70 '75 '80 '85 '90 '95 '00 '05 '15'10 2520 30
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In the future
More Moore??
77
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10 um
Motivation: density
Beginning of
Submicron CMOS
functionality
cost/bitDeep UV Litho
90 nm in 2004
34 Years of
Presumed Limitto Scaling
100 nm
Every generation Feature size shrinks by 70% Transistor density doubles
10 nm
Wafer cost increases by 20% Chip cost comes down by 40%
Generations occur regularly
1 nm
.the past 34 years
Recently every 2 years
88
1970 1980 1990 2000 2010 2020
Source: Dennis Buss, TI, 2005
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-- --
99
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1010
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the World is continuousthe World is continuous
1111
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1212
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1313
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n e u ure
1414
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Todays MOSTodays MOS
1515
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apa es:apa es:
Switching: 2 wellSwitching: 2 well--defined, noisedefined, noise--inmune, stableinmune, stablestatesstatesAmplification: Local power gain (negative)Amplification: Local power gain (negative)
WellWell--tailored to the Electronics needstailored to the Electronics needs
Backed by an extensive knowBacked by an extensive know--how at device,how at device,circuit and system levelscircuit and system levelsApproaching important botlenecksApproaching important botlenecks
Interconnects are becoming another problemInterconnects are becoming another problem
Is there a limit for its supremacy?Is there a limit for its supremacy?
1616
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SystemSystemCircuitCircuit
ev ceev ce
FundamentalFundamental
1717
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NanoNano--Scale MOSFETScale MOSFET
uLabs
sy:Fujits
otoCourt
Metal Oxide Semiconductor Field Effect TransistorMetal Oxide Semiconductor Field Effect Transistor
P
ree erm na ev ceree erm na ev ce
Source, gate and drainSource, gate and drain
V controls the conduction from source to drainV controls the conduction from source to drainHalf thickness of the gate is called Feature sizeHalf thickness of the gate is called Feature size
Current feature sizes in productionCurrent feature sizes in production 45nm (TSMC)45nm (TSMC)
1818
-- , . ., . .
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--
UltraUltra--thinthin BodyBody SOISOI MOSMOS
BandBand--En ineeredEn ineered TransistorTransistor
VerticalVertical TransistorTransistor
DoubleDouble--gategate TransistorTransistor
......
1919
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Year of Production 2010 2012 2013 2015 2016 2018Technolo Node h 45 h 32 h 22
MPU Physical Gate Length (nm) 18 14 13 10 9 7
Nominal gate leakage current2 1.9E+03 2.4E+03 7.7E+03 1.0E+04 1.9E+04 2.4E+04
OFF
Nominal power supply voltage
(Vdd) (V)1.0 0.9 0.9 0.8 0.8 0.7
Nominal high-performance
IOFFNMOS sub-threshold leakage
current, Isd,leak (at 25C)
(mA/m)
0.1 0.1 0.3 0.3 0.5 0.5
ION
-
NMOS drive current, Id,sat(at
Vdd, at 25C) (mA/m)
1900 1790 2050 2110 2400 2190
High-performance NMOS
IONintrinsic delay, = Cgate * Vdd/
Id,sat(ps)
0.39 0.30 0.26 0.18 0.15 0.11
NMOSFET static power
2020IOFF
leakage (W/m)
. - . - . - . - . - . -
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Device SummaryDevice Summary
2121
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ChallengesChallenges
DifficultiesDifficultiesg e ec r c e sg e ec r c e s
Power supply vs. threshold voltagePower supply vs. threshold voltage
Heat dissipationHeat dissipationInterconnect delaysInterconnect delays
Vanishing bulk propertiesVanishing bulk properties
Too many problems to continue miniaturization as physicalToo many problems to continue miniaturization as physicallimits approachlimits approach
Proposed solutions are short termProposed solutions are short term
Open ProblemsOpen Problems
Explore new materials (GaAs, SiGe, etc.)Explore new materials (GaAs, SiGe, etc.)
As a long term goal explore new devicesAs a long term goal explore new devices
2222
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2323
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2424
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2525
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2626
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Then, MOS transistors and Moores lawThen, MOS transistors and Moores laware alive but their limits are coming fastare alive but their limits are coming fast
ThermodynamicsThermodynamics
uantumuantum--mechanicsmechanics
ElectromagneticsElectromagnetics
VariabilityVariability
LithographyLithography
Power densityPower density
2727
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SystemSystemCircuitCircuit
ev ceev ce
FundamentalFundamental
2828
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2929
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90 nm
3030
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LithographyLithography
MOS Transit TimeMOS Transit Time
Parameter FluctuationsParameter Fluctuations
Interconnect Response TimeInterconnect Response Time
3131
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3232
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3333
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3434
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3535
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3636
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,,
Oxide variations
0.25 0.18Layout
0.13 90-nm 65-nm
ICCAD 2003http://vlsicad.ucsd.edu
Figures courtesy Synopsys Inc.
C handu V isweswariah, 2004 Stat ist ical Analys is a nd Design: From P icoseconds t o Probabil it ies 2 o f 86Discrete dopants249,403,263 Si atoms
68,743 donors
13,042 acceptors
3737
C handu V is wes war iah, 2004 St at is tical A nalys is and Design: F rom P icoseconds to P robab ilit ies 3 o f 86
D. J. Frank et al, Symp. V LSI Tech., 1999
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3838
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3939
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Year ofYear of
Production 2010 2012 2013 2015 2016 2018Production 2010 2012 2013 2015 2016 2018
Watts/cmWatts/cm22
155 171 178155 171 178 ------ 205205 ------
atts patts p ------ ------
e o noknow how to
4040
much heat!Derived from ITRS data
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Todays MOSTodays MOS
4141
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will rovide a solutionwill rovide a solution
4242
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4343
N l l t i i lN l l t i i l
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Nanoscale electronics involves newNanoscale electronics involves new
challengeschallenges
DeepDeep submicronsubmicron physicalphysical effectseffects again again
coexistencecoexistence withwith conventionalconventional MOSMOS circuitscircuits
EmergenceEmergence ofof new,new, veryvery promisingpromising nanonano--saclesacle
r rr r n n n n --wirwir r n r n ...... m musedused toto buildbuild newnew transistortransistor--likelike devices,devices, atat leastleastinin aa firstfirst phasephase
4444
Computing Devices: a RoadmapComputing Devices: a Roadmap
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Computing Devices: a RoadmapComputing Devices: a Roadmapw c ng ev ces o nanome er e ow nm,w c ng ev ces o nanome er e ow nm,
typically 10nm) dimensions define nanotechnology.typically 10nm) dimensions define nanotechnology.
Solid State DevicesMolecular Devices
CMOS Devices Quantum Devices
Nano Quantum
DotRTDCNFET SETSpinT
Electro-uantum
Electro-
4545
mechanical
chemical
Carbon Nanotube FETCarbon Nanotube FET
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Carbon Nanotube FETCarbon Nanotube FET
es
y:IB
Cour
can e use as e con uc ng c anne o a .can e use as e con uc ng c anne o a .
These new devices are very similar to the CMOS FETs.These new devices are very similar to the CMOS FETs.All CNFETs are pFETs by nature.All CNFETs are pFETs by nature.
nFETs can be made throughnFETs can be made through
AnnealingAnnealing
Do inDo inVery low current and power consumptionVery low current and power consumption
Although tubes are 3nm thick CNFETs are still the size of theAlthough tubes are 3nm thick CNFETs are still the size of thecontacts, about 20nm.contacts, about 20nm.
4646
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Questions for CNT FETs
1) Can CNT FET be smaller, faster anddissipate less energy than Si FET?
s poss e o n egra e n v uacomponents in a complex circuit (billions ofcomponents per cm2)?
3) Is Ballistic Transport a big advantage?Fv =
vnej = ndrift>nbalFt
m
evb
=
47477th ICCDCS7th ICCDCS
S. J. Wind,J. Appenzeller, R. Martel,
V. Derycke, and Ph. Avouris,Appl. Phys. Lett 80 (2002) 3817
For long channels, is ballistic transport
possible in the high-current regime?
S d Ch llS d Ch ll
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Summar and Challen esSummar and Challen esCNTs are flexible tubes that can be made conductingCNTs are flexible tubes that can be made conductingor semiconducting.or semiconducting.NanoNano--scale, strong and flexible.scale, strong and flexible.Challenges:Challenges:
Chip density still limited to the density of contacts.Chip density still limited to the density of contacts.
Tube density not entirely exploitedTube density not entirely exploited
a r ca on s s a s oc as c processa r ca on s s a s oc as c process
Alternatives to gold contacts need to be found.Alternatives to gold contacts need to be found.O en Problems and Initiatives:O en Problems and Initiatives:
Fabrication using DNA for self assembly (TechnionFabrication using DNA for self assembly (Technion--Israel;Israel;Science,Science, Nov 2003)Nov 2003)
Memor arra of nanotubes usin unctions as bitMemor arra of nanotubes usin unctions as bitstorages (Lieber at Harvard)storages (Lieber at Harvard)
Using nanotube arrays to make computing elementsUsing nanotube arrays to make computing elements(DeHon at Caltech)(DeHon at Caltech)
4848
Fabricate FPGAs using CNFETs and STM (Avouris at IBM)Fabricate FPGAs using CNFETs and STM (Avouris at IBM)
Solid State Quantum DevicesSolid State Quantum Devices
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Solid State Quantum DevicesSolid State Quantum Devices
ergyOccupiedEnergy
Levels
OccupiedEnergy
LevelsAllowedr
ier
rier
En Energy
LevelsBa
Distance
Ba
Quantum effects used to build devices.Quantum effects used to build devices.
Electrons confined on anElectrons confined on an islandisland
ource s an ra n
Island can be created by using different bandIsland can be created by using different band--gap devices in successiongap devices in succession
Island has certain allowed energy levelsIsland has certain allowed energy levelsIf allowed energy levels are filled then the device is in conductionIf allowed energy levels are filled then the device is in conduction
Resonant Tunneling Diode (RTD)Resonant Tunneling Diode (RTD)
Single Electron Transistor (SET)Single Electron Transistor (SET)
Quantum Dot (QD)Quantum Dot (QD)Blocking conduction due to unavailable energy levels is calledBlocking conduction due to unavailable energy levels is calledcoulomb blockadecoulomb blockade
Conduction can occur bConduction can occur b
4949
Increasing source to drain voltageIncreasing source to drain voltage
Applying Gate BiasApplying Gate Bias
Single Electron Transistors (SET)Single Electron Transistors (SET)
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Single Electron Transistors (SET)Single Electron Transistors (SET)Source
Cg
Island
Conductance chan es in s urts as ener levels are discreteConductance chan es in s urts as ener levels are discrete
Drain
To go from conducting to nonTo go from conducting to non--conducting stage, it requires voltageconducting stage, it requires voltage
sufficient for one electron to crosssufficient for one electron to crossThis is achieved by applying gate bias enough for just oneThis is achieved by applying gate bias enough for just onee ec ron c argee ec ron c arge ---- ence e nameence e name
Bias required for conduction isBias required for conduction is coulomb gap voltagecoulomb gap voltageSame device can act as pFET or nFET based on the barrier strengthSame device can act as pFET or nFET based on the barrier strength
Extra sensitive charge metersExtra sensitive charge meters
CMOS style conducting devicesCMOS style conducting devices
5050
in l El r n Tr n i rin l El r n Tr n i r
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in l El r n Tr n i rin l El r n Tr n i r
Sin le electron transistor SETSin le electron transistor SETElectron movements are controlled with singleElectron movements are controlled with single
electron recisionelectron recisionTunneling and Coulomb blockadeTunneling and Coulomb blockade
-
island gate
problems of charge-based devices
source drain
-
High error rate?
Low speed?
-
5151
(FET will be 32-electron transistor by 2018)
Resonant Tunneling DevicesResonant Tunneling Devices
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o es an rans s orso es an rans s orsMany years of experimental studies of resonant tunneling structures
1974 Chang1.00E+07
1986 Reed1988 Broekaert1990 Broekaert1990 Mehdi
1.00E+03
1.00E+05
m2
1991 Chen1991 Smet1992 Watanabe1995 Moise1999 Mi amoto 1.00E-03
1.00E-01
1.00E+01
Jpeak
,A/
peak
2000 Watanabe2001 Ishikawa2002 Kikuchi2002 Kado
1.00E-07
1.00E-05
va ey
ernersson2002 Malindretos2002 Bjork2003 Wang2003 Ikeda
Peak-to-Valley Ratio
5252
2004 Xu Can RTDs match FETs both in ION and IOFF?
Spin transistors:Spin transistors: Spin TransportSpin Transport
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pp
vs. arge ransporvs. arge ransporSpin is a property of material particles (e.g. electron, proton etc.)Spin is a property of material particles (e.g. electron, proton etc.)To move spin from point A to point B requires moving material particleTo move spin from point A to point B requires moving material particle
Question: Even if we are controlling spin we have still moving electrons.Question: Even if we are controlling spin we have still moving electrons.
--
Examples of proposed Spin transistors:
Johnson tranistor
Miziushima FIFS transistor
SPICE transistor
Ounad ela-Hehn transistor
Datta-Das transistor
Operation principle: control of spin-
Spin-valve (GMR)
5353
agne c unne unc on
Spin Transport in 2DEG
Quantum Dots and ArraysQuantum Dots and Arrays
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Quantum Dots and ArraysQuantum Dots and Arrays
Inter-dotDot occupied
arr ers
Outer
Dot unoccupied
Courtesy: vortex.tn.tudelft.nl/ grkouwen/kouwen.html
Barriers
33--dimensional island tunneling barrierdimensional island tunneling barrierState determined by presence of electron and not byState determined by presence of electron and not byconduction.conduction.
Quantum cell array (QCA) is a lattice of these cellsQuantum cell array (QCA) is a lattice of these cells
Occupied electrons are furthest from each other dueOccupied electrons are furthest from each other dueto repulsive forces.to repulsive forces.
5454
An example: Quantum Cellular AutomataAn example: Quantum Cellular Automata
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An example: Quantum Cellular AutomataAn example: Quantum Cellular Automata
1 1
1 0re
1 0
Stable
Unstable
2 states2 states 1 and 0.1 and 0.
Electrostatic interaction of nearb cells makes the bitsElectrostatic interaction of nearb cells makes the bitsflip.flip.
Input to the cell is by manipulating the InterInput to the cell is by manipulating the Inter--dot barriers.dot barriers.
5555
og c ga es can e cons ruc e .og c ga es can e cons ruc e .
Summary and ChallengesSummary and Challenges
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Summary and ChallengesSummary and Challenges
SummarySummaryElectrons confined on an island.Electrons confined on an island.
between conducting and nonbetween conducting and non--conducting states.conducting states.
SETSET 2 dimensional device with gate bias control.2 dimensional device with gate bias control.
QDQD device with electron presence as state.device with electron presence as state.QCAQCA Arrays of QDs used for computing.Arrays of QDs used for computing.
ChallengesChallengesBack round char e ma offset states noise sensitivitBack round char e ma offset states noise sensitivit
Sensitivity of tunneling current to barrier width (lithographicSensitivity of tunneling current to barrier width (lithographic
accuracy)accuracy)Sensitivity to barrier widthsSensitivity to barrier widths
Cryogenic operationCryogenic operation
Open ProblemsOpen Problems
Litho ra hic methods with uaranteed accuracLitho ra hic methods with uaranteed accuracSelf assembly of systemsSelf assembly of systems
Background charge eliminationBackground charge elimination
Synthesis and verification techniques neededSynthesis and verification techniques needed
5656
Testing of these devices as stuckTesting of these devices as stuck--at models may be inadequate.at models may be inadequate.
Molecular ElectronicsMolecular Electronics
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Molecular ElectronicsMolecular Electronics
IncentivesIncentiveso ecu es are nanoo ecu es are nano--sca esca e
Self assembly is achievableSelf assembly is achievable
Very lowVery low--power operationpower operationHighly uniform devicesHighly uniform devices
Quantum Effect DevicesQuantum Effect Devices
Electromechanical DevicesElectromechanical DevicesUsing mechanical switching of atoms or moleculesUsing mechanical switching of atoms or molecules
Electrochemical DevicesElectrochemical DevicesChemical interactions to change shape or orientationChemical interactions to change shape or orientation
o oac ve ev ceso oac ve ev cesLight frequency changes shape and orientation.Light frequency changes shape and orientation.
5757
Molecular ElectronicsMolecular Electronics
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Molecular ElectronicsMolecular Electronics
Benzene ring
Acetylene linkageo
Mechanical synthesisMechanical synthesisMolecules aligned using a scanning tunnelingMolecules aligned using a scanning tunneling
Fabrication done molecule by molecule using STMFabrication done molecule by molecule using STM
Chemical synthesisChemical synthesisMolecules aligned in place by chemical interactionsMolecules aligned in place by chemical interactions
Self assemblySelf assembly
Parallel fabricationParallel fabrication
5858
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5959
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SummarySummary
Parallel self assemblParallel self assembl
Very regular structuresVery regular structures
Many alternatives proposed but inherent problemsMany alternatives proposed but inherent problems
ChallengesChallengesSignal restoration and gainSignal restoration and gain
Finding nonFinding non--interacting chemicalsinteracting chemicals
Chemical reactions stochastic with byChemical reactions stochastic with by--productsproductsSlow operating speedsSlow operating speeds
Open ProblemsOpen ProblemsSelf assembling of devicesSelf assembling of devices
Guaranteed switching of molecules (HPGuaranteed switching of molecules (HP-- UCLA devices)UCLA devices)
Simulation models and CADSimulation models and CAD
6060
Emerging Device SummaryEmerging Device Summary
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6161
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Research In Nanodevices will have a value if and only ifResearch In Nanodevices will have a value if and only if
We can find a way to costWe can find a way to cost--effectively build workingeffectively build workingcircuits by connecting together TRILLIONS of suchcircuits by connecting together TRILLIONS of such
The new devices will be rid off the problems associatedThe new devices will be rid off the problems associated
Only those devices able to coOnly those devices able to co--exist with MOS technologiesexist with MOS technologies
Nanoelectronics technologies requireNanoelectronics technologies require
Manufacturers who are aware of design needsManufacturers who are aware of design needs
6262
, ,, ,
design paradigm to be rid off the slavery from MOS?design paradigm to be rid off the slavery from MOS?
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--
6363
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Multicore
Von Neuman
Analog
u
Digital Data Representation
DeviceScaled MOS
Silicon Material
Electric Charge
6464
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6565
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Which of Current NanoelectronicWhich of Current Nanoelectronic
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QCASpintronics
FILTER
o ecu arElectronics
- ev ces NEW
SWITCH
RTD
SingleElectronics
RSFQ :
6767
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Single ElectronicsRTD
Vertical Gate
Molecular Switch
RTD
Structure
Bulk
CMOS
SOI
anotu es
6868
Today 2020 2040
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y s so cu t to n ay s so cu t to n a
Because size, speed & powerBecause size, speed & power
are us par s o e pro emare us par s o e pro em
6969
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Operation at room temperatureOperation at room temperatureCompetitive yieldCompetitive yieldPower efficiency (essentially at system level)Power efficiency (essentially at system level)Compatibility or Complementarity with MOSCompatibility or Complementarity with MOSSpeed advantage (at least, no disadvantage)Speed advantage (at least, no disadvantage)Cost reductionCost reductionInclusion in conventional design flowsInclusion in conventional design flows Electrical modelsElectrical models Compatibility with standard simulatorsCompatibility with standard simulators
--Added value compared to scaled MOS in termsAdded value compared to scaled MOS in terms
7070
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SystemSystem--abilityability
CoCo--hosting memory, logic, communicationhosting memory, logic, communicationHandling device variabilityHandling device variability
Combining More Moore with More thanCombining More Moore with More than
Complementing the other platforms (sensors,Complementing the other platforms (sensors,
actuators, antennas, special functions)actuators, antennas, special functions)
Efficient interconnectEfficient interconnect
7171
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It is not a simple task to prove aIt is not a simple task to prove a
ev ce can e accep eev ce can e accep e
7272
Device Lifecycle: from an Idea to itsDevice Lifecycle: from an Idea to its
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widespread usewidespread use
Technical feasibilityTechnical feasibility
ProductizationProductization
A high yield is achievable?A high yield is achievable?Embeddabilit in the desi n flowEmbeddabilit in the desi n flowReasonable Design ProductivityReasonable Design ProductivityViabilit for basic circuitsViabilit for basic circuitsUse of basic circuits in systemsUse of basic circuits in systems Are systems beneffitting somehow from the new device?Are systems beneffitting somehow from the new device?
7373
oes g ve any compe ve a van ageoes g ve any compe ve a van age
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Is it feasible to desi n
a 100-Billion-Transistor
SOC in less than 100
CPU
I/O padsays
Are new devices fullyco re
DSPcore ControlO
pads
pad
sembedded in the design
flow?
DSPbook
A/MS
I/ I/
A/MS=analog/mixed signal
I/O padsASIC = application-specific ICCPU = central processing unit
7474
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Models for
,
mu a onSimulation
Simulation
n egra on
Global Simula tion
7575
Lay-Out
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QmQm--Effects in MOS devicesEffects in MOS devicesQmQm--Effects in MOS devicesEffects in MOS devices
QuantumQuantum--mechanical modelingmechanical modeling
and numerical simulationand numerical simulation
Spice circuit modelsSpice circuit models
Circuit SimulationCircuit Simulation
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QmQm--Effects in MOS devicesEffects in MOS devicesQmQm--Effects in MOS devicesEffects in MOS devices
QuantumQuantum--mechanical modelingmechanical modeling
and numerical simulationand numerical simulation
Spice circuit modelsSpice circuit models
Circuit SimulationCircuit Simulation
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QmQm--Effects in MOS devicesEffects in MOS devicesQmQm--Effects in MOS devicesEffects in MOS devices
QuantumQuantum--mechanical modelingmechanical modeling
and numerical simulationand numerical simulation
Spice circuit modelsSpice circuit models
Circuit SimulationCircuit Simulation
7878
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QmQm--Effects in MOS devicesEffects in MOS devicesQmQm--Effects in MOS devicesEffects in MOS devices
QuantumQuantum--mechanical modelingmechanical modeling
and numerical simulationand numerical simulation
Spice circuit modelsSpice circuit models
Circuit SimulationCircuit Simulation
7979
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How to proceed when aHow to proceed when adevice does seem mature?device does seem mature?
s ng s n rcu s: ns ng s n rcu s: n
8080
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General ConclusionsGeneral Conclusions
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MOS technology is approaching saturationMOS technology is approaching saturationproblems/limits in the nanometer rangeproblems/limits in the nanometer range
Several new possibilities emergingSeveral new possibilities emerging
at system levelat system level,,
compatible simulation modelscompatible simulation models,, andandMOSMOS--
devices.devices.
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