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Negative conductance of an interdigital electrode structure on a semiconductor surface

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630 : EEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-20, NO. 7, JULY 1973 Negative Conductance of an InterdigitalElectrodeStructure on a Semicornductor Surface T. J. B. SWANENBURG Absiracf-It is shown that an interdigital electrode structure situated near a semiconductor surface may exhibit negative conduc. tance if the drift velocity of the charge carriers in the semiconductos is sufiiciently large. The conditions for obtaining this negative con- ductance are derived, and these theoretical predictions are compared with experimental results obtained for an interdigital electrode struc- ture situated on an oxidized silicon surface. Negative conductance is observed in the frequency range from 25 to 75 MHz at a temperature of about 25 K, and the experimental data show good agreement with the theory. Finally the specific properties of different device geome- tries are considered with a view to the possibilities of operation at: room temperature and at higher frequencies. I. INTRODUCTION HE possibilities for obtaining amplification of electromagnetic waves by drifting charge carriers in semiconductors have been the subject of several theoretical papers during the last decade (see, e.g., [l I, [2]). One of the severe problems arising in the practical realization of such a solid-state analog of the traveling wave tube is that the-electromagnetic wave propagation velocitymustbereducedby a t leastthreeorders of magnitudeby a slow wave circuit in order to make resonant interaction with the charge carriers possible. A structurethatshouldavoidthisproblemwaspro- posed by Hines [3], but to our knowledge no device of this type has ever been in operation. Quite recently, however, we achieved a solid-state negative resistance [4] in which the drifting charge car- riers interact with electrical waves that propagate along an interdigital electrode structure. The phase velocity of these waves is w/nko, w being the angular frequency of the waves, n an integer, and KO the fundamental wave number of the transducer. At sufficiently low frequen- cies the carrier drift velocity can easily exceed this phase velocity, resulting in a negative conductance of the electrode structure. The main difference, as compared with the traveling wave tube, arises from the fact that the electrodes are alternately at the same potential, so that complex k values are impossible. The power transfer from the car- riers to the electrode structure manifests itself as a negative conductance, and not as an amplifier. In this paper we present calculations of the admit- tance of the electrode structure, and these calculations Manuscript received November 15, 1972. The author is with Philips’ Research Laboratories, Eindhoven, The Netherlands. I / I I L---,,,-,--,,- vd Fig. 1. Arrangement of the electrode structure near the semi- conductor surface. An ac voltage source is connected to the two sets of electrodes. are compared with experimental data. The theoretical approach and some representative results of the calcula- tions are given in Section 11. In Section I11 the experi- mentalresultsarepresented,andcomparedwiththe theoretical predictions. The conclusions and some spe- cific properties of different geometries are discussed in Section IV. 11. THEORY Consider the arrangement shown schematically in Fig. 1. An interdigital electrode structure is situated near the surface of a semiconducting half space. This electrode structure has a periodicity X= 2~/ko and is assumed to extend from x = - CQ to x = + CQ . The elec- trodes are alternately connected to the poles of an ac voltage source, which maintains a voltage $ =& expjwt on the electrode#. We assume that the electrodes are long in comparison to their width oc=~/2ko so that end effects may be ignored. The theoretical problem consists of calculating the admittance of the electrode structure as a function of the drift velocity of the charge carriers in the semiconductor, i.e., the R F charge on the elec- trodes has to be computed, the admittance being given by the time derivative of this charge divided by $0. In the plane of the electrode structure the potential can be expanded in a Fourier series: m +(x) = C [+(%bo) exp (-.+zbox) n-1 odd + +(-do) exp (j&x)], (1) where KO, which is assumed to be positive, is the funda-
Transcript
Page 1: Negative conductance of an interdigital electrode structure on a semiconductor surface

630 : EEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-20, NO. 7, JULY 1973

Negative Conductance of an Interdigital Electrode Structure

on a Semicornductor Surface

T. J. B. SWANENBURG

Absiracf-It is shown that an interdigital electrode structure situated near a semiconductor surface may exhibit negative conduc. tance if the drift velocity of the charge carriers in the semiconductos is sufiiciently large. The conditions for obtaining this negative con- ductance are derived, and these theoretical predictions are compared with experimental results obtained for an interdigital electrode struc- ture situated on an oxidized silicon surface. Negative conductance is observed in the frequency range from 25 to 75 MHz at a temperature of about 25 K, and the experimental data show good agreement with the theory. Finally the specific properties of different device geome- tries are considered with a view to the possibilities of operation at: room temperature and at higher frequencies.

I . INTRODUCTION

HE possibilities for obtaining amplification of electromagnetic waves by drifting charge carriers in semiconductors have been the subject of several

theoretical papers during the last decade (see, e.g., [l I , [2]). One of the severe problems arising in the practical realization of such a solid-state analog of the traveling wave tube is that the-electromagnetic wave propagation velocity must be reduced by a t least three orders of magnitude by a slow wave circuit in order to make resonant interaction with the charge carriers possible. A structure that should avoid this problem was pro- posed by Hines [3], but to our knowledge no device of this type has ever been in operation.

Quite recently, however, we achieved a solid-state negative resistance [4] in which the drifting charge car- riers interact with electrical waves that propagate along an interdigital electrode structure. The phase velocity of these waves is w/nko, w being the angular frequency of the waves, n an integer, and K O the fundamental wave number of the transducer. At sufficiently low frequen- cies the carrier drift velocity can easily exceed this phase velocity, resulting in a negative conductance of the electrode structure.

The main difference, as compared with the traveling wave tube, arises from the fact that the electrodes are alternately at the same potential, so that complex k values are impossible. The power transfer from the car- riers to the electrode structure manifests itself as a negative conductance, and not as an amplifier.

In this paper we present calculations of the admit- tance of the electrode structure, and these calculations

Manuscript received November 15, 1972. The author is with Philips’ Research Laboratories, Eindhoven,

The Netherlands.

I

/ I

I L - - - , , , - , - - , , -

vd

Fig. 1. Arrangement of the electrode structure near the semi- conductor surface. An ac voltage source is connected to the two sets of electrodes.

are compared with experimental data. The theoretical approach and some representative results of the calcula- tions are given in Section 11. In Section I11 the experi- mental results are presented, and compared with the theoretical predictions. The conclusions and some spe- cific properties of different geometries are discussed in Section IV.

11. THEORY Consider the arrangement shown schematically in

Fig. 1. An interdigital electrode structure is situated near the surface of a semiconducting half space. This electrode structure has a periodicity X = 2 ~ / k o and is assumed to extend from x = - CQ to x = + CQ . The elec- trodes are alternately connected to the poles of an ac voltage source, which maintains a voltage $ =& expjwt on the electrode#. We assume that the electrodes are long in comparison to their width o c = ~ / 2 k o so that end effects may be ignored. The theoretical problem consists of calculating the admittance of the electrode structure as a function of the drift velocity of the charge carriers in the semiconductor, i.e., the R F charge on the elec- trodes has to be computed, the admittance being given by the time derivative of this charge divided by $0.

In the plane of the electrode structure the potential can be expanded in a Fourier series:

m

+(x) = C [+(%bo) exp (-.+zbox) n-1 odd

+ + ( - d o ) exp (j&x)], (1)

where K O , which is assumed to be positive, is the funda-

Page 2: Negative conductance of an interdigital electrode structure on a semiconductor surface

SWANENBURG: NEGATIVE CONDUCTANCE 63 1

mental wave number of the electrode structure. The summation extends only over odd values of n because the potential changes sign from one electrode to the next.

Obviously the spatial Fourier components qj(nko) are connected with traveling waves of the form exp I j ( w t - n k o x ) ] . The surface-charge density on the elec- trodes associated with these waves, p(nko), can be found from the Fourier transform of the continuity equation for the normal component of the dielectric displacement

Dg(nkoj Ig-+o - Dg(nko) lg=-o = do), (2)

where the y axis is assumed to be directed outwards (Fig. 1).

The normal component of the dielectric displacement is related to the potential at the surface of a medium by the equation [5]

where k , = kzi+jkzi is the wave number in the propaga- tion direction along the surface, and eeff is the so-called effective dielectric constant, which contains all relevant information for describing the propagation of slow electrical waves along a surface. In the present case k , is real, so from (2) and (3) we find

~ ( n k o ) = [eeff(a, nko) + eo] 1 %ko I + ( % K O ) , (4)

where i t has been assumed that we have vacuum in the region y > 0 , and where eetf(w, nko) is the effective di- electric constant of the semiconductor covered with an insulating layer.

The problem can now be formulated as follows. The potential +(x) from (1) is known on the fingers of the electrode structure, but between the fingers i t is un- known. On the other hand, the R F charge in the y=O plane

P ( X > = C [ ~ ( n k o ) e ~ p (-j%koz) 00

n-1 odd

+ P(- exp ( j % k 0 ~ 1 ] (51

is equal to zero between the fingers, but unknown on the fingers. This mixed boundary value problem can be solved with the help of (4), which constitutes the rela- tionship between- qj(nko) and p(nko) , and consequently qj(xj and p ( x ) are both fully determined as a function of the voltage applied to the electrode structure.

The derivation of the effective dielectric constant of a semiconducting half space has been given by several authors [SI, [ 6 ] . In the sitnplest semiconductor model, neglecting band bending, trapping, and diffusion, eeff is of the form

where e l is the dielectric constant; of the semiconductor lattice, cr the bulk conductivity of the semiconductor, and v d the carrier drift velocity parallel to the surface (Fig. 1). Equation ( 6 ) shows that the imaginary part of eeff changes sign if v d becomes larger than w / k x . This negative conductivity has been demonstrated for in- stance in the separate medium acoustic surface wave amplifier [7] . A direct proof of the existence of this nega- tive conductivity is presented in this paper. In the fol- lowing, a more elaborate expression for e,ff [j], [ 6 ] is used, which includes the effect of charge carrier diffusion :

where k , follows from

D, is the diffusion constant of the charge carriers, and the sign of k , must be chosen in such a way that decay into the medium is obtained.

As has been outlined above, the boundary value prob- lern can be solved in principle once an appropriate ex- pression for Eeff is known. In simple situations, e.g., when E e f f does not depend on k, , analytical solutions for qj(nko) can be found [8]. In the present situation however, it was necessary to perform a numerical calculation of + ( d o ) . The procedure was as follows [SI: as a first step + ( k o ) , q5( - k o ) , + + . I 4( - N k o ) were computed assuming tha t +(x) =+o exp jwt a t N different sites on a finger, and tha t p(x) = 0 a t N different sites in the region between the fingers. I n this computation ( 7 ) and (8) were used to calculate eoff(w, nko). Subsequently, p ( x ) was evaluated using (4) and ( 5 ) , and integrated over one finger. This process was repeated for increasing values of N , until the integral of p(x) over one finger had converged suffi- ciently.

Before discussing the numerical results for several specific cases in detail, it may be useful to first present some of the main features of these results.

1) The real part of the admittance turns out to be- come negative if the drift velocity satisfies the two fol- lowing inequalities:

where oc = g / ~ l is the dielectric relaxation frequency of the semiconductor. The first condition, anticipated in the foregoing, is due to the fact that for energy transport from the carriers to the electrical wave on the fingers, the drift velocity should exceed the phase velocity of this wave. The second condition is that the transit time of a carrier bunch between two fingers should be less than the decay time of the bunch w C A 1 .

2 ) For a fixed value of w the maximum obtainable

Page 3: Negative conductance of an interdigital electrode structure on a semiconductor surface

63 2 IEEE TRANSACTIONS ON ELECTRON DEVICES, JULY 1973

TABLE I ._ ___

Quantity ..-

Symbol Value ~ ~~~ ~ ~ ~~

Angular frequency w 108 s-=

Si dielectric constant Fundamental wave number ko lo2 cm-1

Diffusion coefficient D, E l 11 €0

25 cm2.s-1 Electrode width/X a 0.25

negative conductance is found for w,=w. If w, is keFt. fixed, the maximum obtainable negative conductance increases linearly with w for w<<w,, and becomes inde- pendent of w if w>>w,.

3) The results show that in general q5(nko) #q5( -nko), which implies that traveling potential and charge wave:; are present. The relative amplitudes of these waves an: determined by the boundary conditions.

We will now discuss the numerical results for severa: specific cases in more detail. These calculations were performed for an electrode structure deposited on a silicon surface, under the assumption that the insulating SiOz layer is infinitely thin. The influence of a layer with finite thickness will be discussed in a later section. The calculations were carried out for several values of w c in the range lo6 s - ~ < w , < 1O'O s-l, as a functibn of the carrier drift velocity v d . The parameter values used are listed in Table I.

A . Sflatial Fourier Components of the Potential As mentioned before, the Fourier component +(nk0)

is different from $(- l zko) because of the asymmetry introduced by the drift field. This inequality is most pronounced for those drift velocities for which ceff(nko) differs most strongly from c , f f ( - n k o ) , i.e., for w - n k o v d = O . Fig. 2 shows the absolute values of +(nko) for n = _+ 1, 3 as a function of v d . The fundamental Fourier components differ by about one order of magni- tude for V d = U / k o = lo6 'cm.s-'. The greatest difference between q5(3ko) and q5( -3k0) is found for v d = w / 3 k 0

=3.106 cm.s-'. I t should be noted that for v d - 0 and for vd+ ~0 the dependence of w ( n k o ) on V d is very weak, and for these values of v d the amplitudes of the Fourier components coincide with the analytical results obtained in [8] for a dielectric insulator.

Obviously phenomena analogous to those shown in Fig. 2 are found for the Fourier components of t h e R F charge, p(nk0) . We shall not discuss these separately, but turn directly to the distribution p ( x ) of this charge on the electrodes.

B. Charge Distribution on the Electrodes T h e R F charge distribution on the fingers is shown in

Fig. 3(a) and (b) for a constant, positive value of the voltage q5 for several values of the drift velocity. Fig. 3(a) shows the charge component that is in phase with the voltage; Fig. 3(b) represents the component that has a phase difference of n/2. The'capacitive charge is dis- tributed symmetrically for v d = 0. With increasing drift velocity the total charge increases, and its center of

.01

t I O b L d l

Fig. 2. Absolute values I+(%ko) 1 of the Fourier components of the potential for 1z= f 1, + 3 as a function of the drift velocity.

1 2 3 A 5

L

Fig. 3. Distribution of (a) the capacitive and (b) the conductive

v d = 5 . 1 0 6 crn-s-'; o d = 1 0 6 ernes-'; v d = 1 . 3 1 0 6 cm-s-1; and vd charge on an electrode for various drift velocities: v d = O cm.s-1;

=2.106 crn.s-1.

gravity shifts to the left. Just below the threshold velocity (vd= l o6 cm a s 1 ) the integrated charge attains its maximum value, and for still higher velocities the 'center of gravity shifts to the right.

The conductive part of the charge shows a quite dif- ferent behavior. For v d = 0 the distribution is again sym- metric, and the total charge is negative, corresponding to a positive conductance. Just below threshold the charge on the left-hand side of the finger has changed sign, but the integrated charge is still negative. The maximum negative conductance is obtained for V d = 1.3 I O 6 cmes-l, and the corresponding charge distribution is shown in the next curve. With increasing drift velocity the charge becomes positive over the whole electrode, ,ut the integral vanishes for v d - + 00. (T. Admit tance of the Electrode Structure

As outlined before, the integral of the charge over an dectrode is proportional to the admittance per elec- trode. In Fig. 4 the admittance Y=G+jB is plotted for several values of wc. The drift velocity increases in the cirection of the arrows from zero to infinity, except for

Page 4: Negative conductance of an interdigital electrode structure on a semiconductor surface

SWANENBURG: NEGATIVE CONDUCTANCE 633

Fig. 4. Admittance of the electrode structure for various values of

in the direction of the arrows. the dielectric relaxation frequency wc. The drift velocity increases

the wc= 109-s-' curve, which starts at v d = 8.106 cm For v d = 0 the conductance is proportional to wc. The maximum negative conductance is obtained for w o = w , and for w,<<w the admittance describes a full circle in the complex Y plane. Calculations for fixed wc and vary- ing w show that the maximum obtainable negative con- ductance increases with increasing w for w < w , and be- comes constant for w>>wc.

The behavior of the conductance G as a function of v d is shown in Fig. 5 for several values of wc. For wL <w the threshold velocity vth is equal to the phase velocity of the voltage wave on the electrodes o / k o = lo6 cm .s-l, for higher values of w, 'Jth is determined by w, /ko .

D. Influence of an Insulating Layer The analysis given above is only valid if the electrode

structure is electrically insulated from the semiconduc- tor, i.e., no conduction current is permitted to flow from the semiconductor to the electrodes. Consequently the insulating layer must be sufficiently thick to prevent electrical short circuit between the semiconductor, which is biased by the drift voltage, and the electrodes. Obviously the interaction of the electrode structure with the charge carriers decreases with increasing thickness of the insulating layer. This decrease is the more pro- nounced the larger the value of w c . The dotted curve in Fig. 4 shows the influence of a Si02 layer of 5 pm for w, = lo8 s-l. These parameter values are chosen because

't 3 \ \1

Fig. 5. Conductance of the electrode structure as a function of the

wc = 108 s--l; and ue = IO* s-l. drift velocity for several values of w,: wo = l oB s-1; we =3.108 s-l;

they are close to the values used in the experiments de- scribed in Section 111.

There is one more point to be discussed in this section. I t is well known that a transverse magnetic field may have considerable influence on carrier waves propagat- ing at the surface of a semiconductor 1191- 11111. An ex- pression for the effective dielectric constant of a semi- conductor subjected to a drift field and a transverse magnetic field has been given in [j]. Calculations of the admittance of the electrode structure based on this ex- pression show that the magnitude of the negative con- ductance increases if the direction of the magnetic field B o is such that the Lorentz force is pointing into the semiconductor. If the threshold velocity 'Jth is de- termined by w,/ko a n increase of Bo results in a lower value of v , ~ .

I 11. EXPERIMENTS A . Ex6erimental Arrangement

The measurements reported be!ow were performed on samples consisting of an n-type silicon substrate (8 Q .cm a t 300 K) 200 pm thick 147. An interdigital elec- trode structure with 8 finger pairs was deposited on a 5-pm-thick Si02 layer covering the Si substrate. The period X=640 pm corresponds to a fundamental wave number k o = 98 cm-I, and the length of the fingers is 0.4 cm. Ohmic drift contacts were obtained by n+ diffusion.

A sufficiently low value of the dielectric relaxation frequency wc can be obtained in the temperature region from 20 to 30 K , where most of the carriers are frozen out of the conduction band.

Therefore, the sample was placed in a can containing about 1 torr He gas, which was immersed in liquid He. The temperature of the sample could be varied from 4.2 to 70 K , and was electronically stabilized to within 0.1 K. A t a certain temperature w c is then determined from the resistance between the drift contacts and the sample dimensions.

The real and imaginary parts of the admittance were

Page 5: Negative conductance of an interdigital electrode structure on a semiconductor surface

634 IEEE TRANSACTIONS ON ELECTRON DEVICES, JULY 1973

determined as follows. The electrode structure was in- cluded in a parallel LC circuit. At 4 .2 K the conductivity of the semiconductor vanishes, and consequently the electrode structure no longer contributes to the losses of the circuit. The Q factor is then only determined by the other components. Comparison of the resonance fre- quencies vrss of the circuit at 4 . 2 K with and without sample gives the imaginary part of the admittance, the real part being equal to zero. Next by raising the sam- ple temperature, the dielectric relaxation frequency w, is adjusted to a value between lo7 and 10'0 s-l, in which region the negative conductance is expected to occur. Again the resonance frequency and the Q factor of the circuit are measured. Comparison of these data with those obtained a t 4 .2 K gives the conductance and the change of the susceptance of the electrode structure.

If the negative conductance of the sample is large enough to compensate for the circuit losses, sponta- neous oscillation will occur. In this region the negative conductance can be determined from the rise time of these oscillations.

B. Results An example of the behavior of the conductance of the

electrode structure is shown in Fig. 6. These data were obtained at a frequency w = 3 . 1 0 8 s-l* For the lower values of wc the threshold drift field E t h is 160 V.cm-l, corresponding to a drift velocity of 3.2 106 cm.s-' for a mobility ,u==2.104 cm2.V-1.s-1 [ 1 2 ] . This value of Vth

agrees very well with the theoretical value w / k o = 3 . 1 0 6 cm ns-l. For w c 2 w the threshold field increases with in- creasing wc, and for w c = 5 . 1 0 s E t h =250 v + c m - l j which is again in excellent agreement with the value obtained from vth =wc/ko= 5.106 cm

As outlined in Section I1 the maximum negative con- ductance for fixed w is expected to occur for wc = w. This theoretical prediction is also verified by the experiment, as can be seen from Fig, 6.

Fig. 7 shows the behavior of the measured ad.mittance in the complex Y plane, again for w = 3 . 1 0 8 s-l. These data should be compared with the theoretical curves given in Fig. 4, which represent the admittance per cm electrode length. Qualitatively the agreement is very good. For the highest value of wc the conductance barely becomes negative, the maximum negative value of G is obtained for w, = w , and for still smaller values of wc the admittance curve becomes more and more sym- metric with respect to the B axis. However, there is a discrepancy of about one order of magnitude between theory and experiment as to the magnitude of the ad- mittance. This discrepancy is believed to be due to two effects which we have neglected in the computations. First, we assumed that the semiconductor was homoge- neous. However, the large potential difference between the electrodes and the semiconductor during the drift pulse undoubtedly disturbs the semiconductor prop- erties at the surface, but i t is difficult to estimate the influence of these deviations on the admittance. Sec- ondly the equivalent circuit used to calculate the admit-

-1 1 Fig. 6 . Observed conductance of the electrode structure

as a function of the drift field.

PF

1'5 T w 3.108 roc-'

-7.

X

Fig. 7. Observed behavior of the admittance for several values of wC.

tance from the resonance frequency and the Q factor of the LC circuit is too simple. No account has been taken of the inductance of the electrode structure itself. A simple consideration shows that this simplification leads to an incorrect hagnitude of the admittance, but that the threshold velocity and the dependence on wc remain unaffected.

Fig. 8 shows the dependence of the threshold drift field on frequency for four values of wc. For decreasing w the threshold fields tend to a constant value de- termined by wc, for increasing w all curves approach the same asymptote. The theoretical asymptote is given by the dashed line in Fig. 8, assuming the same value of the mobility as before.

According to the theoretical predictions the maximum negative conductance for a fixed value of w should occur for w c = w . The results obtained experimentally in the range from 2 .108 to 5.108 s-l are shown in Fig. 9, where the magnitude of wc at which the maximum negative conductance occurs, wcm, is plotted versus w . The dashed

Page 6: Negative conductance of an interdigital electrode structure on a semiconductor surface

SWANENBURG: NEGATIVE CONDUCTANCE 63 5

300

200

t Eth

100 1 J I

1 2

Fig. 8. Threshold drift field as a function of W.

3 4 5,108 sec-l

/ /

/

"'cm

t

Fig. 9. Dielectric relaxation frequency for which the maximum negative conductance occurs, morn, versus frequency w.

curve represents the theoretical prediction worn = w , the experimental data fit approximately the drawn line wcm= 0.6 w . The proportionality between uCrn and w is thus verified by the experiment, but the effective value of wc appears to be smaller than the one calculated from the bulk resistance by a factor of about 1.6. This devia- tion is not surprising in view of the uncertainty of the properties of the semiconductor near the surface, as discussed above.

The influence of a. transverse magnetic field was also studied experimentally. The results show that for low values of the magnetic field (230 <0.5 kG) the admit- tance behaves as expected. For one orientation of Bo the negative conductance is increased by about 20 percent for B o = 400 G, if Bo is reversed a 30 percent decrease of the negative conductance is observed. A t higher values of B o marked deviations from the expected behavior occur. The negative conductance tends to vanish for both directions of Bo. I t is clear that these deviations are due to the effect outlined in [S, appendix]. Due

I

"rf + 20 50 100 200 506 mv

Fig. 10. Normalized Q factor of the circuit as a function of the RF voltage applied to the electrode structure.

to the Lorentz force the carriers accumulate near the surface, t h u s establishing the Hall field. Conse- quently the dc conductivity near the surface will be different from its value in the bulk, and thus the assumption of a homogeneous semiconductor is in- validated. This effect is the more pronounced the smaller the equilibrium carrier density in the bulk, and a calcu- lation shows that for the present parameter values the deviation of the carrier density a t t he surface is of the same magnitude as the equilibrium density for Bo= 1 kG. Only for magnetic fields smaller than this critical value, may the theoretical computations be expected to be valid.

In the theoretical description given in Section I1 linearized transport equations for the semiconductor have been used. Consequently the predictions based on this theory can only be expected to be valid in a small signal approximation. In order to ma.ke sure that this condition was satisfied in the experiments, all measure- ments were carried out for various R F voltages on the electrode structure, and the data were always taken in the region where the admittance did not depend on the applied R F voltage. I t appeared that the deviations from linear behavior depend on the drift field, and that they are very pronounced in the drift field region where the conductance is negative. An example of this be- havior is shown in Fig. 10, where the ratio of the ob- served Q factor at a certain drift field and the Q factor of the circuit a t 4.2 K is plotted as a function of the R F voltage on the electrodes. Fig. 10 shows that pro- nounced nonlinearities occur for E d > 130 V .crn-l and V ~ ~ z . 5 0 mV. Spontaneous oscillation of the circuit is observed for 150 V.cm-'<Ed<250 V.cm-1, and the amplitude of the oscillations (-50 mV, Fig. 11) is limited by the same nonlinearities.

IV. CONCLUSIONS I t has been established that charge carrier waves a t

the surface of a semiconductor can be utilized to obtain a new type of solid-state negative resistance. A theory based on the concept of the so-called effective dielectric

Page 7: Negative conductance of an interdigital electrode structure on a semiconductor surface

636 IEEE TRANSACTIONS ON ELECTRON DEVICES, JULY 1973

Fig. 11. Spontaneous oscillation of the electrode structure (upper

drift current. Horizontal scale: 10 pslcm. trace). Vertical scale: 20 mV/cm. The lower trace shows the

constant is shown to give a good description of the data obtained experimentally. The theory quantitatively ex- plains in particular, the dependence of the threshold drift velocity on the dielectric relaxation frequency w, and the measuring frequency w , assuming a reasonable value for the mobility. Unfortunately the measurements could not be extended to higher values of w or w c , be- cause at drift fields larger than 300 V:cm-’ impact ionization occurs, which results in an even higher value of w, [13].

Both the theoretical and the experimental results show that negative conductance occurs only if vd > w, /ko for the configuration shown in Fig. 1. This requirement makes room temperature operation for Si (100 Q.cm, wc = 1Olo s-I) virtually impossible. This restriction how- ever may be relieved in other geometries, in which the effective dielectric relaxation frequency is decreased. Three different possibilities to achieve this will be dis- cussed briefly in this section.

A . Thin Semiconductor Layer I t is well known that the loss of a carrier wave in a

thin semiconductor layer is much smaller than in a semiconducting half space [9]. Apparently the decay time of a bunched charge increases considerably in such a configuration.

The computation of the admittance of an interdigital electrode structure situated on a thin semiconductor layer was performed in the way described in Section 11, but now the electrical boundary conditions a t t he sec- ond semiconductor surface were also taken into account. The results of these calculations show that the effect of reducing the thickness d of the semiconductor layer is equivalent to a reduction of w,. The admittance for wc = 1 O l o s-l and d = 1 p m nearly coincides with that for w,= l o8 s-] and d = 00. A further advantage of this configuration is that the dissipation by the drift current is reduced in proportion to the thickness of the layer.

B. High Permitt ivity Material In a configuration consisting of a semiconducting

half space on one side of the electrode structure and a

high permittivity material on the other, the effective dielectric relaxation frequency becomes wc’=w,el /e l +E, where E , is the die!ectric constant of the material on the other side of the electrodes. The numerica! calculations show that the threshold velocity decreases with increas- ing E , as expected. Of cocrse the susceptance is larger than in the case of vacuum, and the influence of the insulating layer increases with increasing E , because the electric field lines are “pulled” into the high permit- tivity material.

C. Symmetric Configuration As discussed in Section 11, the symmetry of the con-

figuration of Fig. 1 is destroyed by the application of a drift field. However, this symmetry can be restored by placing a second semiconductor, identical with the first one, on the other side of the electrodes, and by applying a drift field of equal magnitude but of opposite direction to this second semiconductor. As was shown in [I41 the dielectric relaxation frequency is then no longer an obstacle to the occurrence of negative con- ductance. Furthermore, the spatial Fourier components are in th i s case symmetric in k , and as a result the magnitude of the negative conductance increases con- siderably.

These three examples indicate that the restriction imposed by a high value of w, may be circumvented by proper design of the device. For operation a t higher frequencies, however, more serious problems have to be solved. If we take the maximum obtainable drift velocity v d = 10’ cm and the maximum value of ko= lo3 cm-l, then the highest frequency is given by w = 1O1O s-l, corresponding to 1500 MHz. And even this value of ko will give rise to many technical problems, because a very thin oxide layer (0.1 pm) then has to be used - for sufficient interaction between the electrode structure and the semiconductor. I n order to prevent breakdown due to the large dc voltage difference, the electrodes then have to be dc isolated from each other, so that they can be biased individually. In view of the results obtained so far, and bearing in mind that the negative conductance increases with increasing fre- quency, one may hope that these problems will be solved in the near future.

ACKNOWLEDGMENT

The author wishes to thank Dr. C. A. A. J. Greebe and Dr. J. Wolter, for many helpful discussions and P. J. W. Jochems and P. de Haan for preparation of the samples. The author also wishes to thank L. A. Raaij- makers for his able assistance in the measurements.

REFERENCES [ l ] L. Solymar and E. A. Ash, Int. J . Electron., vol. 20, p. 127, 1966. [2] M. Sumi, A p p l . Phys. Lett., vol. 9, p. 251, 1966. [3] hf. E. Hines, “Theory of space-harmonic traveling-wave inter-

actions in semiconductors,” I E E E Trans. Electron Devices, vol. ED-16, pp. 88-97, Jan. 1969.

[4] T. J. B. Swanenburg, Phys . Lett., vol. 38.4, p. 311, 1972.

Page 8: Negative conductance of an interdigital electrode structure on a semiconductor surface

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-20, NO. 7, JULY 1973 63 7

[5] C. A. A. J. Greebe, P. A. van Dalen, T. J. B. Swanenburg, and [9] G. S. Kino, “Carrier waves in semiconductors-Part I : Zero

[6] H. Okamoto and Y . Mizushima, Jupalz J . APpZ. Phys., vol. 9, J. Wolter, Phys. Rep., vol. lC, p. 235, 1971. temperature theory,” IEEE Trans. Electron Devices, vol. ED-17,

pp. 178-192, Mar. 1970. p. 1 1 13, 1970. [lo] C. A. A. J. Greebe, Phys. Lett., vol. 31A, p. 16, 1970.

[7] J. H. Collins, K. M. Lakin, C. F. Quate, and H. J. Shaw, AppZ. [ l l ] J. Wolter, Phys. Lett., vol. 34A, p. 87, 1971. Phys. Lett., vol. 13, p. 314, 1968. [12] F. J. Morin, and J. P. Maita, Phys. Rev., vol. 96, p. 28, 1954.

[8] H. Engan, “Excitation of elastic surkce waves by spatial har- [13] W. Kaiser and G. H. Wheatly, Phys. Rev. Lett., vol. 3, p. 334, monics of interdigital transducers, IEEE Truns. Electron 1959. Devices, vol. ED-16, pp. 1014-1017, Dec. 1969. [14] T. J. B. Swanenburg, Electron. Lett., vol. 8, p. 351, 1972.

O n the Avalanche Initiation Probability of Avalanche

Diodes Above the Breakdown Voltage

ROBERT J. McINTYRE

Abstract-In the calculation of the turn-on probabilities per unit time of avalanche diode microplasmas, or of the single-photon detec- tion probabilities of avalanche photodiodes used in the photon- counting mode, it is desirable to know how the avalanche initiation probability varies with voltage above the breakdown voltage. It is shown that the two coupled differential equations derived by Oldham et al. for the probabilities that a self-sustaining avalanche will be initiated in an avalanche diode biased above the breakdown voltage by an injected electron or by an injected hole (avalanche initiation probabilities) can be combined to provide a single integral equation for each of the electron, hole, and electron-hole pair initiation prob- abilities. These equations can be integrated for the special case in which the electron and hole ionization rates 0 1 ~ and Lyh are related by ah = k a , where k is a constant. A method of computing an effective value of k for other cases in which this approximation is not a good one is presented. The resulting expressions are shown to be con- sistent with previously published calculations by McIntyre of the breakdown probabilities both for the case k = 1 and for the more general case k # 1.

INTRODUCTION AND BACKGROUND w H E N T H E bias voltage on an avalanche diode is suddenly increased to a value above that

normally required for avalanche breakdown, breakdown does not occur until one or more carriers (holes and/or electrons) are injected into or generated within the high-field region of the depletion layer, and a self-sustaining avalanche is subsequently initiated. Not every injected or generated carrier will initiate an avalanche. Some will have no ionizing collisions before leaving the high-field region; others will initiate chains of carriers (two, three, or more) that eventually peter out after a few carriers. The avalanche initiation prob-

ability is defined as the probability that a carrier or carrier pair will initiate a current pulse that does not peter out, but that would continue to grow more or less exponentially in time indefinitely if the conditions that determine the magnitudes of the ionization coefficients in the high-field region did not change. I n any real device, of course, some mechanism sets in that limits the current. Typical limiting mechanisms are contact resistance, circuit impedance, diode heating, or space- charge effects. However, these limiting mechanisms do not normally have much effect until the number of carriers in the high-field region has grown to the extent that the chance of a subsequent statistical fluctuation to zero is almost nonexistent. Thus the avalanche initia- tion probabilities should be virtually the same in the idealized diode with no current-limiting mechanism as they are in real diodes.

Avalanche initiation probabilities are of interest in a t least two areas. One is in the study of the turn-on probability per unit time of a microplasma [1], which is the product of the injection or generation rate and the initiation probability (with suitable integration over the volume being considered). The other is in the determina- tion of the single-photon detection probability of an avalanche diode that has been cooled to the point at which the thermal generation rate is almost negligible (at least in comparison with the optical generation rate). Such a diode can be used in a Geiger-tube mode [ 2 ] with a suitable quench circuit which, after a pulse has been initiated, reduces the voltage to a point below

Manuscript received November 2, 1972; revised February 28, the breakdown voltage for a sufficient time (of the order 1973. This work was supported in part by the Defense Research Of 1 ns) for the avalanche to extinguish itself. I n S1uCh a Board of Canada under Grant 5567-04, Project E178. photon-counting mode the diode can be extremely Canada. sensitive, with single-photon detection probabilities of

The author is with RCA Limited, Ste. Anne de Bellevue, P. Q.,


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