K.K. Gan ATLAS Pixel Week 1
New Results on Opto-Electronics
K.K. GanThe Ohio State University
February 11, 2003
K. Arms, K.K. Gan, M.O. Johnson, H.P. Kagan, R.D. Kass, A. Rahimi, C Rush, R. Ter-Antonian, M. Zoeller
The Ohio State University
A. Ciliox, M. Holder, M. ZiolkowskiSiegen University
K.K. Gan ATLAS Pixel Week 2
Outline
l Result on VCSEL Annealingl Test with Type 0 cablel Test with RX/TXl Summary
K.K. Gan ATLAS Pixel Week 3
l limited annealing during irradiation partially recovers optical power lost] all links have good optical power before annealing
l one VCSEL has large radiation damage] large improvement with annealing] dead after > 100 hours of annealing
Optical Power of Irradiated Opto-boards after Annealing
0
200
400
600
800
1000
1200
0 100 200 300 400 500 600
Time (hours)
Po
wer
(m
W)
p+ implanted VCSEL
K.K. Gan ATLAS Pixel Week 4
l compare original and decoded data]measure minimum PIN current for no bit errors
Bit Error Testing with PP0/Type 0 Cables
DORICPIN
VDCVCSEL
Opto-pack
VDCVCSEL
Opto-board
bi-phase markedoptical signal
decoded data
decoded clock
PP0/Type 0 cables
K.K. Gan ATLAS Pixel Week 5
Opto-Board with PP0 + Type 0 Cables
l data/clock from DORIC to VDC rerouted via PP0/Type 0 cables
PP0
Type 0
K.K. Gan ATLAS Pixel Week 6
l PIN current thresholds measured with other links running at 40 mAl no increase in thresholds with PP0/Type 0 cables
PIN Current Thresholds with PP0/Type 0 Cables
0
5
10
15
20
25
30
35
link#1 link#2 link#3 link#4 link#5 link#6 link#7
I pin (
mA)
Opto-Board on Test Board
Opto-Board on PP0
Opto-Board on PP0 with Type 0 Cable
K.K. Gan ATLAS Pixel Week 7
l thresholds for no bit error measured with other links running at 40 mAl opto-board operates with lower thresholds with BPM/DRX] opto-board design is compatible with BPM/DRX
PIN Current Thresholds with BPM/DRX
0
5
10
15
20
25
30
35
link#1 link#2 link#3 link#4 link#5 link#6 link#7
I pin (
mA
)Opto-Board on Test Board
Opto-Board on Test Board with BPM/DRX
K.K. Gan ATLAS Pixel Week 8
l one irradiated VCSEL failed during annealingl no change in PIN current thresholds for no bit errors
with PP0/Type 0 cablel lower PIN current thresholds with BPM/DRX
] opto-board is compatible with BPM/DRX
Summary
K.K. Gan ATLAS Pixel Week 9
l DORIC-I5e: March 2003, with MCC run3 metal layers (MPW runs), MZ top metal g 5 metals, LM top metala improved power routing:extra metalsLM sheet resistance is 61% that of MZa reduced strays in input stage:top metal shielding layer further separated from m1, m2Minor improvements:double # contacts in one preamp FETa max. <IPIN>: 2mA g 4mAreduce area of input FETa reduce strays in input stageAdd power bypass capacitors (mimcaps?)
DORIC-I5e: Engineering RunPresentation by Mike Zeoller