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OMU-409 MECHATRONICS DIGITAL CIRCUITS Asst.Prof.Özgür ÜNVER December 25th, 2019
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Page 1: OMU-409 ME HATRONI S DIGITAL IR UITS

OMU-409MECHATRONICS DIGITAL CIRCUITS

Asst.Prof.Özgür ÜNVER December 25th, 2019

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•Data Lines

•Adress Lines

•Control Lines

Bus Line

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MICROPROCESSORS & MICROCOMPUTERS

The bus is a set of shared communication lines that serves as the central nervous system of the computer.

Each component connected to the bus communicates information to and from the bus via its own bus controller (Tx, Rx).

The data lines are used to communicate words to and from data registers in the various system components such as memory, CPU, and input/output (I/O) peripherals.

The address lines are used to select devices on the bus or specific data locations within memory.

The control lines transmit read and write signals, the system clock signal, and other control signals such as system interrupts

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CAN BUS

• The CAN Bus is an automotive bus developed by Robert Bosch,

• Mainly used in automotive and aerospace industries.

• CAN is a serial bus protocol to connect individual systems and sensors as an alternative to conventional multi-wire looms.

• It allows automotive components to communicate on a single or dual-wire networked data bus up to 1Mbps.

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INTERFACING COMMON PIC PERIPHERALSNumeric Keypad

• Each key in a keypad is attached to a normally open pushbuttonswitch.

• When a key is pressed, the switch closes.

• 7 digital pin is needed to read

What does 0100010 mean?

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Part of the code for keypads

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INTERFACING COMMON PIC PERIPHERALS

LCD Display

• LCDs come in different shapes and sizes that can support different numbers of rows of text and different numbers of characters per row.

• The standard choices for the number of characters and rows are;

• Less than 80 characters: 8 X 2, 16 X 1, 16 X 2, 16 X 4, 20 X 2, 24 X 2, 40 X2,

• More than 80 characters: 40 X 4.

• For an LCD display with 80 characters or less is controlled via 14 pins

• An example of a common 20 X 2 LCD is shown

http://arduino.cc/en/Tutorial/LiquidCrystalhttp://playground.arduino.cc/Code/LCDhttp://arduino.cc/en/Reference/LiquidCrystal?from=Tutorial.LCDLibrary

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Relay – Contactor - PLC

• http://www.youtube.com/watch?v=kt-4jJvYvzI

• http://www.youtube.com/watch?v=tMIg24cHqwE

• http://www.youtube.com/watch?v=GMbN9nb3qyk

• https://www.youtube.com/watch?v=ReTtgzN-Dmc

• https://www.youtube.com/watch?v=Qyno5g89GXI

• http://www.youtube.com/watch?v=dwJ5rmNOCZI

• http://www.youtube.com/watch?v=zJDsEqCyTqc

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PLC (Programmable Logic Controller)

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COMBINATIONAL LOGIC OPERATIONSAll the gates are manufactured as integrated circuits where transistors, resistors, and diodes exist on a single chip of silicon.

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COMBINATIONAL LOGIC OPERATIONS

Video 5.1

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EXAMPLE

http://www.neuroproductions.be/logic-lab/

A

B

C

D

E

F

G

Video 6.2

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EXAMPLE - SOLUTION

A*B = CC + D = EE F = G

A B C

0 0 0

0 1 0

1 0 0

1 1 1

C D E

0 0 0

0 1 1

1 0 1

1 1 1

E F G

0 0 0

0 1 1

1 0 1

1 1 0

G = E F = (C + D) F = ((A*B)+D) F

How many states do we need?

Answer: We have 4 buttons each have 0 and 1, therefore we have 2^4=16 different options!

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G = ((A*B)+D) F

A B D F Motor

0 0 0 0 0

0 0 0 1 1

0 0 1 0 1

0 0 1 1 0

0 1 0 0 0

0 1 0 1 1

0 1 1 0 1

0 1 1 1 0

1 0 0 0 0

1 0 0 1 1

1 0 1 0 1

1 0 1 1 0

1 1 0 0 1

1 1 0 1 0

1 1 1 0 1

1 1 1 1 0

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TIMING DIAGRAMS

In order to analyze complex logic circuits it helps to sketch a timing diagram, which shows the simultaneous levels of the inputs and outputs in a circuit vs. time.

The timing diagram can be used to illustrate every possible combination of input values and corresponding outputs, providing a graphical summary of the input/output relationships.

Multiple-input digital oscilloscopes and logic analyzers have thecapability to display timing diagrams for digital circuits.

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BOOLEAN ALGEBRA• Mathematical expressions for logic circuits.• A bar over a symbol indicates the Boolean operation NOT (inversion of a signal).

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BOOLEAN ALGEBRA

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DE MORGAN’S LAWSThey are useful in rearranging or simplifying longer Boolean expressions or in converting between AND and OR gates

Truth tables can be very helpful in verifying an identity.

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EXAMPLEThis is the first logic that we have constructed by taking the input from 3 digital sensors!

• Lets start to make the logic as simple as possible using mathematical calculations• Our aim is to minimize the total number of chips (gates) that we use!

Note that we are using;• 4 AND gates, • 2 OR gates,• 1 NOT gate (in total 7 gates or electronic chips!)

As a result, we end up with using only 1 AND, 1 OR, and 1 NOT gate, in total 3 gates, to have the same logic!

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DESIGN OF LOGIC NETWORKS

Suppose you are asked to design a circuit for a simple security protection system for a home.

The home-owner wants an alarm to sound if;• someone breaks into the house through a door OR window OR if something is moving

around in the house while the occupants are away. • Under certain conditions, the users may also want to disable portions of the alarm

system.

We assume that there are sensors to detect if windows or doors are disturbed and to detect motion.

To accomplish the goals of this security system, we design a combinational logic circuit using two switches that can be set by the owner.

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DESIGN OF LOGIC NETWORKS

The following steps facilitate the design of a digital circuit to solve this type of problem:

• Define the problem in words.

• Write quasi-logic statements (translated into Booleanexpressions).

• Write the Boolean expressions.

• Simplify and optimize the Boolean expressions, if possible.

• Write all-AND, all-NAND, all-OR, or all-NOR realization of the circuit to minimize the number of required logic gate IC components.

• Draw the logic schematic for the electronic realization of the circuit.

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DEFINE THE PROBLEM IN WORDSWe begin our logic design by translating the problem into a series of word statementsthat reflect what should be happening in the system.

We want the alarm system to create a high signal (sounding the alarm) for certain combinations of the house sensors. We want the user to be able to select one of three operating states:• The alarm will sound only if the windows or doors are disturbed (when the

occupants are sleeping).• The alarm will sound if the windows or doors are disturbed or if there is motion in

the house (when the occupants are away).• A disabled state where the alarm will not sound (during normal household activity).

At this time, we must define Boolean variables that will represent the inputsand outputs of the circuit.

The inputs to the system are A, B, C, and D, and the output is Y.

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WRITE QUASI-LOGIC STATEMENTS

Activate the alarm (Y =1) if;

• A is high AND the code C D is 0 1

• OR if A OR B is high AND the code is 1 0.

We further translate the word statements into logic-like statements. The quasi-logic statements for the security system are;

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WRITE THE BOOLEAN EXPRESSION

Write the Boolean expression based on the quasi-logic statement

Simplified Version

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AND REALIZATION

Once a Boolean expression is simplified, it may be desirable to manipulate the result further in order to convert all operations to a preferred type of gate (e.g., AND or OR).

The reason for this is that logic gates come packaged on integrated circuits in groups of four, six, or eight.

Therefore, we may be able to reduce the total number of ICs required by using all of one type of gate.

Converting from one gate type to another is easily accomplished with a repeated application of De Morgan’s laws.

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DRAW THE CIRCUIT DIAGRAM

• There are a total of four AND gates and six inverters, • The circuit can be constructed with two ICs: one quad AND gate IC (e.g., the

7408), which contains four AND gates, and one hex inverter IC (e.g., the 7404), which contains six inverters.

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IMPORTANT REMINDER

The solution just presented is known as a hardware solution because it uses integrated circuit gates to provide the desired logic.

An alternative is to implement the logic using a program running on a microcontroller.

This solution, called a software solution!

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GATES & FLIP-FLOPSLogic operations by interconnecting ICs containing gates and flip-flops are considered ashardware solution.

To make a change in functionality, the hardware circuitry must be modified and may require a redesign.

This is a satisfactory approach for simple design tasks

They are selected and hardwired on a circuit board,

They carry out predefined functions.

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FLIP-FLOPSDigital data is stored in the form of bits

RAM requires something for storing and switching between the two binary states.

A flip-flop is a sequential logic device that can perform this function.

The flip-flop is called a bistable device,

It has two possible stable output states: 1 (high) and 0 (low).

It has the capability to remain in a particular output state (i.e., storing a bit)

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RS FLIP FLOPS is the set input,

R is the reset input,

Q and Q ͞ are the complementary outputs.

The RS flip-flop operates based on the following rules:

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RS FLIP FLOP

• The propagation delays Δt1 and Δt2 are usually in the nanosecond range. • All sequential logic devices depend on feedback and propagation delays for their operation.

http://www.youtube.com/watch?v=--pv3MZMoo0

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TRIGGERING OF FLIP-FLOPS

Flip-flops are usually clocked (a signal designated “clock” coordinates the changes) .

We need a microprocessor (all system changes are triggered by a common clock signal).

This is called synchronous operation (changes in state are coordinated by the clock pulses).

Positive edge triggering (small angle bracket on the clock input)

Negative edge triggering (small circle and angle bracket on the clock input)

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TRIGGERING OF FLIP-FLOPS

The up-arrow ↑: positive edge transition from 0 to 1

As long as there is no positive edge transition, the values of S and R have no effect on the output as shown by the X symbols in the last row of the table

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LATCH

http://www.youtube.com/watch?v=v3HEZAoU60k

There are special devices that are not edge triggeredwhich are called Latches

The output Q tracks the input D as long as CK is high

When a negative edge occurs (when CK goes low), the flip-flop will store (latch) the value that D had at the negative edge, and that value will be retained at the output.

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