Reliability Modeling on 90 nm n-channel MOSFETs

with BSIM4 Dedicated to HCI Mechanisms

Generation Principle of 1/f noiseBackgroundResearch Goal

RD Model Equations Proposed Model Mobility Model

Intro

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Summary

Takuya Totsuka1), Hitoshi Aoki1), Fumitaka Abe1), Khatami Ramin1), Yukiko Arai1),

Shunichiro Todoroki1), Masaki Kazumi1), Wang Taifeng1), Haruo Kobayashi1),

1) Gunma University 1-5-1 Tenjin-cho, Kiryu 376-8515, Japan

Developed MOSFET model

• HCI induced DC degradation model

• 1/f noise model

1/f noise: Occurred in all active elements

Dominant in the low frequency

Electrons are trapped in the channel

- - - - -- -𝑆𝑖𝑑 𝑓 =

𝐾𝐹 ∙ 𝐼𝑑𝑠𝐴𝐹

𝐶𝑂𝑋𝐿𝑒𝑓𝑓2𝑓𝐸𝐹

• Manufacturing Variations

• Degradations of Circuit Performance

Due to Time and Temperature

Circuit Density

Performance

Circuit Size

Large ⇒ Small

Show deterioration

1/f noise at DC

0 0.2 0.4 0.6 0.8 1 1.20

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2x 10

-5

vg[V]

id[A

]

Show degradation

DC characteristics

Hot Carrier Injection (HCI)

Reaction-Diffusion model (RD model)

• Modeled hot carrier effect

• Represented hydrogen diffusion of particles

• 𝑵𝑯(𝟎)𝑵𝒊𝒕 ≈𝒌𝑭

𝒌𝑹𝑵𝟎 (1)

• 𝑵𝑯𝒙= 𝒌𝑯𝑵𝑯

𝒏𝒙 (2)

• 𝑵𝒊𝒕 =𝝅𝑾

𝟐𝑨𝒕𝒐𝒕𝒏𝒙 𝟎

𝑫𝑯𝒙𝒕 𝑵𝑯𝒙 𝟎 𝒓 −𝒓𝟐

𝑫𝑯𝒙𝒕𝒅𝒓

= 𝑵𝑯𝒙(𝟎)𝛑𝒏𝒙

𝟏𝟐𝑳𝑫𝑯𝒙𝒕 (3)

• 𝑵𝒊𝒕 =𝒌𝑭𝑵𝟎

𝒌𝑹

𝒏𝒙𝟏+𝒏𝒙 𝒏𝒙𝛑𝒌𝑯

𝟏𝟐𝑳𝑫𝑯

𝟏

𝟏+𝒏𝒙 ∗ 𝒕𝟏

𝟏+𝒏𝒙 (4)

• ∆𝑽𝒕𝒉𝑫𝑬𝑮𝑹𝑨𝑫𝑨𝑻𝑰𝑶𝑵 =

𝑪𝑯𝑪𝑰𝒌𝑭𝑵𝟎

𝒌𝑹

𝒏𝒙𝟏+𝒏𝒙 𝒏𝒙𝛑𝒌𝑯

𝟏𝟐𝑳𝑫𝑯

𝟏

𝟏+𝒏𝒙 ∗ 𝒕𝟏

𝟏+𝒏𝒙 (5)

𝛍𝐞𝐟𝐟 =𝐔𝟎

𝟏+(𝐔𝐀+𝐔𝐂∗𝐕𝐛𝐬𝐞𝐟𝐟)𝐕𝐠𝐬𝐭𝐞𝐟𝐟+𝐂𝟎( 𝐕𝐓𝐇𝟎 −𝐕𝐅𝐁−∅𝐬)

𝐓𝐎𝐗𝐄

𝐄𝐔 (6)

𝑽𝒕𝒉 = 𝑽𝑻𝑯𝟎 + ∆𝑽𝒕𝒉，𝒃𝒐𝒅𝒚_𝒆𝒇𝒇𝒆𝒄𝒕−∆𝑽𝒕𝒉，𝒄𝒂𝒓𝒈𝒆𝒔𝒉𝒂𝒓𝒊𝒏𝒈 − ∆𝑽𝒕𝒉，𝑫𝑰𝑩𝑳

+∆𝑽𝒕𝒉，𝒓𝒆𝒗𝒆𝒓𝒔𝒆_𝒔𝒉𝒐𝒓𝒕_𝒄𝒂𝒏𝒏𝒆𝒍 + ∆𝑽𝒕𝒉，𝒏𝒂𝒓𝒓𝒐𝒘𝒘𝒊𝒅𝒕𝒉

+∆𝑽𝒕𝒉，𝒔𝒎𝒂𝒍𝒍_𝒔𝒊𝒛𝒆 − ∆𝑽𝒕𝒉，𝒑𝒐𝒄𝒌𝒆𝒕_𝒊𝒎𝒑𝒍𝒂𝒏𝒕

+∆𝑽𝒕𝒉_𝑫𝑬𝑮𝑹𝑨𝑫𝑨𝑻𝑰𝑶𝑵 (7)

Threshold voltage shift due to HCI

Implemented to mobility

model equation

Modeling of mobility degradation phenomenon

・HCI degradation model was studied and implemented

in BSIM4 of our MDW-SPICE simulator

・BSIM4 and degradation model parameters were extracted

with measurements of 90nm n-channel MOSFETs

・Simulation verifications of DC drain currents

were performed with and without bias stresses

・1/f noise model parameters

were extracted with measurements

・Simulation verifications of drain output 1/f noise density

were performed with and without bias stresses

90 nm process n-channel MOSFET

Large Channel Width 10.0μm

Channel Length 10.0μm

Short Channel Width 10.0μm

Channel Length 0.1μm

Conditions for Our Experiments

Stress condition

Degradation parameter is based on 65nm process device’s,

whereas our device is fabricated with 90nm process

・Temperature 300.15 [K]

・Time 1,000 [hours]Extraction software

MoDeCH Inc. X-tractor

Measurement and Simulation Environment Id-Vg Characterizations

0 0.2 0.4 0.6 0.8 1 1.20

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2x 10

-5

vg[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2x 10

-5

vg[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1x 10

-3

vg[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1x 10

-3

vg[V]

id[A

]

・ Measured value

- Simulation value

Id-Vd CharacterizationsMeasurement and Simulation of

Drain Output 1/f Noise Density

Large

Short

Degradation

0 0.2 0.4 0.6 0.8 1 1.20

0.2

0.4

0.6

0.8

1

1.2x 10

-4

vd[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.2

0.4

0.6

0.8

1

1.2x 10

-4

vd[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.5

1

1.5

2

2.5

3

3.5x 10

-3

vd[V]

id[A

]

0 0.2 0.4 0.6 0.8 1 1.20

0.5

1

1.5

2

2.5

3

3.5x 10

-3

vd[V]

id[A

]

-170

-160

-150

-140

-130

-120

-110

1.00E+01 1.00E+02 1.00E+03 1.00E+04 1.00E+05

Measured value

1/f noise before degradation

1/f noise after degradation

Frequency [Hz]No

ise

Volt

age

Sp

ectr

um

Den

sity

[d

B𝑉

^

2/Hz]

𝑆𝐼𝐷 =𝐶𝑂𝑋 ∗ 𝜇𝑒𝑓𝑓 ∗ 2 ∗ 𝑘 ∗ 𝑇 ∗ 𝛼𝐻𝑛𝑜𝑚𝑖𝑛𝑎𝑙

∗ 𝐷 ∗ 𝑒−(𝑉𝑔𝑠−𝑉𝑡ℎ) ∗ 𝐼𝑑𝑠𝐴𝐹

𝐶𝑂𝑋𝐿𝑒𝑓𝑓2𝑓𝐸𝐹

Vth↑ ⇒ Ids↓ ⇒ Sid↓

αHnormal↑ ⇒ Sid↑

・ Measured value

- Simulation value

Large

Short

Degradation

[1] S. Todoroki, H. Aoki, F. Abe, K. Ramin, Y. Arai, M. Kazumi, T. Totsuka, H. Kobayashi, “1/f Noise Variance Modeling of Gate

Voltage Dependence with n-channel MOSFETs,” Institute of Electrical Engineers Japan (IEEJ). ECT-14-010 Kanazawa (Jan, 2014).

[2] H. Aoki，M. Shimasue，Y. Kawahara，CMOS Modeling Technology，Maruzen Publishing, (2006).

[3]H. Aoki, “Bias and Geometry Dependent Flicker Noise Characterization for n-MOSFETs,” IEICE Trans. Electronics, vol. E85-C,

no.2 pp.408-414(2002).

[4] Information on http://www-device.eecs．berkeley.edu/bsim/

[5] C． Hu， et al， “Hot-electron induced MOSFET degradation model, monitor, and improvement,” Trans． Electron Devices， 32(2)，375-385， 1985．

[6] E. Maricau and G. Gielen， Analog IC Reliability in Nanometer CMOS， Springer Science Business Media New York, 2013．

[7] H． Kufluoglu and M．A．Alam, “A unified modeling of NBTI and hot carrier injection for MOSFET reliability,” 10th International

Workshop on Computational Electronics， pp. 28-29, Oct． 2004．

[8] H. Aoki and M. Shimasue, “Noise Characterization of MOSFETs for RF Oscillator Design,” Proc. 1999 IEEE MTT-S International

Microwave Symposium, Anaheim CA, (Jun. 1999).

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