Pdc Course File

PDC Course File

Department of Electronics and Communication

PULSE AND DIGITAL CIRCUITSII B.Tech – II Semester

JOGINPALLY B.R.ENGINEERING COLLEGEPOST: Yenkapally, Moinabad (Mandal)

Himathnager (post), Hydreabad-75

PULSE AND DIGITAL CIRCUITS

JBREC 1 DEPARTMENT OF ECE

PDC Course File

II B Tech – I SemesterIndex

Sl.No. TOPIC PAGE No.

1 Course Objective & Guidelines to Students 3

2 Results Target & Method of Evaluation 4

3 JNTU Syllabus 5

4 Books / Material 6

5 Lesson Plan 7

6 Session Plan 9

7 Assignments 13

8 Tutorial 21

9 Unit Wise FAQ 23

10 University question papers 26

11 Lecture Notes 35

SIGN OF HOD


PDC Course File

Course Objective

In this course students will learn about: The subject is concerned with the generation and processing of non sinusoidal

waveforms. Most non sinusoidal waveforms that appear regularly are step, ramp, pulse, and

square, exponential. The responses to there of RC, RL, RLC circuits are discussed.

Basic functions such as clipping, clamping, comparators, generation of square wave or pulse waveforms are studied.

Discuss about switching characteristics of diode and transistor. Some regenerative amplifiers which behave as bi stable circuits are studied. Discuss about basic logic gates Discuss about time base generators which have applications in radar and TV

indicators, CRO etc..

Guidelines to Students

Where will this subject help?

Scope and Objective of the course: This subject helps in understanding the generation and processing of non sinusoidal waveforms. The switching mode of operation can also be analyzed. This subject gives us an idea or overview to transmit the signal from one location to another, to amplify it, to select a portion of it in voltage, to choose a section of it in time, to combine it with other signal in order to perform a logic operation, to use it to synchronize a system and so orth.

Results Target

Total Strength of the Class140


PDC Course File

S. No Class / Division No. of Students

a. First Class with Distinction 60

b. First Class 60

c. Pass Class 20

Method of Evaluation

a. Unit Wise Assignments 8

b. Objective Examination 2

c. Descriptive Exam 2

d. Final Examination 1

MINIMUM PASS MARKS

EXAMINATIONS Max Marks Pass Marks

a.Internal Examination(Best of two Descriptive+Objective+assignment)

10+10+5=25marks

---

b. Final Examination 75marks 28

JNTU Syllabus


PDC Course File

Unit-ILinear Wave Shaping: High pass and low pass RC circuits and their response for Sinusoidal, Step, Pulse, Square & Ramp inputs, High pass RC network as Differentiator, Low pass RC circuit as an Integrator, Attenuators and its application as a CRO Probe, RL and RLC Circuits and their response for step Input, Ringing Circuit.Unit-IINon-Linear Wave Shaping: Diode clippers, Transistor Clippers, Clipping at two independent levels, Comparators, Applications of Voltage comparators. Clamping Operation, Clamping circuit taking Source and Diode resistances into account, Clamping Circuit Theorem, Practical Clamping Circuits, Effect of Diode Characteristics on Clamping Voltage, Synchronized Clamping.Unit-IIISwitching Characteristics of Devices: Diode as Switch, Piecewise Linear Diode Characteristics, Diode Switching times, Transistor as a Switch, Breakdown voltages, Transistor in Saturation, Temperature variation of Saturation Parameters, Transistor-switching times, Silicon-controlled –switch circuits.Unit-IVMultivibrators: Analysis and Design of Bi-stable, Mono-stable, Astable Multivibrators and Schmitt trigger using Transistors.Unit-VTime Base Generators: General features of a Time base signal, Methods of Generating Time Base Waveform, Miller and Bootstrap Time Base Generators-Basic Principles, Transistor Miller Time Base generator, Transistor Bootstrap Time base Generator, Transistor Current Time Base Generators, Methods of Linearity improvement.Unit-VISampling Gates: Basic operating principles of Sampling Gates, Unidirectional and Bi-directional sampling Gates, Four Diode Sampling Gate, Reduction of pedestal in gate Circuits, Six Diode Gate, Application of Sampling Gates>Unit-VIISynchronization and Frequency Division: Pulse Synchronization of Relaxation Devices, Frequency division in Sweep Circuit, Stability of Relaxation Devices, Astable Relaxation Circuits, Monostable Relaxation Circuits, Synchronization of a Sweep Circuit with Symmetrical Signals, Sine wave frequency division with a Sweep Circuit, A Sinusoidal Divider using Regeneration and Modulation.

Unit-VIIIRealization of Logic Gates Using Diodes & Transistors: AND, OR and NOT Gates using Diodes and Transistors, DCTL, RTL, DTL, TTL and CML Logic Families and its Comparison

Books / Material


PDC Course File

Text Books:1. Millman’s Pulse, Digital and Switching Waveforms – J.Millman, H.Taub and Mothiki S.

Prakash Rao, 2 ed., 2008, TMH.2. Solid State Pulse circuits – David A. Bell, 4 ed., 2002 PHI.

Suggested / Reference Books

References: 1. Pulse and Digital Circuits – A. Anand Kumar, 2005, PHI.2. Fundamentals of Pulse and Digital Circuits – Ronald J Tocci, 3 ed., 20083. Pulse and Digital Circuits – Motheki S. Prakash Rao, 2006, TMH. 4. Wave Generation and Shapping- L .Strauss.


PDC Course File

Lesson Plan

Number of Hours / lectures available in this Semester / Year : 65

Distribution of Hours Unit – Wise (minimum Hours:50;Max:65)

Unit Topic Total No. of Hours

I

Linear Wave Shaping: High pass and low pass RC circuits and their response for Sinusoidal, Step, Pulse, Square & Ramp inputs, High pass RC network as Differentiator, Low pass RC circuit as an Integrator, Attenuators and its application as a CRO Probe, RL and RLC Circuits and their response for step Input, Ringing Circuit.

10

II

Non-Linear Wave Shaping: Diode clippers, Transistor Clippers, Clipping at two independent levels, Comparators, Applications of Voltage comparators. Clamping Operation, Clamping circuit taking Source and Diode resistances into account, Clamping Circuit Theorem, Practical Clamping Circuits, Effect of Diode Characteristics on Clamping Voltage, Synchronized Clamping

9

III

Switching Characteristics of Devices: Diode as Switch, Piecewise Linear Diode Characteristics, Diode Switching times, Transistor as a Switch, Breakdown voltages, Transistor in Saturation, Temperature variation of Saturation Parameters, Transistor-switching times, Silicon-controlled –switch circuits.

5

IVMultivibrators: Analysis and Design of Bi-stable, Mono-stable, Astable Multivibrators and Schmitt trigger using Transistors. 10

V

Time Base Generators: General features of a Time base signal, Methods of Generating Time Base Waveform, Miller and Bootstrap Time Base Generators-Basic Principles, Transistor Miller Time Base generator, Transistor Bootstrap Time base Generator, Transistor Current Time Base Generators, Methods of Linearity improvement.

8

VI

Sampling Gates: Basic operating principles of Sampling Gates, Unidirectional and Bi-directional sampling Gates, Four Diode Sampling Gate, Reduction of pedestal in gate Circuits, Six Diode Gate, Application of Sampling Gates>

7

VII Synchronization and Frequency Division: Pulse Synchronization of Relaxation Devices, Frequency division in Sweep Circuit, Stability of Relaxation Devices, A stable Relaxation Circuits, Mono stable Relaxation Circuits, Synchronization of a Sweep Circuit with

9


PDC Course File

Symmetrical Signals, Sine wave frequency division with a Sweep Circuit, A Sinusoidal Divider using Regeneration and Modulation

VIII

Realization of Logic Gates Using Diodes & Transistors: AND, OR and NOT Gates using Diodes and Transistors, DCTL, RTL, DTL, TTL and CML Logic Families and its Comparison. 7

TOTAL 65

The number of topic in every unit is not the same – because of the variation, all

the units have an unequal distribution of hours

Session Plan


PDC Course File

Unit – 1Hour No.

Date Topic Reference Books

1. Linear Wave Shaping: High pass RC network as Differentiator

TB-1, RB-1, RB-4

2. High pass RC circuit response for Sinusoidal, Step input

TB-1, RB-1, RB-4

3. High pass RC circuit response for Pulse, Square input TB-1, RB-1, RB-44. High pass RC circuit response for ramp &exponential

inputTB-1, RB-1, RB-4

5. Low pass RC circuit as integrator Low pass RC circuit response for Sinusoidal, Step input

TB-1, RB-1, RB-4

6. Low pass RC circuit response for Pulse, Square input TB-1, RB-1, RB-4

7. Low pass RC circuit response for ramp &exponential input

TB-1, RB-1, RB-4

8 Attenuators and its application as a CRO Probe TB-1, RB-1, RB-4

9. RL Circuits and their response for step Input, TB-1, RB-1, RB-4

10 RLC Circuit and their response for step Input, Ringing Circuit.

TB-1, RB-1, RB-4

Unit – 2

Hour No.


11 Non-Linear Wave Shaping: Diode clippers TB-1, RB-1, RB-4

12 Transistor Clippers TB-1, RB-1, RB-4

13 Clipping at two independent levels TB-1, RB-1, RB-4

14 Comparators, Applications of Voltage comparators. TB-1, RB-1, RB-4

15 Clamping Operation TB-1, RB-1, RB-4

16 Clamping circuit taking Source and Diode resistances into account

TB-1, RB-1, RB-4

17 Clamping Circuit Theorem, Practical Clamping Circuits

TB-1, RB-1, RB-4

18 Effect of Diode Characteristics on Clamping Voltage

TB-1, RB-1, RB-4

19 Synchronized Clamping TB-1, RB-1, RB-4

Unit – 3


PDC Course File

Hour No.


20 Switching Characteristics of Devices: Diode as Switch, Piecewise Linear Diode Characteristics

TB-1, RB-1

21 Diode Switching times TB-1, RB-1

22 Transistor as a Switch, Breakdown voltages, Transistor in Saturation

TB-1, RB-1

23 Temperature variation of Saturation Parameters, Transistor-switching times

TB-1, RB-1

24 Silicon-controlled –switch circuits. TB-1, RB-1

Unit – 4

Hour No.

Date Topic Reference[Book – 1]

25 Multi vibrators: Analysis of Bi-stable Multi vibrators.

TB-1, RB-1

26 Design of Bi-stable Multi vibrators using Transistors. TB-1, RB-1

27 Analysis of Mono-stable Multi vibrators TB-1, RB-1

28 Design of Mono-stable Multi vibrators TB-1, RB-1

29 problems TB-1, RB-1

30 Analysis of As table Multi vibrators TB-1, RB-1

31 Design of As table Multi vibrators using Transistors TB-1, RB-1

32 Analysis of Schmitt trigger TB-1, RB-1

33 Design of Schmitt trigger using Transistors TB-1, RB-1

34 problems TB-1, RB-1

Unit – 5

Hour No.


35 Time Base Generators: General features of a Time TB-1, RB-4


PDC Course File

base signal, 36 Methods of Generating Time Base Waveform TB-1, RB-4

37 Miller Time Base Generators-Basic Principle, , TB-1, RB-4

38 Transistor Miller Time Base generator TB-1, RB-4

39 Transistor Bootstrap Time base Generator TB-1, RB-4

40 Bootstrap Time Base Generators-Basic Principle TB-1, RB-4

41 Transistor Current Time Base Generators TB-1, RB-4

42 Problems, Methods of Linearity improvement TB-1, RB-4

Unit – 6

Hour No.


43 Sampling Gates: Basic operating principles of Sampling Gates

TB-1, RB-1

44 Unidirectional sampling Gates TB-1, RB-1

45 Bi-directional sampling Gates TB-1, RB-1

46 Four Diode Sampling Gate TB-1, RB-1

47 Reduction of pedestal in gate Circuits TB-1, RB-1

48 Six Diode Gate TB-1, RB-1

49 Application of Sampling Gates TB-1, RB-1

Unit – 7

Hour No.


50 Pulse Synchronization of Relaxation Devices, TB-1, RB-1


PDC Course File

51 Frequency division in Sweep Circuit TB-1, RB-1

52 Stability of Relaxation Devices TB-1, RB-1

53 A stable Relaxation Circuits TB-1, RB-1

54 Mono stable Relaxation Circuits TB-1, RB-1

55 Synchronization of a Sweep Circuit with Symmetrical Signals

TB-1, RB-1

56 Sine wave frequency division with a Sweep Circuit TB-1, RB-1

57 A Sinusoidal Divider using Regeneration and Modulation

TB-1, RB-1

58 Review TB-1, RB-1

Unit – 8

Hour No.


59 Realization of AND Gate using Diodes and Transistors

TB-1, RB-3

60 Realization of OR and NOT Gates using Diodes and Transistors

TB-1, RB-3

61 DCTL Logic Family TB-1, RB-3

62 RTL Logic Family TB-1, RB-3

63 DTL Logic Family TB-1, RB-3

64 TTL Logic Family TB-1, RB-3

65 CML Logic Family TB-1, RB-3

Assignments

Unit – 1


PDC Course File

1. Explain the response of a high-pass circuit to an exponential input is applied.OR

Explain the operation of RC high-pass circuit when exponential input is applied.2. Derive the expression for percentage tilt (P) of a square wave output of RC high-pass circuit.3. Verify V2 = (V/2) (e2x -1)/(e2x+1) = (V/2) tanhx for a symmetrical square wave applied to a low-

pass RC circuit.4. What is the ratio of the rise time of the three sections in cascade to the rise time of single

section of low-pass RC circuit?5. An Ideal 1 m sec pulse is fed to a low-pass circuit. Calculate and plot the output waveform under

the following condition. The upper 3-db frequency is ,(i) 10 MHz(ii) 1 MHz(iii) 0.1 MHz

6. Prove that an RC circuit behaves as reasonably good integrator if RC > 15T, where T is the period of an input ‘Em sinwt’

7. Explain RC double differentiator circuit.8. Explain about RLC ringing circuit.

Unit –2

1. Classify different types of clipper circuits. Give their circuits and explain their operation with the aid of transfer characteristics.

2. Give the circuits of different types of shunt clippers and explain their operation with the help of their transfer characteristics.

3. Draw the circuit diagram of emitter coupled clipper. Draw its transfer characteristics indicating all intercepts, slopes and voltage levels derive the necessary equations.

4. Draw the basic circuit diagram of positive peak clamper circuit and explain its operation.5. Explain synchronized clamping circuit.

ORWhat is synchronized clamping? Explain.

6. Design a clipping circuit with ideal components, which can give the waveform shown in figure


PDC Course File

for a sinusoidal input.7. Explain the operation of two level slicer.

ORDraw the circuit diagram of slicer circuit using zener diodes and explain its operation with the help of its transfer characteristics.

8. For the circuit shown in figure, Vi is sinusoidal voltage of peak 100 volts. Assume ideal diodes.Sketch one cycle of output voltage. Determine the maximum diode current.

9. Explain positive peak clipping with reference voltage.10. Draw the diode comparator circuit and explain the operation of it when ramp input signal is

applied.OR

What is meant by comparator and explain diode differentiator comparator operation with the help of ramp input signal applied?

11. State and prove clamping circuit theorem.12. Draw the basic circuit diagram of negative peak clamper circuit and explain its operation.

Unit – 3

1. What are catching diodes?2. Give a brief note on piece-wise linear diode characteristics.3. Write short notes on.

(a). Diode switching times(b). Switching characteristics of transistors(c). FET as a switch.

4. Sketch neatly the waveform s of current and voltage for a transistor switch with capacitive loading circuit.

5. Explain how a transistor can be used as a switch.OR

Explain the behavior of BJT as a switch, Give applications.6. Explain the phenomenon of ‘latching’ in a transistor switch.

OR

Explain phenomenon of latching in a transistor.7. Describe the switching times of BJT by considering the charge distribution across the base

region.8. Give the expressions for rise time and fall time in terms of transistor parameters and operating


PDC Course File

currents.OR

Define rise time and fall time of transistors switch. Derive expressions for these in terms of the transistors parameters and operating currents.

Unit – 4

1. Discuss the different methods of triggering a flip-flop. Explain the role of communicating capacitors in a binary circuit.

OR

Discuss the various methods of triggering a multivibrator.2. Draw the circuit diagram of self-bias with symmetrical triggering using diodes. Explain the

working of the same.3. Explain the reason for the occurrence of overshoot at the base of normally ON transistor of one

shot. Derive an expression for overshoot.4. Show that the Astable multivibrator works as voltage controlled oscillator.5. Explain about the response of Schmitt binary to an arbitrary input signal with appropriate

diagram.OR

Draw the circuit diagram of a Schmitt trigger circuit and explain its operation. Derive the expressions for its UTP and LTP.

6. What do you understand by hysteresis? What is hysteresis voltage? Explain how hysteresis can be eliminated in a Schmitt trigger.

7. Write short notes on a stable multivibrator as a voltage to frequency converter with circuit and waveform.

OR

Explain the operation of astable multivibrator with a circuit diagram with relevant waveforms


PDC Course File

Unit – 5

1. Draw and explain the typical waveform of a time base voltage.OR

Draw and clearly indicate the restoration time and fly back time on the typical waveform of a time base voltage.

2. Explain the principle of working of exponential sweep circuit with neat circuit diagram and also derive the equations for slope, transmission and displacement error.

3. Derive the relation between the slope, transmission and displacement errors.4. Explain how UJT is used for sweep circuit.5. What is a linear time base generator? Give its applications.6. Why the time base generators are called sweep circuits?7. How are linearly varying current waveforms generated?8. Bring out the necessity and importance of current sweep circuits. List out its applications.

OR

Bring out the necessity and importance of time base circuit.9. What type of voltage input is required to obtain a linear current sweep?

OR

What are the techniques used to improve the linearity of current sweeps? Illustrate with examples.

10. Write the differences between the voltage and current time base generators.


PDC Course File

Unit – 6

1. What do you mean by synchronization?2. What is the condition to be met for pulse synchronization?3. What is relaxation oscillator? Name some negative resistance devices used as relaxation

oscillators and give its applications.4. Explain the terms phase delay and phase jitter.5. Explain how the symmetrical signals are used to synchronize a sweep circuit.6. With the help of a circuit diagram and waveforms, explain frequency division of an astable

multivibrator with pulse signals.7. Describe frequency division employing a transistor monostable multivibrator.8. Compare sinewave synchronization with pulse synchronization.9. Explain the method of synchronization of a sinusoidal oscillator with pulses.10. Describe the sinewave frequency division with a sweep circuit.

Unit – 7

1. Why sampling gates are called linear gates?2. What are the other names of a gate signal?3. With the help of a neat diagram, explain the working of tow-diodes sampling gate.4. Derive expressions for gain and minimum control voltages of a bidirectional two-diode sampling


PDC Course File

gate.5. Explain the method of obtaining balanced condition in a bidirectional diode gate.6. Compare the unidirectional and bidirectional sampling gates.7. Explain clearly the disadvantages of two diode bidirectional sampling gate compared to four

diode gates.8. Draw the circuit diagram of the unidirectional diode gate with more than two inputs and explain

its operation.9. How do you overcome the loading effect of signal sources on control voltage?10. Draw the circuit diagram of a sampling gate with more than one control voltage and explain its

working.11. What is pedestal? How it effect the output of a sampling gate?12. What are the applications of sampling gates?

Unit –8

1. Give some applications of logic gates.2. Draw a pulse train representing a 11010111 in a synchronous positive logic digital system.3. Why totem pole is used in DTL? Draw the circuit diagram and explain a DTL gate with this.4. Define positive and negative pulse logic systems.5. Draw and explain the circuit diagram of a diode OR gate for positive logic.6. What are the basic logic gates which perform all the operations in digital systems?7. Compare different logic families


PDC Course File

Tutorial

Unit – 1

Comparison of High and Low pass RC networksProblem solvingClass test

Unit – 2

Concept of clipping, clamping, comparatorsProblem solvingClass test

Unit – 3


PDC Course File

Diode and transistor switching timesProblem solvingClass test

Unit – 4

Applications of Bistable, Astable, Monostable multivibrators, Schmitt trigger Problem solvingClass test

Unit – 5

Comparison of Miller and Bootstrap time base generatorsProblem solvingClass test

Unit –6

Comparison of sampling and logic gatesProblem solvingClass test

Unit – 7

Synchronization of relaxation circuitsProblem solving

Unit – 8

Comparison of different logic gates


PDC Course File

Comparison of different logic familiesClass test


PDC Course File

Unit Wise Frequently Asked Questions:

Unit-01

1. Explain the response of a high-pass circuit to an exponential input is applied.OR

Explain the operation of RC high-pass circuit when exponential input is applied.2. Derive the expression for percentage tilt (P) of a square wave output of RC high-pass circuit.3. Verify V2 = (V/2) ( e2x -1)/(e2x+1) = (V/2) tanhx for a symmetrical square wave applied to a low-pass RC circuit.4. What is the ratio of the rise time of the three sections in cascade to the rise time of single section of low-pass RC circuit?5. An Ideal 1 m sec pulse is fed to a low-pass circuit. Calculate and plot the output waveform under the following condition. The upper 3-db frequency is,

(iv) 10 MHz(v) 1 MHz(vi) 0.1 MHz

6. Prove that an RC circuit behaves as reasonably good integrator if RC > 15T, where T is the period of an input ‘Em sinwt’7. Explain RC double differentiator circuit.8. Explain about RLC ringing circuit.

.

Unit-02

1. Classify different types of clipper circuits. Give their circuits and explain their operation with the aid of transfer characteristics.

2. Give the circuits of different types of shunt clippers and explain their operation with the help of their transfer characteristics.

3. Draw the circuit diagram of emitter coupled clipper. Draw its transfer characteristics indicating all intercepts, slopes and voltage levels derive the necessary equations.

4. Draw the basic circuit diagram of positive peak clamper circuit and explain its operation.5. Explain synchronized clamping circuit.

ORWhat is synchronized clamping? Explain.


PDC Course File

6. Design a clipping circuit with ideal components, which can give the waveform shown in figure for a sinusoidal input.

7. Explain the operation of two level slicer.

ORDraw the circuit diagram of slicer circuit using zener diodes and explain its operation with the help of its transfer characteristics.

8. For the circuit shown in figure, Vi is sinusoidal voltage of peak 100 volts. Assume ideal diodes.Sketch one cycle of output voltage. Determine the maximum diode current.

9. Explain positive peak clipping with reference voltage.10. Draw the diode comparator circuit and explain the operation of it when ramp input

signal is applied.OR

What is meant by comparator and explain diode differentiator comparator operation with the help of ramp input signal applied?

11. State and prove clamping circuit theorem.12. Draw the basic circuit diagram of negative peak clamper circuit and explain its

operation.

.

Unit-03

1. What are catching diodes?2. Give a brief note on piece-wise linear diode characteristics.3. Write short notes on.

(a). Diode switching times(b). Switching characteristics of transistors(c). FET as a switch.

4. Sketch neatly the waveform s of current and voltage for a transistor switch with capacitive loading circuit.

5. Explain how a transistor can be used as a switch.OR

Explain the behavior of BJT as a switch, Give applications.6. Explain the phenomenon of ‘latching’ in a transistor switch.

OR

Explain phenomenon of latching in a transistor.


PDC Course File

7. Describe the switching times of BJT by considering the charge distribution across the base region.

8. Give the expressions for rise time and fall time in terms of transistor parameters and operating currents.

OR

Define rise time and fall time of transistors switch. Derive expressions for these in terms of the transistors parameters and operating currents.

Unit-04

1. Discuss the different methods of triggering a flip-flop. Explain the role of communicating capacitors in a binary circuit.

OR

Discuss the various methods of triggering a multivibrator.2. Draw the circuit diagram of self-bias with symmetrical triggering using diodes. Explain

the working of the same.3. Explain the reason for the occurrence of overshoot at the base of normally ON transistor

of one shot. Derive an expression for overshoot.4. Show that the Astable multivibrator works as voltage controlled oscillator.5. Explain about the response of Schmitt binary to an arbitrary input signal with

appropriate diagram.OR

Draw the circuit diagram of a Schmitt trigger circuit and explain its operation. Derive the expressions for its UTP and LTP.

6. What do you understand by hysteresis? What is hysteresis voltage? Explain how hysteresis can be eliminated in a Schmitt trigger.

7. Write short notes on a stable multivibrator as a voltage to frequency converter with circuit and waveform.

OR

Explain the operation of astable multivibrator with a circuit diagram with relevant waveforms


PDC Course File

Unit-05

1. Draw and explain the typical waveform of a time base voltage.OR

Draw and clearly indicate the restoration time and fly back time on the typical waveform of a time base voltage.

2. Explain the principle of working of exponential sweep circuit with neat circuit diagram and also derive the equations for slope, transmission and displacement error.

3. Derive the relation between the slope, transmission and displacement errors.4. Explain how UJT is used for sweep circuit.5. What is a linear time base generator? Give its applications.6. Why the time base generators are called sweep circuits?7. How are linearly varying current waveforms generated?8. Bring out the necessity and importance of current sweep circuits. List out its

applications.OR

Bring out the necessity and importance of time base circuit.9. What type of voltage input is required to obtain a linear current sweep?

OR

What are the techniques used to improve the linearity of current sweeps? Illustrate with examples.

10. Write the differences between the voltage and current time base generators.

Unit-06

1. What do you mean by synchronization?2. What is the condition to be met for pulse synchronization?3. What is relaxation oscillator? Name some negative resistance devices used as relaxation

oscillators and give its applications.4. Explain the terms phase delay and phase jitter.5. Explain how the symmetrical signals are used to synchronize a sweep circuit.


PDC Course File

6. With the help of a circuit diagram and waveforms, explain frequency division of an astable multivibrator with pulse signals.

7. Describe frequency division employing a transistor monostable multivibrator.8. Compare sinewave synchronization with pulse synchronization.9. Explain the method of synchronization of a sinusoidal oscillator with pulses.10. Describe the sinewave frequency division with a sweep circuit.

Unit-07

1. Why sampling gates are called linear gates?2. What are the other names of a gate signal?3. With the help of a neat diagram, explain the working of tow-diodes sampling gate.4. Derive expressions for gain and minimum control voltages of a bidirectional two-diode

sampling gate.5. Explain the method of obtaining balanced condition in a bidirectional diode gate.6. Compare the unidirectional and bidirectional sampling gates.7. Explain clearly the disadvantages of two diode bidirectional sampling gate compared to

four diode gates.8. Draw the circuit diagram of the unidirectional diode gate with more than two inputs and

explain its operation.9. How do you overcome the loading effect of signal sources on control voltage?10. Draw the circuit diagram of a sampling gate with more than one control voltage and

explain its working.11. What is pedestal? How it effect the output of a sampling gate?12. What are the applications of sampling gates?

Unit-08

1. Give some applications of logic gates.2. Draw a pulse train representing 11010111 in a synchronous positive logic digital system.3. Why totem pole is used in DTL? Draw circuit diagram and explain a DTL gate with this.4. Define positive and negative pulse logic systems.5. Draw and explain the circuit diagram of a diode OR gate for positive logic.6. What are the basic logic gates which perform all the operations in digital systems?7. Compare different logic families


PDC Course File

University question papers:

1. (a) Prove that for any periodic input wave form the average levle of the steadystate output signal forms Rc high pass circuit is always zero(b) Explain how a low pass RC circuit act as an integrator. [8+8]2. (a) Design a clipping circuit with ideal components, which can give the waveformshown in figure 2a for a sinusoidal input.

Figure 2a(b) State and prove clamping circuit theorem. [8+8]3. (a) Explain how a transistor can be used as a switch.(b) Explain the phenomenon of ’Latching” in a transistor switch [8+8]4. Explain the method of unsymmetrical triggering of the binary with relevant circuitdiagram. [16]5. (a) If the amplifier gain is different from unity in a bootstrap circuit, what is theeffect on the sweep voltage? What is the effect of amplifier bandwidth on thesweep output?


PDC Course File

(b) In UJT sweep circuit VBB = 20 V, VY Y = 50V, R = 5k , RB1 = RB2 = 0and C= 0.01 μF. the UJT fires when Vc = 10.6V and goes to OFF state whenVc = 2.8V. Find thei. the amplitude of sweep signalii. the slope and displacement erroriii. the duration of the sweep, andiv. the recovery time. [16]6. (a) Explain the method of synchronization of a sinusoidal oscillator with pulses.(b) Describe frequency division employing a transistor monostbale multivibrator.[8+8]7. (a) Draw the circuit diagram of the unidirectional diode gate with more than twoinputs and explain its operation.(b) How do you overcome the loading effect of signal sources on control voltage?(c) Draw the circuit diagram of a sampling gate with more than one control voltageand explain its working. [16]8. (a) Define positive and negative logic system(b) Define fan-In, fan-out(c) Draw and explain the circuit diagram of a diode OR gate for positive logic.[4+4+8]

⋆ ⋆ ⋆ ⋆ ⋆


PDC Course File

1. (a) Write a short notes on RC low pass circuit(b) Draw the output response of RC low pass circuit for a step input signal andexplain in detailed. [8+8]2. (a) Draw the diode comparator circuit and explain the operation of it when rampinput signal is applied.(b) Explain the operation of two level slicer. [10+6]3. (a) Explain how a BJT can be used as a switch. Compare it performance as aswitch with BBJT(b) Describe the switching times of BJT by considering the charge distributionacross the base region. Explain this for cut-off, active and saturation region.[8+8]4. Draw and explain about the response of Schmitt circuit for the following.(a) for loop gain _1(b) loop gain >1. [16]5. (a) What is a linear time base generator?(b) Write the applications of time base generators.(c) Define the sweep speed error, displacement error and transmission error ofvoltage time base waveform. [16]6. (a) Explain the method of synchronization of a sinusoidal oscillator with pulses.(b) Describe frequency division employing a transistor monostbale multivibrator.[8+8]7. (a) Draw the circuit diagram of the unidirectional diode gate with more than twoinputs and explain its operation.(b) How do you overcome the loading effect of signal sources on control voltage?(c) Draw the circuit diagram of a sampling gate with more than one control voltageand explain its working. [16]8. (a) What are the basic logic gates which perform all the operations in digitalsystems.(b) Give some applications of logic gates.(c) Define a positive and negative pulse logic systems.(d) Draw a pulse train representing 1101011001. [16]⋆ ⋆ ⋆ ⋆ ⋆JBREC 29 DEPARTMENT OF ECE

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1. (a) Explain about RLC Ringing Circuit(b) Explain RC double differentiator circuit. [8+8]2. (a) For the circuit shown in figure 2a , Vi is a sinusoidal voltage of peak 100volts. Assume ideal diodes. Sketch one cycle of output voltage. Determinethe maximum diode Current.

(b) Explain positive peak clipping with reference voltage. [12+4]3. (a) Describe the switching times of BJT by considoring charge distribution acrossthe base region. Explain this far cut-off, active and saturation region.(b) Give the expressions for rise time & fall time in terms of trunsistor parametersand operating corrents. [8+8]4. Consider the Schmitt trigger of the following figure 4 with germanium transis-tors having hFE=40. The circuit parameters are VCC=55V, Rs=3.9K, Rc1=12K,Rc2=2K, R1=39K, R2=180K and Re=39K. Calculate [16](a) V1(b) V2.


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5. (a) Draw the circuit diagram of fixed amplitude sweep circuit and explain itsoperation.(b) Draw the circuit diagram of transistor Miller time base generator and explainits working. [16]6. (a) With the help of a circuit diagram and waveforms, explain frequency divisionof an astable multivibrator with pulse signals.(b) The relaxation oscillator, when running freely, generates an output signal ofpeak - to - peak amplitude 100V and frequency 1 kHz. Synchronizing pulsesare applied of such amplitude that at each pulse the breakdown voltage islowered by 20V. Over what frequency range may the sync pulse frequency bevaried if 1 : 1 synchronization is to result? If 5 : 1 synchronization is to beobtained (fP /fS = 5), over what range of frequency may the pulse source bevaried? [16]7. (a) What is pedestal? How it effects the output of a sampling gate?(b) What are the applications of sampling gates?(c) Explain clearly the disadvantages of two diode bidirectional sampling gatecompared to four divide gate. [6+4+6]8. (a) Draw the circuit diagram of diode - resistor logic OR gate and explain itsoperation.(b) The transistor inverter (NOT gate) circuit has a minimum value hfe = 30,VCC = 12V, RC = 2.2k, R1 = 15k and R2 =100k, VBB = 12V. Provethat circuit works as NOT gate. Assume typical junction voltages. The inputis varying between 0 and 12V. [16] ⋆ ⋆ ⋆ ⋆ ⋆JBREC 31 DEPARTMENT OF ECE

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1. (a) A symmetrical square wave whose peak-to-peak amptitude id 2V and whoseaverage value is zero as applied to on Rc integrating circuit. The time constantis equals to half -period of th esquare wave find the peak to peak value of theoutput amplitude(b) Describe the relationship between rise time and RCtime constant of a low passRC circuit. [8+8]2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explainits operation.(b) What is meant by comparator and explain diode differentiator comparatoroperation with the help of ramp input signal is applied. [6+10]3. (a) Define the following:i. Storage timeii. Delay timeiii. Rise timeiv. Fall time(b) Explain how a BJT can be used as a switch. Compare its perfoemance as aswitch with JFET. [8+8]4. Write short notes on:(a) Gate width of mono-stable multivibrator.(b) Astable multivibrator as a voltage to frequency converter with circuit andwaveform. [8+8]5. (a) With the help of neat diagram explain the working of transistor Bootstraptime base generator.(b) Draw a simple current sweep circuit and explain its working with the help ofdiagrams. [16]6. (a) Describe the sine wave frequency division with a sweep circuit.(b) Compare sine wave synchronzation with pulse synchronization.(c) What is Synchronization on one-to-one basis? [8+4+4]7. (a) What is a sampling gate.(b) Illustrate the principle of sampling gates with series and parallel switches andcompare them.(c) Draw the circuit diagram of unidirectional diode gate and explain its operation.[16]


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8. (a) Draw the circuit diagram of diode - resistor logic OR gate and explain itsoperation.(b) The transistor inverter (NOT gate) circuit has a minimum value hfe = 30,VCC = 12V, RC = 2.2k, R1 = 15k and R2 =100k, VBB = 12V. Provethat circuit works as NOT gate. Assume typical junction voltages. The inputis varying between 0 and 12V. [16] ⋆ ⋆ ⋆ ⋆ ⋆


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Lecture Notes (per unit not more than 5 pages)

UNIT-1

The time constant of an RC circuit is the product of its resistance and capacitance. For R in ohms and C in farads, the time constant t is in seconds.

t = RC

5RC Rule of Thumb: A capacitor charges or decays to within 1% of its final value in 5 time constants.

Low Pass Filter / Integrator


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High Pass Filter / Differentiator


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Notes:


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Rise Time: Time required to go from 10% to 90% of Vout.


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UNIT-2

CLIPPERS There are a variety of diode networks called clippers that have the ability to “clip” off a portion of the input signal without distorting the remaining part of the alternating waveform. The half-wave rectifier is an example of the simplest form of diode clipper—one resistor and diode. Depending on the orientation of the diode, the positive or negative region of the input signal is “clipped” off.There are two general categories of clippers: series and parallel. The series configuration is defined as one where the diode is in series with the load, while the parallel variety has the diode in a branch parallel to the load.


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CLAMPERS

Clamper is a circuit that "clamps" a signal to a different dc level. The different types of clampers are positive negative and biased clampers.

A clamping network must have a capacitor, a diode and a resistive element. The magnitude R and C must be chosen such that the time constant RC is large enough to ensure that the voltage across the capacitor does not discharge significantly during the interval the diode is non- conducting.

Positive Clamper

The circuit for a positive clamper is shown in the figure. During the negative half cycle of the

input signal, the diode conducts and acts like a short circuit. The output voltage . The capacitor is charged to the peak value of input voltage Vm. and it behaves like a battery. During the positive half of the input signal, the diode does not conduct and

acts as an open circuit. Hence the output voltage . This gives a positively clamped voltage.

Negative Clamper


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During the positive half cycle the diode conducts and acts like a short circuit. The capacitor charges to peak value of input voltage Vm. During this interval the output Vo which is taken across the short circuit will be zero.

During the negative half cycle, the diode is open. The output voltage can be found by applying KVL.

Biased Clamper

The circuit of a positively biased clamper is shown in the figure. During the negative half cycle of the input signal the diode is forward biased and acts like a short circuit. The capacitor charges to

. Applying the KVL to the input side


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The voltage across the resistor will be equal to the source voltage Vs.

During the positive half cycle of the input signal, the diode is reverse biased and it acts as an open circuit. Hence Vs has no effect on Vo. Applying KVL around the outside loop.

.

.


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UNIT-3

DIODE AS A SWITCH REVERSE RECOVERY TIME

There are certain pieces of data that are normally provided on diode specification sheets provided by manufacturers. One such quantity that has not been considered yet is the reverse recovery time, denoted by trr . In the forward-bias state it was shown earlier that there are a large number of electrons from the n-type material progressing through the p-type material and a large number of holes in the n-type—a requirement for conduction. The electrons in the p-type and holes progressing through the n-type material establish a large number of minority carriers in each material. If the applied voltage should be reversed to establish a reverse-bias situation, we would ideally like to see the diode change instantaneously from the conduction state to the nonconduction state. However, because of the large number of minority carriers in each material, the diode current will simply reverse as shown in Fig. and stay at this measurable level for the period of time ts (storage time) required for the minority carriers to return to their majority-carrier state in the opposite material. In essence, T he diode will remain in the short-circuit state with a current Ireverse determined by the network parameters. Eventually, when this storage phase has passed, the current will reduce in level to that associated with the nonconduction state. This second period of time is denoted by tt (transition interval). The reverse recovery time is the sum of these two intervals: trr _ ts _ tt. Naturally, it is an important consideration in highspeed switching applications. Most commercially available switching diodes have atrr in the rang of a few nanoseconds to 1 s. Units are available, however, with a trr of only a few hundred picoseconds (10_12).

Defining the reverse recovery time

TRANSISTOR AS A SWITCH

There are transistors that are referred to as switching transistors due to the speed with which they can switch from one voltage level to the other. In Fig the periods of time defined as ts, td, tr, and tf are provided versus collector current. Their impact on the speed of response of the collector output is defined by the collector current response The total time required for the transistor to switch fromthe “off” to the “on” state is designated as ton and defined by


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with td the delay time between the changing state of the input and the beginning of a response at the output. The time element tr is the rise time from 10% to 90% of the final value.

The total time required for a transistor to switch from the “on” to the “off” state is referred to as toff

and is defined by

where ts is the storage time and tf the fall time from 90% to 10% of the initial value.


PDC Course File

UNIT-4

A multivibrator is an electronic circuit used to implement a variety of simple two-state systems such as oscillators, timers and flip-flops. It is characterized by two amplifying devices (transistors, electron tubes or other devices) cross-coupled by resistors and capacitors.

There are three types of multivibrator circuit:

astable, in which the circuit is not stable in either state—it continuously oscillates from one state to the other. Due to this, it does not require an input (Clock pulse or other).

monostable, in which one of the states is stable, but the other is not—the circuit will flip into the unstable state for a determined period, but will eventually return to the stable state. Such a circuit is useful for creating a timing period of fixed duration in response to some external event. This circuit is also known as a one shot. A common application is in eliminating switch bounce.

bistable, in which the circuit will remain in either state indefinitely. The circuit can be flipped from one state to the other by an external event or trigger. Such a circuit is important as the fundamental building block of a register or memory device. This circuit is also known as a latch or a flip-flop.

In its simplest form the multivibrator circuit consists of two cross-coupled transistors. Using resistor-capacitor networks within the circuit to define the time periods of the unstable states, the various types may be implemented. Multivibrators find applications in a variety of systems where square waves or timed intervals are required. Simple circuits tend to be inaccurate since many factors affect their timing, so they are rarely used where very high precision is required. The 555 timer is a popular IC chip which can be used to implement all three multivibrator modes.


http://en.wikipedia.org/wiki/Electronic_circuit

http://en.wikipedia.org/wiki/Integrated_circuit

http://en.wikipedia.org/wiki/555_timer_IC

http://en.wikipedia.org/wiki/555_timer_IC

http://en.wikipedia.org/wiki/Capacitor

http://en.wikipedia.org/wiki/Resistor

http://en.wikipedia.org/wiki/Transistor

http://en.wikipedia.org/wiki/Flip-flop_(electronics)

http://en.wikipedia.org/wiki/Latch_(electronics)

http://en.wikipedia.org/wiki/Computer_storage

http://en.wikipedia.org/wiki/Processor_register

http://en.wikipedia.org/wiki/Switch#Contact_bounce

http://en.wikipedia.org/wiki/Flip-flop_(electronics)

http://en.wikipedia.org/wiki/Timer

http://en.wikipedia.org/wiki/Oscillators

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Theory:-

Schmitt Trigger is an emitter coupled binary trigger circuit. It is termed a binary trigger circuit since two stable states occur- the transistor Q1 may be ON and Q2 OFF or vice versa. In the absence of an input to transistor Q1 the voltage divider network Rb2 and R1 along with Rc1 maintains the base of Q2 at a slightly positive potential relative to the emitter and thereby Q2 operates in the saturation region. Owing to the current flow in Q2, the voltage developed across the common emitter resistor, Re maintains Q1 at cut-off. Since the base of Q1 is at ground potential, it is negative relative to the emitter. Thus the stable state in the absence of a signal is Q2 ON and Q1 OFF and the output voltage is in the low state. The switching action may be started by raising or lowering the bias on Q1.

When an input sine wave is applied, as soon as the input voltage attains a value equal to the sum of the voltages across Rb1 and Re, Q1 turns ON since its base becomes more positive relative to the emitter. Q1 is driven to conduction in the saturation region. The collector voltage of Q1 drops, which inturn is coupled by the network Rb2-R1 to the base of Q2. This eliminates the forward bias on Q2 and hence it is driven to cut-off. This state persists as long as the input voltage is greater than the sum of the voltages across Rb1 and Re. When Q2 is driven to cut-off, output voltage switches to the difference between Vcc and the voltage across Rc2.


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When the input voltage drops below the sum of the voltages across Rb1 and Re Q1 turns OFF and by regenerative action Q2 again turns ON. The output voltage falls back to the sum of the voltages across Re and the saturation voltage of Q2. Thus a square wave is produced.

The turn ON voltage is usually called the upper trigger point or UTP and the tun OFF voltage is called lower trigger point or LTP. UTP is always greater than LTP since the voltage required to turn ON a device is more than that required to turn it OFF.

The output waveform may be observed in the waveform viewer.

A multivibrator in which one transistor is always conducting (i.e. in the ON state) and the other is non-conducting (i.e. in the OFF state) is called a monostable multivibrator. Monostable Multivibrator or one-shot multivibrator has one stable state and one quasi-stable state. i.e. When one transistor is conducting and the other is non-conducting, the circuit will remain in this stable state until the application of external trigger pulse. After a certain time the circuit will automatically switch back to the original stable state and remains there until another pulse is applied.

The circuit of a transistor monostable multivibrator is shown in the figure. With the above circuit arrangement Q1 is at cut-off and Q2 is at saturation. This represents the stable state. The base of Q1 is kept at a negative potential to ensure that it is always OFF unless when trigger is applied.

The triggering network consists of the voltage source, the input capacitor, R4, R5 and D1.


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When a trigger pulse is applied, Q1 turns ON and the collector voltage of Q1 drops from VCC to the saturation voltage of 0.2V. This negative change is coupled to the base of Q2 by the capacitor which inturn causes Q2 to turn OFF. This represents the quasi-stable state. Now the capacitor starts charging towards VCC. When the capacitor voltage reaches 0.7V, transistor Q2 turns ON and Q1 switches back to the OFF state.



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Astable Multivibrator is a two stage switching circuit in which the output of the first stage is fed to the input of the second stage and vice versa. The outputs of both the stages are complementary. This free running multivibrator generates square wave without any external triggering pulse. The circuit has two stable states and switches back and forth from one state to another, remaining in each state for a time depending upon the discharging of the capacitive circuit.

The multivibrator is one form of relaxation oscillator, the frequency of which may be controlled by external synchronizing pulses.

In our experiment we are using transistor, as the amplifying device and also it is a collector coupled multivibrator.

Figure shows the basic symmetrical astable multivibrator in which components in one half of a cycle of the circuit are identical to their counterpart in the other half. Square wave output can be obtained from the collector point of Q1 or Q2.

Operation

When supply voltage, VCC is applied, one transistor will conduct more than the other due to some circuit imbalance. Initially let us assume that Q1 is conducting and Q2 is cut-off. Then VC1, the output of Q1 is equal to VCESAT which is approximately zero and VC2 is equal to VCC. At this instant C1 charges exponentially with the time constant R1C1 towards the supply voltage through R1 and correspondingly VB2 also increases exponentially towards VCC. When VB2 crosses the coupling voltage Q2 starts conducting and VC2 falls to VCESAT. Also VB1 falls due to capacitive coupling


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between collector of Q2 and base of Q1, thereby driving Q1 into OFF state. The rise in voltage VC1 is coupled through C1 to the base of Q2 causing a small overshoot in voltage VB2. Thus Q1 is OFF and Q2 is ON. At this instant the voltage levels are:

VB1 is negative, VC1=VCC, VB2=VBESAT and VC2=VCESAT.

When Q1 is OFF and Q2 is ON the voltage VB1 increases exponentially with a time constant R2C2

towards VCC. Therefore Q1 is driven to saturation and Q2 to cut-off. Now the voltage levels are:

VB1=VBESAT, VC1=VCESAT, VB2 is negative and VC2=VCC.

From the above it is clear that when Q2 is ON the falling voltage VC2 permits the discharging of capacitor C2 which inturn drives Q1 into cut-off. The rising voltage of VC1 is fed back to the base of Q2 tending to turn it ON. This process is regenerative.



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UNIT-8

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