Electrical Power and Energy Systems 55 (2014) 449–459

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Electrical Power and Energy Systems

journal homepage: www.elsevier .com/locate / i jepes

Per-phase vector control strategy for a four-leg voltage source inverteroperating with highly unbalanced loads in stand-alone hybrid systems

0142-0615/$ - see front matter � 2013 Elsevier Ltd. All rights reserved.http://dx.doi.org/10.1016/j.ijepes.2013.09.019

⇑ Corresponding author. Address: Power Electronics and Energy Research (PEER)Group, Department of Electrical & Computer Engineering, Concordia University,1515 Ste. Catherine West, EV 005-139, Montreal, Quebec H3G 2M1, Canada. Tel.: +1514 848 2424x3080; fax: +1 514 848 2802.

E-mail addresses: na_ahmed@encs.concordia.ca (N.A. Ninad), lalopes@encs.con-cordia.ca (L. Lopes).

Nayeem Ahmed Ninad ⇑, Luiz LopesPower Electronics and Energy Research (PEER) Group, Department of Electrical & Computer Engineering, Concordia University, Montreal, Quebec, Canada

a r t i c l e i n f o

Article history:Received 21 September 2012Received in revised form 15 August 2013Accepted 25 September 2013

Keywords:BatteryDistributed power generationInverterMini-gridRenewable energyStand-alone hybrid system

a b s t r a c t

This paper proposes a new per-phase vector (dq) control scheme for a four-leg grid-forming inverteroperating in a three-phase four-wire hybrid stand-alone power system (mini-grid). The challenge is toprovide balanced output voltages to highly unbalanced loads, very common in such systems, with a fastdynamic response. By using dq control in a per-phase basis one avoids the use of slow filter-based sym-metrical components calculators (SCCs) while achieving zero error, i.e. voltage balancing, in steady-state.Further improvement in the dynamic response is achieved by using fictive axis emulation for obtainingthe orthogonal current components required for the per-phase dq control. Simulation and experimentalresults are provided, to demonstrate the good performance of the system. It works very well, even whenthe grid-forming inverter supplies active power in two phases and absorbs in the other one, due to thepresence of a single-phase PV inverter in the hybrid mini-grid.

� 2013 Elsevier Ltd. All rights reserved.

1. Introduction

Hybrid stand-alone power systems (mini-grids) are usuallybased on diesel power plants. In such systems, the use of renew-able energy sources (RESs) and energy storage units can decreasethe cost and environmental impact of electricity production [1].The ideal case would be to run the mini-grid with all diesel gener-ators off, what would require a battery inverter to form the grid,balancing active and reactive power, and the RESs would operateat their maximum power point [2,3].

Generally, electrical distribution systems are of the three-phasefour-wire type, allowing loads and RESs to be connected either atline-to-line or line-to-neutral, depending on their number ofphases and power ratings. These loads/sources are usually ar-ranged in order to result in a balanced power distribution acrossthe three phases. However, in mini-grids with a relatively smallnumber of loads, it is more likely that ‘‘load unbalances’’ will occur,leading to unequal voltage drops in the low-pass filter of the grid-forming inverter and unbalanced output voltages. This can result inincreased losses and heating in rotating machines, saturation oftransformers as well as malfunction of protection devices [4,5].Therefore, it is important that the grid-forming inverter presents

a suitable control scheme to supply balanced voltages to an unbal-anced distribution grid. Besides, it should also present a fast tran-sient response to load variations.

There are a number of voltage source inverter (VSI) topologiessuitable for operation in three-phase four-wire systems. Thethree-leg inverter with a split dc link capacitor is the simplestbut capacitor voltage balancing can be an issue in the presenceof zero sequence current components [6,7]. Alternatively one canuse a three-leg inverter with a D-Y transformer [8–10]. The zerosequence current component would be trapped or ‘‘circulating inthe D winding’’ and the control circuit of the inverter would onlyhave to compensate for the voltage drops of the positive and neg-ative sequence currents on the output filter of the inverter, in theprimary of the transformer. However, the zero sequence currentswill produce voltage drops in the Y-side of the transformer whichthe three-leg inverter cannot compensate [9]. For such cases, afour-leg inverter like the one used in this paper would providethe required means for voltage balancing [11].

Various modulation techniques have been suggested for switch-ing the four-leg inverter [12–15]. The three-dimensional space vec-tor modulation (3-D SVM) technique was originally proposed in[12]. It employs a ab0 transformation and requires complex calcu-lations for the selection of the switching vectors. Carrier-basedpulse-width modulation (PWM) is another option [14,15]. It hasbeen shown to be equivalent to a 3-D SVM but with an easierimplementation. Because of that, it was chosen to be used in thiswork for converting the reference signals from the control loopsinto gating signals for the four-leg inverter.

R L

C

UnbalancedLoad & PVGeneration

ILa

ILb

ILc

In

Ioa

Iob

Ioc

Va

Vb

Vc

Vdc

a

b

c

f

n

Fig. 1. Schematic diagram of a grid-forming inverter with unbalanced loads and source(s).

oI

R L

+

-inv CE

+

-cV

LI

Fig. 2. Basic single/per-phase representation of an inverter system.

450 N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459

Regarding the control scheme for balancing the output voltagesof the four-leg inverter operating with unbalanced loads, there arealso many choices [16–22]. Some are based on vector (dq) control,which is an elegant technique frequently employed in high-perfor-mance three-phase inverters. By converting ac into dc quantities,simple PI-type controllers can be employed to obtain zero errorin steady-state and fast transient responses [23]. However, in thepresence of unbalances, the quantities in the rotating (dq) frameare not pure dc anymore, containing a double line frequency com-ponent due to the negative sequence components and a line fre-quency component due to the zero sequence components. Thesecomponents, when present at the output of the PI controllers, willinteract with the rotating frame yielding non-zero steady-state er-rors [24]. This problem can be mitigated by employing low-pass fil-ters (LPF) as shown in [25,26], but this introduces delays and slows

Fig. 3. Schematic diagram of the pe

down the dynamic response of the system. Another approach is tofirst obtain the symmetrical components of the unbalanced signalsand then apply the abc-dq transformation choices [16–18,21,22] soas to obtain dq components that are pure dc. However, since thesymmetrical components calculators (SCCs) are usually based onall-pass filters that introduce delays which are difficult to includein a linearized model of the SCCs. Thus, in practice, the controlloops of the systems described above are designed with relativelylow cross-over frequency which in turn results in slow dynamicresponse.

A technique that does away with the use of LPF and SCC hasbeen proposed in [19]. It employs rotating frame controllers toeliminate positive and negative sequence distortions, and station-ary frame controllers to attenuate the zero sequence distortion dueto the neutral current. However, it only presented simulation re-sults under steady-state conditions and zero steady-state errorwas not truly achieved for the zero sequence component. A sta-tionary frame per-phase voltage loop only control approach for agrid-forming inverter with unbalanced loads was proposed in[20], but its performance for highly unbalanced (single-phase)loads was not discussed.

The control approach proposed in this paper for a three-phasefour-leg inverter capable of supplying highly unbalanced loadswith balanced voltages is based on the use of per-phase dq controlwith fictive axis emulation in the inner current loop [27–29]. Inthis way, one can avoid the use of the SCC block which introduces

r-phase cascaded control block.

Fig. 4. Emulation of the fictive circuit with neutral impedance.

Offset Voltage

Calculation

eaf

ebf

ecf

++

++

++

Fig. 5. Carrier-based PWM metho

R L

C

ILaILbILc

In

VbVc

Vdc

ab

cf

Grid-forming 4-Leg Inverter

aV

n

Fig. 6. Schematic diagram of the PV-hybrid

N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459 451

difficult to model delays in the feedback signals and require the useof PI-type controllers with conservative (low) bandwidths. Besides,since second order generalized integrators (SOGIs) are only used inthe outer voltage loop, the system response to load variations isvery fast. The superior performance of the proposed technique isdemonstrated by means of simulations and experimental results.

2. Per-phase DQ control of a four-leg VSI

A four-leg grid-forming inverter connected to a generic imped-ance block, which can include single-phase and three-phase loadsand sources, in a hybrid stand-alone system is shown in Fig. 1. Theinverter presents an LC output filter, with the resistance of theinductor modeled and that of the capacitor neglected. The neutralpoint of the distribution system is connected to the 4th leg (node f)of the battery inverter through a fourth inductor, identical to theother ones. It will help further reduce the switching harmonics[12] but will produce a voltage drop in the case of non-zero neutralcurrents to node f, making the potential at the neutral node (n)shift from zero potential. The proposed control scheme aims at pre-venting this problem with fast dynamic response.

It was shown in [29] that per-phase dq control using fictive axisemulation, can provide balanced voltages with faster dynamic re-sponse than the conventional three-phase dq control with sym-metrical components calculator in three-phase three-wiresystems. In order to apply this technique in a four-leg inverter,one needs to include the impedance of the neutral conductor in

+_

ebo

eao

eco

efo

+_

+_

+_

Carrier

Vdc__2

Vdc__2

_

a+

b+

c+

f+

d for four-leg inverter. [14].

Unbalanced Load

IobIoc

PV Inverter

Ioa

system used in the simulation studies.

452 N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459

the fictive axis emulation and generate the gating signals for thefourth leg so as to compensate for the voltage drop across the filterinductor of that leg. This, as well as the basic principles of per-phase dq control, will be discussed in the following sections.

-400

-200

0

200

400

Load

Vol

tage

[V]

0.2 0.3 0.4 0.5-40

-20

0

20

40

Ti

Load

Cur

rent

[A]

0.3 0.32 0.34 0.36-200

0

200

0.5 0.52 0.-200

0

200

-400

-200

0

200

400

Load

Vol

tage

[V]

0.2 0.3 0.4 0.5-40

-20

0

20

40

Tim

Load

Cur

rent

[A]

0.3 0.32 0.34 0.36-200

0

200

0.5 0.52 0.-200

0

200

(Fig. 7. Waveforms of the output voltages and currents of the grid-forming inverter for vaphase control scheme.

2.1. The single/per-phase cascaded dq control block

On a per-phase basis, the fundamental component of theswitched voltage of one phase of the inverter can be modeled as

Va

Vb

Vc

0.6 0.7 0.8 0.9 1me [s]

Ioa

Iob

Ioc

If n

54 0.56 0.7 0.72 0.74 0.76-400

-200

0

200

400

(a)

Va

Vb

Vc

0.6 0.7 0.8 0.9 1e [s]

Ioa

Iob

Ioc

If n

54 0.56 0.7 0.72 0.74 0.76-200

0

200

b)rying load conditions. (a) Conventional SCC-based control scheme; (b) Proposed per-

N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459 453

an ideal controlled voltage source (einv). The inverter inductor cur-rent and capacitor voltages are iL and vC respectively. The load con-nected to that phase of the grid-forming inverter can berepresented by a current source (io) as shown in Fig. 2.

For representing voltages and currents of a single-phase systemin dq frame, one needs first to create a two-phase system withorthogonal components. The a components are obtained and mea-sured from the real single-phase circuit. The b components are ob-tained from a fictive circuit where all voltages and currents arephase-shifted by 90�, in steady-state, with respect to the real volt-ages and currents.

Eqs. (1) and (2) represent the system model of Fig. 2 in abframe. By applying Park transformation in (1) and (2) one getsthe well-known model of the system in dq frame, given by (3)and (4).

LdiLab

dt¼ einvab � iLabR� mCab ð1Þ

CdmCab

dt¼ iLab � ioab ð2Þ

diddtdiqdt

" #¼ �R

Lid

iq

� �þ 1

Led

eq

� �� 1

Lmd

mq

� �þx

iq

�id

� �ð3Þ

dmddt

dmq

dt

" #¼ 1

Cid

iq

� �� 1

Ciod

ioq

� �þx

mq

�md

� �ð4Þ

The use of dq control in single-phase inverters with regulatedoutput voltage has been addressed by several literatures [30–32].A common approach is to use cascaded inner current and outervoltage loops. This is also used in this paper as shown in Fig. 3.In the inner current loop, VCa and ILa represent ‘‘a’’ phase voltageat the output filter capacitor and the current in the output filterinductor, respectively. Vb, the orthogonal component to VCa (Va),required for computing the dq components of the single-phase

0.28 0.285 0.29 0.295 0.3-40

-20

0

20

40

Time [s]

Load

Cur

rent

[A]

Ioa

Iob

0.68 0.685 0.69 0.695 0.7-40

-20

0

20

40

Time [s]

Load

Cur

rent

[A]

(a)

(c)Fig. 8. Steady-state waveforms of the three-phase load currents (with neutral wire). (a) Bline to neutral), and (d) unbalanced load-3 (with PV power injection).

system is obtained with a second order generalized integrator(SOGI) [33], which is implemented in the ‘a to ab’ transformationblock as shown in Fig. 3. It should be noted that due to the rela-tively slow response of the SOGI, it is not the best choice to com-pute the b component of the output filter inductor current,which should be varied very fast in order to respond to load cur-rent variations and keep the capacitor voltage regulated. Instead,the orthogonal current component (Ib) can be obtained by emulat-ing a fictive circuit as shown in Fig. 3, in bold lines. More details onthis technique are presented in [27,28]. In addition, feed-forward(FF) loops are also used to compensate for the coupling betweenthe dq equivalent circuits created by the output filter inductor inthe actual ac circuit. The sinh and cosh terms required for the Parkand inverse Park transformations are obtained from the output ref-erence voltage with a simple PLL.

Regarding the outer voltage loop, the orthogonal components ofthe actual output phase voltages (VCa) and inverter output current(Ioa) are obtained using SOGIs. Feed-forward loops are also used tocompensate for the coupling between the dq equivalent circuitscreated by the output filter capacitor in the actual ac circuit. ThePI-type controllers for the current and voltage loops are designedin the conventional way, for regulating dc signals, with the outervoltage loop 10 times slower than the inner current loop. Vq

⁄ isset at the peak value of the reference phase voltage while Vd

⁄ isset at 0 V.

2.2. Emulation of the fictive circuit in the current loop of a four-leginverter with neutral impedance

It has been shown in [27,28] that the key aspect for the imple-mentation of single-phase dq current control with fast dynamic re-sponse is the fictive axis emulation. However, when this techniqueis considered for a four-leg inverter with a neutral wire impedance,the latter has to be included in the fictive axis circuit. For line-to-neutral load connection there exists a neutral current. Howeverthe magnitude of the neutral current is not necessarily the same

Ioc

Ifn

0.48 0.485 0.49 0.495 0.5-40

-20

0

20

40

Time [s]

Load

Cur

rent

[A]

0.88 0.885 0.89 0.895 0.9-40

-20

0

20

40

Time [s]

Load

Cur

rent

[A]

(b)

(d)alanced load, (b) unbalanced load-1 (with line to line), (c) unbalanced load-2 (with

454 N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459

as the phase current(s). Therefore, if one wishes to include the neu-tral impedance for each of the FEA circuits, then it will not be a cor-rect representation. In practice the neutral current is thesummation of the three phase currents. Therefore a new ‘‘coupled’’fictive axis emulation scheme for the four-leg grid forming inverteris proposed as shown in Fig. 4. There one sees the voltage sourcesthat represent the orthogonal components of the three phases ofthe (switched) inverter (Eafb, Ebfb and Ecfb) and capacitor (Vanb, Vbnb

and Vcnb) voltages. The former set comes from the output of the dqto ab blocks, while the latter are obtained from the actual circuitwith SOGIs, the a to ab transformation block, as shown in Fig. 3.The line currents obtained from Fig. 4 are used for calculatingthe dq components of the three per-phase current control loops,similar to what is shown in Fig. 3.

Fig. 9. Waveforms of the voltage and current loops of the grid-forming inverter in dq coocontrol scheme respectively; (c and d) reference and actual currents for the convention

2.3. Generation of the inverter output voltage

The carrier-based PWM technique discussed in [14] has beenused in this work due to its performance and ease of implementa-tion. Its block diagram is shown in Fig. 5. The inputs (eaf, ebf and ecf)are the a components of the three per-phase inverter voltages ob-tained from Fig. 3 and required for balancing the output voltages ofthe four-leg inverter. They can be represented as,

eao ¼ eaf þ efo

ebo ¼ ebf þ efo

eco ¼ ecf þ efo

9>=>; ð5Þ

with the following constraint,

rdinates. (a and b) Reference and actual voltages for the conventional and proposedal and proposed control scheme respectively.

Table 1System parameters for the experimental study.

DC bus voltage 250 VLoad voltage 105 V/phase (peak) at 60 HzFilter capacitor 10 lFFilter inductor 8 mHInternal resistance of filter inductor 1 OPI current controller parameters kp = 120 & ki = 316 � 103

PI voltage controller parameters kp = 5.33 � 10�3 & ki = 1.42Switching scheme SPWMSwitching frequency 6 kHzSampling frequency of DSP 40 kHzLoad Balanced Ra = Rb = Rc = 28.57 O

Unbalanced 1. Ra = 16.67 O & Rb = Rc = 28.57 O2. Rb =1 & Ra = Rc = 40 O3. Rb = Rc =1 & Ra = 40 O

N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459 455

�Vdc 6 eaf ; ebf ; ecf 6 Vdc ð6Þ

in (5), ‘o’ stands for the fictive mid-point of the dc link voltage andefo is known as the offset voltage and can be calculated as,

efo ¼ mid � emax

2; � emin

2; � emax þ emin

2

� �ð7Þ

where emax = max(eaf, ebf, ecf) and emin = min(eaf, ebf, ecf). emax corre-sponds to the maximum instantaneous value among eaf, ebf and ecf

while emin is the minimum value. Similarly, the function mid relatesto the medium or intermediate value of the selected variables. Thetriangular carrier presents a period equal to Ts. The values of theON-times of the upper switch of respective legs can be obtainedfrom the following equation.

Fig. 9 (continued)

Fig. 10. Steady state (abc) load voltages and currents for the grid-forming inverterfor different loads. (a) Balanced load (Ra = Rb = Rc = 28.57 O); (b) unbalanced load(Ra = 16.67 O and Rb = Rc = 28.57 O); (c) unbalanced load (Rb =1 and Ra = Rc = 40 O);(d) single-phase load at phase a (Ra = 40 O and Rb = Rc =1).

456 N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459

Ta ¼ Ts2 þ

eaoVdc

Ts

Tb ¼ Ts2 þ

eboVdc

Ts

Tc ¼ Ts2 þ

ecoVdc

Ts

Tf ¼ Ts2 þ

efo

VdcTs

9>>>>>=>>>>>;

ð8Þ

3. Performance verification

The performance of the proposed control scheme is verified bysimulation using an average model inverter, so that one can clearlysee the speed of response of the system without any switchingnoise, and experimentally with a laboratory prototype.

3.1. Simulation study

The simulation study was conducted using MATLAB/SIMULINKand the PV hybrid system shown in Fig. 6. The output voltages ofthe inverter are the a-components of the per-phase cascaded dqcontrol circuit shown in Fig. 3, one for each phase. The desired loadvoltage is 220 V line-to-line at 60 Hz. The inductance and resis-tance of the output filter inductor are equal to 3 mH and 0.1 X.The filter capacitance is 25 lF. The PI controllers were designedas described in [34]. The inner current control loop was designedfor a bandwidth of 1200 Hz while the outer voltage loop was de-signed for a bandwidth of 120 Hz. The performance of the pro-posed control scheme has been compared with a conventionalSCC based control scheme [21] with the same specification forthe voltage and current controllers.

Initially the grid-forming inverter is supplying a balanced load(10.752 O/ph). At 0.3 s, an inductive load (R = 30 O andL = 15 mH) is added between phases A and C and at 0.5 s, a resistiveload of 15 O is added in phase C. Finally, at 0.7 s a single-phase PVinverter connected between phase B and neutral, starts supplying acurrent of 20 A (peak) with unity power factor. The three-phaseload voltages and load currents, including neutral wire, are shownin Fig. 7 for both the conventional SCC based and the proposed con-trol schemes. There one sees that the load voltages remain bal-anced in steady-state for both control schemes at all the variousload unbalances considered in this study. The transient load volt-age for both schemes is shown with zoomed figure so that onecan clearly compare the speed of response for the two controlschemes. There one sees that the load voltage remains virtually un-changed following load and PV power variations with the proposedmethod, while at least 3 line cycles transient can be seen with theconventional method. One can observe in particular, the significantimpact of reverse power flow in one of the phases when the PV in-verter starts supplying active power beyond that consumed by thelocal load. It causes a large voltage overshot and long settling timefor the conventional SCC based technique.

Fig. 8 shows the steady-state load current waveforms for differ-ent combination of loads as considered in this study with the pro-posed control strategy. The results in steady-state are almostsimilar for both the control strategies. Initially the load currents

Table 2Experimental results of steady state performances.

Load Load peak voltages (V) THD (%) PVUR(%)

Type Ineg

(%)Izero

(%)PhaseA

PhaseB

PhaseC

PhaseA

PhaseB

PhaseC

Balanced 0 0 104.94 104.95 104.88 1.7 1.9 1.9 0.041Unb. #1 100 20 104.92 104.87 105.05 1.8 1.8 1.4 0.098Unb. #2 50 50 104.84 105.23 104.92 2.5 3.0 3.0 0.222Unb. #3 100 100 104.96 104.77 104.69 2.8 3.9 3.9 0.146

Fig. 11. Transient response of the grid-forming inverter. (a) abc-Frame load voltages and currents; (b) dq-frame reference and actual voltages and currents for the threephases.

N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459 457

are balanced. Then a line-to-line load was added, therefore, thecurrent in phase A and C increases. The neutral current does notexist for these balanced and line-to-line unbalanced loads. The

next load was added between a line and the neutral, therefore,one of the phase current as well as neutral current changes. FinallyPV power injection in phase B causes the current in that phase to

458 N.A. Ninad, L. Lopes / Electrical Power and Energy Systems 55 (2014) 449–459

become negative, therefore, the grid forming inverter absorbspower through phase B while supplying through the others.

Fig. 9 shows the reference and actual voltages and currents forthe grid-forming inverter in the dq frame with the conventionalSCC based and the proposed control schemes. One can better ob-serve the speed of response following a load change or PV powerinjection from the dq signals. There, one clearly sees that the devi-ations in the voltage signals are smaller and shorter with the pro-posed per-phase scheme than with the conventional SCC basedscheme. One reason is that the current reference signal for the pro-posed scheme reacts faster than the SCC based one to load varia-tions and voltage errors. As expected for the SCC based scheme,the positive sequence current increases as loads are added and de-creases when the PV inverter starts supplying active power. Nega-tive sequence currents appear when unbalanced loads/sources areadded to the system. As for the zero sequence currents, they areonly present after t = 0.5 s when neutral connected unbalancedloads and sources start to operate. These are not explicitly seenin the per-phase scheme which does not need to compute the sym-metrical components of voltages and currents, which is a slow pro-cess employed in the conventional scheme. Thus, variations in thereference currents to compensate for voltage unbalances take placefaster and only in the phase(s) directly related to the load varia-tions. Fig. 9(d) shows that the d component of the inductor (filter)current in phase B is small positive because of the reactive powersupplied by the filter capacitor. There are no reactive power varia-tions in that phase where a unity power factor source is connectedat t = 0.7, making the q current in that phase become negative. Con-versely, the d component of the inductor current in phase A be-comes negative when an inductive load is added between phasesA and C at t = 0.3 s and does not change at t = 0.5 s when a resistiveload is connected between phase C and the neutral.

3.2. Experimental study

The experimental study was conducted with a small-scale lab-oratory prototype. The four-leg inverter was realized with twoSEMIKRON SEMITEACH inverters, since each one presents onlythree legs. The control algorithm was implemented in a dSPACEDS-1103 system. Table 1 shows the parameters for the experimen-tal study of the four-leg grid-forming inverter. The PI controllershas been designed as described in [34] for bandwidth of 1200 Hzand 120 Hz for the inner current control loop and outer voltageloop respectively. The dc bus of the inverter was created withthe SEMITEACH’s three-phase diode rectifier. A three-phase VARI-AC was used to adjust the dc bus voltage to the desired valueand a 8000 lF capacitor to minimize the dc bus voltage ripple. Var-ious types of load configurations, described in Table 1, were con-sidered in the tests. These include from three-phase balanced tosingle-phase unbalanced loads.

Fig. 10 shows the steady-state behavior of the four-leg inverterfor balanced and various unbalanced load cases. The four-leg inver-ter with the proposed control scheme was able to regulate the fun-damental component of the load voltage close to the specified105 V peak for all cases of load unbalanced including a single-phase load connected between a phase and the neutral.

Table 2 shows the magnitudes of the fundamental componentsof the three phase voltages and the total harmonic distortion (THD)for all tested conditions in steady-state as well as the phase voltageunbalance rate (PVUR). According to IEEE, PVUR is defined as [35],

%PVUR¼maximum voltage deviation from the average phase voltageaverage phase voltage

�100

ð9Þ

IEEE recommends a value of PVUR less than 2% for the distribu-tion system and with the proposed control strategy this quantity is

quite low as shown in Table 2. The percentage negative and zerosequence load currents with respect to the positive sequence com-ponents are indicated for all cases, what indicates the ‘‘degree’’ ofload unbalance. There one sees that the resulting voltage unbal-ances with the proposed control scheme is very small in all cases,increasing in general with the severity of the load unbalance. Itshould be noted that the gate drive circuit of the SEMITEACH unituses an inherent large dead-time of 4.8 ls for each leg, what cer-tainly increased the values of THD.

Fig. 11 shows the transient response of the system. Initially theload and the inverter voltages are balanced. Then, at approximately1.986 s, the load in phase A changes from 28.57 X to 16.67 X, mak-ing the system unbalanced. In spite of that, the voltages in thethree phases remain virtually identical as one can see from thevoltage waveforms in abc and dq coordinates. The response ofthe system is very fast as shown by the dq coordinates of the ref-erence and actual currents in phase A. The currents in phases Band C remained unchanged. It should be noted that for a similarload variation it took more than 2 line cycles in [20,21] for the sys-tem to recover the balanced voltage condition.

4. Conclusion

This paper presents a new control technique suitable for a four-leg grid-forming inverter of a three-phase four-wire community-type hybrid mini-grid. It allows the inverter to provide balancedoutput voltages under severe load unbalance conditions. Evenwhen the inverter has to supply power through two phases and ab-sorb through the other one, due to the presence of a single-phasePV inverter, its output voltages remain balanced. The speed of re-sponse achieved with this technique is very fast due to a per-phasedq control scheme implemented with a fictive orthogonal circuitthat includes the neutral wire impedance. In this way, one cando away with the slow symmetrical components calculator usedin the conventional dq implementation while compensating forzero sequence components. The superior performance of the pro-posed control scheme was demonstrated by means of simulationand experimental studies under various scenarios.

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