Performance of time-frequency coded spreadspectrum systems operating over noisy fadingchannels

P. Belezinis, DipEE, MEng, PhD, DICL.F. Turner, PhD, DSc(Eng), CEng, FIEE

Indexing terms: Radiocommunication, Spread spectrum systems, Noisy channels

Abstract: The performance of time-frequencycoded spread spectrum systems (TFCSSS) is con-sidered when the systems are operating over noisyfading channels. Systems employing the randomaddressing technique of Viterbi [1] and theaddressing scheme developed more recently byEinarsson [3] are examined. An exact expressionis derived for the word-error probability associ-ated with the Viterbi scheme. This expression pro-vides the tightest known upper bound to theperformance of the Einarsson addressing scheme.Also in the paper the question of the most appro-priate way of using power is considered, and it isshown that if the possibility of using an increasedtransmitter power exists, it is better to increase thepower per transmission chip to a higher level andkeep it constant, irrespective of the number ofusers occupying the chip, rather than to use apower level that increases with the number ofusers occupying the chip.

1 Introduction

The performance of multiple-user TFCSSS is increasingin importance [1-4] with the development of mobileradio systems. Perhaps the best known such system isthat of Viterbi [1] who suggested that at each transmis-sion epoch, the message to be transmitted should be com-bined with an address, which is generated in apseudo-random manner. Goodman et al. [2] followedthis by considering the use of a linear addressing scheme,and Einarsson [3] developed an optimum addressingtechnique based on the use of finite fields. The per-formance of Viterbi's scheme as considered further byEinarsson [4] when he examined its operation over achannel, subject to both fading and additive Gaussiannoise. In his consideration of Viterbi's scheme, Einarssonderived an upper bound to the word-error probability,and used this to obtain a corresponding estimate of thebit-error probability.

In this paper, both the Viterbi scheme and a schemeemploying Einarsson's addressing technique are con-sidered further. A new, exact expression is derived for the

Paper 6336F (E8/E7), first received 26th March 1986 and in revisedform 2nd June 1987Prof. Turner is with the Department of Electrical Engineering, ImperialCollege of Science and Technology, Exhibition Road, London SW72BT, United Kingdom, and Dr. Belezinis is with the Applied Elec-tronics Laboratory, University of Patras, Greece

word-error probability associated with the Viterbischeme when this is operating over a noisy fadingchannel. A corresponding approximate expression, basedon the exact word-error probability, is derived for thebit-error probability. In addition to providing an exactstatement of the performance of the Viterbi randomaddressing (RA) scheme, the exact expression for theword-error probability forms the tightest known boundto the performance of a system using Einarsson'soptimum addressing technique. In the case of a systemusing Einarsson's addressing technique, results obtainedfrom the evaluation of the exact expression for the word-error probability (derived for a Viterbi-type RA scheme)are compared with those obtained from a computersimulation of the system. The comparison confirms thatthe expression for the word-error probability does in factconstitute an upper bound to the performance of asystem using Einarsson's addressing technique. A furthercomparison shows the bound to be much tighter thanthat which can be obtained by using Einarsson's boundrelating to the performance of Viterbi's original scheme,and the comparison indicates that at low signal-to-noiseratios the bound can be considered as a reliable estimateof the actual error performance of the system.

The performance of a TFCSSS clearly depends on theactual power transmitted 'per chip', and in the paper,four different versions of a basic time-frequency codedsystem are considered. In version I it is assumed that thetransmitted power per chip is set equal to unity, irrespec-tive of the number of users which occupy the chip. Inversion II it is assumed that the transmitted power perchip is proportional to the square of the number of usersoccupying the chip, that is, it is assumed that 'voltagecoherence' exists between users. In between these twoextremes, two other versions are considered. In one ofthese, which is referred to as version III, it is assumedthat the transmitted power per chip is proportional tothe number of users occupying the chip. In a finalversion, referred to as version IV, it is assumed that thesystem operates as in version I but with the power perchip being increased, so that the overall average trans-mitted power is the same as that used in connection withversion II. The performance of the various versions isconsidered and compared, and the trade-offs to beobtained in terms of system performance are noted.

2 Description of system and communicationchannel

2.1 System descriptionFig. la shows the essential elements of a basic TFCSSS[1]. In the system, for each of M users, K informationbits are taken in, and these are converted into one of 2K

IEE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988 513

equiprobable message symbols, denoted Xm, m = 1, 2,..., 2K. The message symbol Xm is then added modulo-Q(Q a prime or a power of a prime, and Q ̂ 2K) to an

messagesymbol

mod-Q • mod-Q

address

detected• messagesymbol

address

messagesymbolmatrix

transmissiontime-frequencymatrix

decoded receivedsymbol matrix

rX X X

L .ime-

X

0-1addressmatrix

X

X

X

X

X X X X

addressmatrixidentical tothat used attransmitter

Fig. 1 Essential elements of a TFCSS system

address, the L elements of which are generated accordingto some predetermined rule; and the corresponding L-element message-carrying sequence is transmitted. Thisaddition process is illustrated in Fig. \b.

In the case of the Viterbi RA scheme, the elements ofthe address are randomly generated integers in the range0 to Q — 1. With the more recently developed optimumaddressing technique of Einarsson, the elements of theaddress are generated according to the following rule:

where ym e GF(Q) and $ is a fixed primitive element ofGF(Q).

At the receiver, the appropriate fully synchronisedreplica of the address sequence is subtracted modulo-Qfrom the incoming signal (see Fig. lb) and this thusresults in an output sequence which, ideally, forms aunique full row in the frequency-time matrix (see Fig. lb).In practice, of course, owing to various impairments, ele-ments within a desired row may be eliminated, and ele-ments in an unwanted row may be inserted. Yue [5] hasconsidered the question of the optimum way of makingdecisions and he has shown that although the optimumdecision maker is a nonlinear device, which is difficult toimplement, a good suboptimum decision maker takes theform of a hard-limited combiner. In the study reported inthis paper, Yue's suboptimum decision maker is assumed.

From the random way in which the addresses are gen-erated, it is clear that, from time to time, more than oneuser will be assigned to a particular chip in thefrequency-time matrix, and that some design rule has tobe established to determine the power transmitted duringsuch times of coincidence. With respect to the question oftransmitted power per chip, various alternatives areavailable in the base-to-mobile case, and it is not obviousa priori which rule should be adopted. For example,although it is clear that system performance will improveif the transmitted power per chip is allowed to increase insome way as the number of users wishing to occupy achip increases, it is not clear how this should be done.Also, it is not obvious what degree of improvement can

be expected. With a view of answering these and relatedquestions, four rules (versions I-IV of the system) fordetermining the transmitter power as a function of thenumber of users wishing to occupy a chip have beeninvestigated. It should be noted that in the mobile-to-base case, strict incoherence between users will exist andhence the power per chip will be proportional to thenumber of users, so that the situation corresponds toversion III.

2.2 Description of the channelA familiar, well known channel model used to represent afading channel is that [6] in which the received signalenvelope, a, is assumed to have a Rayleigh distributionwith <a2> = 1. In the model, it is assumed that the fadingis independent from chip to chip and that the phase 0 isuniformly distributed over the range [0, 2rc]. This modelhas been used previously by Einarsson [4] in his con-sideration of TFCSSS and it is also adopted in thispaper. In addition to fading, it is assumed that additiveGaussian noise is present.

3 Exact expression for the word-error probabilityin Viterbi's random addressing scheme

The effects of channel impairments, combinations offading and noise, can be regarded as a process that cor-rupts the received frequency-time matrix by producingdeletions in occupied chips with probability PD, and falsealarms in empty chips with probability PF. As a result ofdeletions, the row containing the desired message mayhave a lower number of entries than a false row in whichthe entries are formed by insertions resulting from a com-bination of other users' interference and channel impair-ments.

An exact expression can be derived for the word-errorprobability in a Viterbi random addressing scheme. Theexpression is in terms of the probabilities PD and PF andthe system parameters Q, M and L, where Q is thenumber of frequency slots, M is the number of users onthe system and L is the number of times a particularmessage is transmitted. The analysis is general in thesense that it applies to any kind of impairment for whichprobabilities PD and PF can be calculated.

3.1 System version IAn insertion in any given chip of the received frequency-time matrix arises as a result of other users' interferenceand noise. The probability that one or more interferingusers are present is

M-l

(1)

From the definitions of PD and PF, it follows that aninsertion occurs with probability

- PD) + (1 - P)PF (2)

and so the probability PFR(n), that a false row (FR) has noccupied chips, is given by

PFR.(n) — -Pi)L-n (3)

The L occupied chips in a true row (TR) are reduced tosome number m by the process of deletion and the prob-ability PTR(m) that a true row contains only m entries isgiven by

(4)PTRW = ( m JO "

514 1EE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988

It should be noted that with a majority decision makererrors will be made with probability 1 when n > m, andwith some probability less than one when n = m. In thecase in which m > n, no errors are made. The averageprobability Pw of word-error is

t Pr(error,TR=;) (5)

where TR = j denotes that there are ; occupied chips inthe true row, and Pr (error, TR = j) is the probability ofdecoding a true row erroneously when there are joccupied chips in the row.

The term Pr (error, TR =;) in eqn. 5 can be writtenmore conveniently as

Pr (error, TR =j) = Pr (error, TR =; , F R ^ =/)

+ Pr (error, TR = jf, FRm(JX > j) (6)

where FRmajc = j indicates that the false rows withmaximum number of occupied chips contain exactly jsuch occupancies, and FR,^, > j indicates that the falserow with maximum number of occupied chips containsmore than j occupied chips.

The term Pr (error, TR = j , FRmax > j) can be writtenalternatively as

Pr (error, TR = ;, 3 FR > ;) (7)

where 3 FR > j denotes that there is at least one falserow with more than j occupied chips and eqn. 7 can bewritten as

Pr (error, TR = j , 3 FR > ;)

= Pr (error | TR = j , 3 FR > ;)

x Pr (TR = ; | 3 FR >j) Pr (3 FR >j)

= 1 • Pr (TR =j 13 FR >j) Pr (3 FR > j)

= P r ( T R = 7 ) [ l - P r ( V F R ^ ; ) ] (8)

where V FR ^ ; denotes that all false rows have occu-pancy in ; or fewer chips. Since there are a total of 2K — 1possible false rows in the frequency-time matrix it followsthat

Pr (TR =;)[1 - Pr (V FR ^ ; ) ]

= Pr (TR =;)[1 - (Pr (FR s^))2*"1]

and hence

Pr (error, TR =; , F R ^ >j) = Pr (TR = j)

x l —

In arriving at eqn. 9, it has been assumed that statisticalindependence exists between the rows of the matrix. Thisassumption leads to a relatively easy evaluation of theerror probability. Although the assumption of indepen-dence between the rows has been widely adopted in pre-vious studies reported in the literature, it is not strictlyvalid, and the question of dependence between rows hasbeen considered in a relatively recent paper by Yan andWang [7]. In their paper, Yan and Wang developed asomewhat complicated correlation model and comparedit with the usual model in which independence isassumed to exist between rows. The results of Yan andWang show that the assumption of statistical indepen-dence can be used with confidence, since the resultsobtained when statistical independence is assumed arevery similar to those obtained when full account is takenof the statistical dependence between rows. It will also beseen from the results presented in this paper, in which a

very high level of agreement is seen to exist between theresults obtained by computer simulation and thoseobtained using the theoretical results, that the conclu-sions of Yan and Wang are justified.

Consider now the term Pr (error, TR = j , FRmax = j) ineqn. 6. If r out of 2K — 1 possible false rows each containexactly j occupied chips, the remaining 2K — 1 — r falserows contain less than j occupied chips, and the term canbe written as

Pr(error,TR=7,FRfmix=;)2 * - l£ Pr (error, TR=;,FR( r )=;,FR( 2 K_ !_,)<;)

r = l

2 * - l

r = lPr(error |TR=; ,FR ( r ) = ; ,FR ( 2 K _ 1 _ r ) <; )

x Pr (TR = ; | FR(r) = ;, FR(2*_!_,,</)

xPr(FR ( r ) = ; ,FR ( 2 x_ 1 _ r ) < j ) (10)

where FR(r) = j denotes that r false rows each containexactly) occupied chips, and F R ^ . j . f ) < ; denotes thatthe remaining 2K — 1 — r false rows each contain lessthan) occupied chips. It follows from eqn. 10 that

Pr(error,TR=;,FRmflX=7)=

2*-ir = l

(11)

On substituting eqns. 9 and 11 into eqn. 6, and then sub-stituting the result into eqn. 5, the following exact expres-sion is obtained for the word-error probability Pw\

/I'ITT-TK.O)

2 (12)

The bit-error probability Pb is given approximately [1, 4]by

w

It will be noted that there is some similarity between eqn.12 given above and eqn. 17 appearing in the paper byGoodman et al. [2]. Eqn. 12 is, however, more general inthat it takes account of important situations, such as thatin which a true row is completely empty following dele-tions.

3.2 System version IfThe analysis of the performance of this system is a rela-tively simple extension of the previous analysis, if it isassumed that when two or more users occupy a chip, theresulting signal level is sufficient to prevent a deletiontaking place. The probability Px that a given chip isoccupied by only one interfering user is

Af-2(13)

and hence the probability of insertion with respect to agiven chip is

P, = P ^ l -PD + (P- pt) + (1 - P)PF

= P- P,PD + (1 - P)PF (14)

IEE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988 515

If this modified expression for Pt is used in eqn. 3, andthe same substitutions are made as in the case of versionI, an expression corresponding to eqn. 12 is obtained for

10 V

10'-18.00 -13.00 -8.00 -3.00 2.00 7.00

additive noise variance.dB

Fig. 2 Einarsson's scheme, version I: error performance in GaussiannoiseQ = 17;L = 8;Af = 17O O O simulation resultsA A A new upper bound+ + + upper bound based an Einarsson's analysis

10

10u

10'

id2

10-18.00 -13.00 -8.00 -3.00 2.00

additive noise variance.dB7.00

Fig. 3 Einarsson's scheme, version I: error performance in Gaussiannoise

Q = 11;L=12;M= 17O O O simulation resultsA A A new upper bound+ + + upper bound based on Einarsson's analysis

version II. Although this is not an exact expression forthe word-error probability, it is an excellent approx-imation, since the error associated with the assumptionregarding deletions is negligible.

The exact expression derived in eqn. 12 for the word-error probability of version I and the corresponding ex-pression that can be derived for version II using eqn. 14

K)'r-

10

Q.

g

V.

-2K>-18.00 -13.00 -8.00 -3.00 2.00

additive noise variance. dB7.00

Fig. 4 Einarsson's scheme, version I: error performance in Rayleighfading and Gaussian noiseQ= 17; L = 12; Af = 17Fading independent from chip to chipMean square value of envelope = <a2> = 1O O O simulation resultsA A A new upper bound+ + + upper bound based on Einarsson's analysis

io V

10

an2o.

10-1

10-2

-18.00 -13.00 -8.00 -3.00 2.00additive noise variance.dB

7.00

Fig. 5 Einarsson's scheme, version I: error performance in Rayleighfading and Gaussian noiseQ = 17;L = 12;M=15;<a 2 > = 1O O O simulation resultsA A A new upper bound+ + + upper bound based on Einarsson's analysis

can be considered as upper bounds to the correspond-ing versions of systems employing Einarsson's optimumaddressing technique. This conjecture is based on therealisation that with the Einarsson addressing technique,

516 IEE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988

Table 1 : Expressions for average power and peak power forversions I—IV

Version Average power

I 1

Peak power

-0 -o)

~Q

IV

M

A2

Q = number of frequency slots; M = number of users;A = amplification factor, A > 1

the extent of other users' interference is reduced belowthat associated with the Viterbi RA scheme. Thisreduction is due to the structure of the addresses of the

10'

10

id2

id3

7.00-18.00 -13.00 -8.00 -3.00 2.00additive noise variance.dB

Fig. 6 Einarsson's scheme, version II: error performance in GaussiannoiseQ = 17;L=12;M=17O O O simulation resultsA A A new upper bound+ + + upper bound based on Einarsson's analysis

Einarsson scheme, which guarantees that no two usersare allowed to occupy simultaneously the same time-frequency chip; thus minimising the interference betweenusers.

4 Results

To check the conjecture that the exact expression derivedfor the word-error probability in a Viterbi-type RAsystem can be used as a tight upper bound for the per-formance of a system using Einarsson's optimumaddressing technique, a simulation of Einarsson's systemwas carried out. In the simulation, channels perturbed byadditive Gaussian noise alone, and a combination ofRayleigh fading and Gaussian noise, were considered.The results obtained relating to version I-type systemsare shown in Figs. 2-5. In all the Figures shown in thispaper, the noise variance is expressed in dB relative tounit variance noise. It should be noted that the horizon-tal axes shown on the Figures can be converted to signal-to-noise ratio axes by simply subtracting the given noise

IEE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988

level expressed in dB from the average (or peak) signalpower computed using the appropriate expressions givenin Table 1.

10

10'

10'

10-2

+•

-18.00 -13.00 -8.00 -3.00 2.00additive noise variance.dB

7.00

Fig. 7 Einarsson's scheme, version II: error performance in Rayleighfading and Gaussian noiseQ = 17; L = 12; M = 17; <a2> = 1O O O simulation resultsA A A new upper bound+ + + upper bound based on Einarsson's analysis

10 V

10

10

-310

18.00 -13.00 -8.00 -3.00 2.00additive noise variance.dB

7.00

Fig. 8 Comparison of the error performance of versions 1-1V inGaussian noiseQ = 17; L = 12; Af = 17O O O version I simulation results (Gaussian noise)A A A version II+ + + version IIIx x x version IV

Figs. 2 and 3 are for channels that are subject to noisealone and Figs. 4 and 5 are for channels that are subjectto both noise and fading. Comparison of the correspond-ing Figures shows that, as expected, systems that are

517

subject to both fading and noise have a performance in-ferior to that associated with noise alone.

From the Figures it can be seen that the performanceestimates, based on the newly derived expression for theword-error probability in a Viterbi-type scheme, do infact provide an upper bound to the performance of anEinarsson-type system. Also shown in the Figures is theupper bound derived previously by Einarsson [4]. It isclear that the newly derived bound is significantly tighterthan Einarsson's bound. At relatively low signal-to-noiseratios the newly derived bound is very tight and can infact be considered as a reliable estimate of system per-formance, whereas the Einarsson bound becomes increas-ingly loose and does in fact exceed unity. This arisesbecause eqn. 15 of Reference 4 is a union bound. Figs. 6and 7 show simulation results for version II-type systems.Fig. 6 deals with the case in which noise alone is presentand Fig. 7 deals with the case of combined noise andfading. From the Figures it is again clear that the esti-mates based on the newly derived expression for theword-error probability constitute an upper bound that issignificantly tighter than Einarsson's bound and that, asexpected, operation in the presence of combined noiseand fading is inferior to the operation in the presence ofnoise alone.

In addition to the simulation of versions I and II, ver-sions III and IV of Einarsson's system were also simu-lated. Some of the results that have been obtained areshown in Figs. 8 and 9. The figures relate to operation in

ioV

i10

-210

-310

18.00 -13.00 -8.00 -3.00 2.00additive noise variance, dB

7.00

Fig. 9 Comparison of the error performance of versions I-IV inGaussian noise

Q = 17; L = 12; A /= 16O O O version I simulation results (Gaussian noise)A A A version II+ + + version IIIx x x version IV

the presence of noise alone and show how the per-formance of the system varies from version to version.

When comparing the performance of the various ver-sions of the system, it is clear from Figs. 8 and 9 that fora given noise variance version II outperforms version I,except at very low values of noise variance. This improve-ment is to be expected since a significantly increased levelof transmitter power is used. Specifically, M2 times more

peak power is required with version II than with versionI. For the case shown in Fig. 8 for example, this corre-sponds to an increase in noise variance (relative to unitynoise variance) of 10 log10 (17)2 = 24.6 dB. Examinationof Figs. 8 and 9 shows, however, that for operation in themiddle of the range of noise variance values, version IIcan only handle approximately 5 dB more noise powerthan version I for a given error probability. This limitedimprovement in system performance can, however, beexplained in terms of the average transmitter power. InTable 1 expressions are given for both the peak andaverage power requirements associated with each versionof the system. From this Table it can be seen that for thevalues of Q, M and L being considered, version II usesapproximately 5 dB more average power than version I.

Figs. 8 and 9 also show that version III (in which thetransmitted power per chip is made proportional to thenumber of users occupying the chip) lies between theextremes set by versions I and II. Examination of theFigures shows that in the middle range of noise variancevalues, version III can withstand 2 to 3 dB more noisepower than version I, but approximately 2 to 3 dB lessnoise power than version II. In version III the peakpower requirement (for the case Q = M = 17) is approx-imately 10 dB greater than in version I. Here again,however, calculation using the formula given in Table 1shows that the average increase of transmitter powerover that associated with version I is approximately 3 dBwhich accounts for the observed increased level of immu-nity to noise.

Results relating to the operation of version IV are alsoshown in Figs. 8 and 9. For the same average transmitterpower, version IV requires approximately 20 dB less peakpower than version II. From the Figure it can be seenthat over most of the range of noise variance values,version IV outperforms version II. The underlying reasonfor this is that the higher level of transmitter power withversion IV is used more effectively than with version II.Unlike version II, with version IV an increase in trans-mitter power is made, when only a single user occupies achip. A consequence of the increased use of power in thissituation is that the probability of deletion is significantlyreduced and the increased detection threshold associatedwith the increased transmitter power of version IV alsomeans that the probability of false alarm is reduced.

Figs. 8 and 9 show two interesting general trends.These concern the operation at the extremes of very lownoise variance (high signal-to-noise ratio) and very highnoise variance (low signal-to-noise ratio). The Figuresshow that at these extremes, all systems tend to performlike version I. The reason for this is that for high signal-to-noise ratios the performance of version I is so goodthat any increase in transmitter power, irrespective of theway it is made, leads to a negligible improvement of thesystem performance. At very low signal-to-noise ratiosthe performance is so poor that any increase in transmit-ter power has little effect on the error probability.

Two other general points worth noting concern therelative performance of versions II and IV and the way inwhich the performance of various versions changes as Mis reduced relative to Q. It will be noted from Figs. 8 and9 that as the noise variance is increased, a point isreached when version IV becomes inferior to version II.This cross-over point is associated with the fact that forM close to Q, multiple occupancy of chips occurs rela-tively frequently, and as version II uses more transmitterpower than version IV on these occasions, it is better ableto prevent deletions.

518 IEE PROCEEDINGS, Vol. 135, Pt. F, No. 6, DECEMBER 1988

When M is significantly less than Q, multipleoccupations become increasingly unlikely, and all ver-sions of the system use the same average transmitterpower (and the same peak power), and hence it followsthat all systems will have substantially the same per-formance.

5 Conclusions

A new exact expression has been derived for the per-formance of a Viterbi-type RA TFCSS system and it hasbeen shown that this constitutes a tight upper bound tothe performance of a system employing Einarsson'soptimum addressing scheme. The bound is so tight at lowsignal-to-noise ratios that it can be considered as a reli-able estimate of system performance.

Simulation results covering a wide range of parametervalues and channel impairments have been presented.These results support the theoretical developments givenin the paper. The consistency of the results supports thecommonly made assumptions relating to the statisticalindependence between rows of the received matrix, and itvalidates the arguments and conclusions drawn in thepaper by Yan and Wang. The simulation results showthat the bounding eqn. presented as eqn. 15 in Einars-son's paper [4] becomes increasingly loose with increas-

ing noise variance, and beyond a certain noise level itexceeds the meaningful value of unity.

It has also been shown that, if increased transmitterpower is available, it is better to boost the power per chipand keep it constant, irrespective of the number of users,rather than to use a power level per chip that increaseswith the number of users occupying the chip.

6 References

1 VITERBI, A.J.: 'A processing satellite transponder for multiple accessby low-rate mobile users', Digital Satellite Communications Con-ference, Montreal, 23rd-25th October 1978, pp. 166-173

2 GOODMAN, D.J., HENRY, P.S., and PRABHU, V.K.: 'Frequency-hopped multilevel FSK for mobile radio', Bell. Syst. Tech. J., 1980,59, (7), pp. 1257-1275

3 EINARSSON, G.: 'Address assignment for a time-frequency-codedspread spectrum system', Bell Syst. Tech. J., 1980, 59, (7), pp. 1241-1255

4 EINARSSON, G.: 'Coding for a multiple access frequency-hoppingsystem', IEEE Trans., 1984, COM-32, (5), pp. 589-597

5 YUE, O.: 'Maximum likelihood combining for noncoherent and dif-ferentially coherent frequency hopping multiple access systems', IEEETrans., 1982, IT-28, (4), pp. 631-639

6 SCHWARTZ, M., BENNETT, W.R., and STEIN, S.: 'Communica-tion systems and techniques' (McGraw-Hill, 1966)

7 YAN, T.Y., and WANG, C.C.: 'Mathematical models for cochannelinterference in FH/MFSK multiple-access systems', IEEE Trans.Commun., 1984, COM-32, (6), pp. 670-678

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