Phase-locked-loop-control-based electronic ballastfor fluorescent lamps
R.-L. Lin and Y.-T. Chen
Abstract: The paper proposes an electronic ballast in which the resonant frequency of the circuit iscontinuously tracked by the phase-locked loop (PLL). This electronic ballast, which employs PLLcontrol, has a high tolerance for the variations that exist in the equivalent resistance of a lamp. Atpresent, the PLL control is used to drive cold-cathode fluorescent lamps (CCFLs), in whichvariations in equivalent resistance between ignition and the steady state are small, so that phasedifferences at the resonant frequency are almost fixed; thus the resonant frequency can be trackedcontinuously by the operating frequency. However, if variations in equivalent resistance are large,the phase difference at the resonant frequency may be not fixed, and thus the resonant frequencymay be not continuously tracked by the operating frequency. The paper proposes the electronicballast for fluorescent lamps with large variations in equivalent resistance between ignition and thesteady state. According to the phase characteristics of various resonant tanks and an optimumdesign of the resonant tank, the circuit’s resonant frequency is continuously tracked by the PLL.Since the current regulator circuit limits the value of the lamp current as the operating frequencyincreases from the resonant frequency, the lamp current is accurately controlled, regardless ofvariations in the load. The paper discusses the implementation of the proposed ballast with PLLcontrol, which offers high tolerance for the variations of the equivalent resistance in the lamp.
1 Introduction of control schemes for electronicballasts
The electronic ballast is composed of an AC/DC rectifierunit and a DC/AC inverter unit. The AC/DC rectifiersupplies a DC voltage to the DC/AC inverter, and the DC/AC inverter uses a high-frequency voltage to drive the lamp.Conventionally, the configuration of this electronic ballastincludes a full-bridge rectifier and a class D inverter [1], asshown in Fig. 1.
Figure 2 shows the categories of control schemes for DC/AC inverters, which can be either fixed-frequency [2] orvariable-frequency controls. The variable-frequency controlis further compartmentalised into voltage feedback control,current-feedback control [3–5] and PLL control [6–8]. Thesecontrol schemes will be discussed in Section 2.
Generally speaking, due to the aging characteristic oflamps, their steady-state equivalent resistances are notalways constant. Also, different types of lamp utilise thesame specifications. Therefore, lamps have different levels ofequivalent resistance, which leads to different voltage gainsfor their resonant tanks, especially in the steady state. Basedon variations in lamps’ levels of equivalent resistance, lampvoltage cannot be accurately supported with fixed-frequencycontrol; however, voltage or current feedback control hasovercome this defect.
Figure 3 shows the effects caused by variations in theequivalent resistances of the lamps. Lamps 1 and 2 in Fig. 3have different equivalent resistances, which lead to differentvoltage gains for their resonant tanks, especially in thesteady state.
In the steady state, by the voltage-feedback control, lamp1 can be operated with the desired voltage gain when theoperating frequency is fstable1. Unfortunately, due to thefluctuating equivalent resistance in lamp 2, its operatingfrequency cannot be adjusted to provide the desired voltage.During the operation of lamp 2, the circuit operating
R Lamp
Vacresonant tank
DC/AC inverterAC/DC rectifier
Fig. 1 Configuration of the electronic ballast
frequency control
fixed-frequency control
voltage or current-feedback control phase-locked-loop control
variable-frequency control
Fig. 2 Control schemes for DC/AC inverters
The authors are with the Department of Electrical Engineering, National ChengKung University, Tainan City, Taiwan, ROC
E-mail: [email protected]
r IEE, 2005
IEE Proceedings online no. 20045199
doi:10.1049/ip-epa:20045199
Paper first received 26th October 2004 and in revised form 13th January 2005.Originally published online: 8th April 2005
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 669
frequency may be lower than the circuit resonant frequencyfr2, thus causing an increase in switching losses [1]. For thesame reason, the current-feedback control scheme also hasthis defect. The PLL control scheme has been proposed toovercome this drawback.
In Fig. 3, due to the PLL control, lamp2 is controlled atthe resonant frequency fr2, and so the switching losses arenot a concern. Consequently, the PLL control is better thanboth voltage feedback and current feedback controlmethods.
With the PLL control, the operating frequency is able tocontinuously track the resonant frequency, but the voltagemay be higher than the requested gain at the resonantfrequency. To resolve this issue, an external circuit is used toincrease the operating frequency, and thus the voltage gaincan be reduced sufficiently.
At present, the PLL control is used to drive cold-cathodefluorescent lamps (CCFLs), in which variations in equiva-lent resistance between ignition and the steady state aresmall, so that phase differences at the resonant frequencyare almost fixed; thus, the resonant frequency can becontinuously tracked by the operating frequency. However,if variations in equivalent resistance are large, the phasedifference at the resonant frequency may be not fixed, andthus the resonant frequency may not be tracked continu-ously by the operating frequency.
This paper proposes our electronic ballast for fluorescentlamps with large variations in equivalent resistance betweenignition and the steady state. Because of the phasecharacteristics of various resonant tanks and an optimumdesign of the resonant tank, the circuit’s resonant frequencyis continuously tracked by the PLL. And thus, thanksto the current regulator circuit, which limits the valueof the lamp’s current as the operating frequency in-creases from the resonant frequency, the lamp currentis accurately controlled, regardless of variations in theload.
2 Analysis of PLL control for electronic ballast
The block diagram of the proposed PLL-control electronicballast, shown in Fig. 4, is composed of a AC input, a full-bridge rectifier, half-bridge switches, a resonant tank, a PLLcontrol circuit, a current regulator circuit and a half-bridgedriver circuit. In this block diagram, the square wave,produced by the half-bridge switches, which are bothswitched at 50% duty cycle, supports the resonant tank.And thus, according to a phase difference detected in theresonant tank, the PLL control circuit regulates theoperating frequency of the half-bridge driver. The functionof the current regulator circuit is to maintain a fixed currentin the lamp.
The phase characteristics of the series–parallel resonanttank (SPRT) will be analysed and discussed to determine asuitable resonant tank for tracking the resonant frequencywith PLL control. Phase detection of voltages is preferableto phase detections of currents, because the latter involvesmany disadvantages, such as I2R losses with a serialresistance, noise interferences in the current-feedback signal,and the expense of Hall sensors. Therefore, the phases ofvoltages in the SPRT at the resonant frequency will beobserved and analysed in Section 3.
As shown in Fig. 4, an SPRT is composed of an inductorL, two capacitors (Cs and Cp), and a resistance RLamp.Based on variations in the equivalent resistance during thelamp’s ignition and at the steady state, with different valuesof the resistance RLamp, the phases and gains of the inputvoltage Vi in relation to the output voltage Vo in the SPRTat the resonant frequency will be obtained.
The relationship of the input voltage Vi to the outputvoltage Vo is shown in (1); then the gain and phase of Vo/Vi
amplitude (Vo/Vi)
ignition gain
operating gain
fstartfr1
fr2
fstable1
before ignitionafter ignitionlamp 1
lamp 2
frequency
Fig. 3 Relationship between amplitude of Vo/Vi and operatingfrequency
current-regulator
circuit
half-bridgedriver circuit
phase detection
phase comparator
low pass filter
vco
PLL IC
full-bridgerectifier
Vac VDCVi Vc Cp
CsL
R lampVo−− − −
+
+ + +
Fig. 4 Block diagram of the proposed electronic ballast with PLL control
670 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
are derived, as shown in (2) and (3):
Vo
Viðf Þ ¼
R1
j2pfCp1
j2pfCpþ R
j2pfLþ 1
j2pfCsþ
R1
j2pfCp1
j2pfCp þ R
ð1Þ
VoViðf Þ
¼ 2p
Cs2R2Lampf 2
64p6L2Cs2Cp2R2Lampf 6 32p4LCsCpR2
Lampf 4ðCsþ CpÞþ16p4L2Cs2f 4 þ 4p2R2
Lampf 2ðCs2 þ Cp2Þþ8p2CsR2
Lampf 2ðCp LÞ þ 1
8>>>>>>>>><>>>>>>>>>:
9>>>>>>>>>=>>>>>>>>>;ð2Þ
ff Vo
Viðf Þ ¼ arctan
4p2LCsf 2 1
2pRLampf ð4p2LCsCpf 2 Cs CpÞ
ð3ÞTo simulate the ignition and the steady state of the lamp inthe SPRT, the inductor L, the capacitor Cs, the capacitor Cp
and the three different values of the resistance RLamp are,respectively, 1mH, 100nF, 10nF, 100O, 1kO and 1MO;the result of this setup is shown in Fig. 5. By observing thephases, the phase difference between Vi and Vo at theresonant frequency is always 901 when RLamp is largerthan 1kO. However, in RLamp, the value of the phase at theresonant frequency, 100O, rises to151. Therefore, becauseof variation of RLamp, the phase difference at the resonantfrequency is not fixed.
The relationship of the input voltage Vi to the voltage Vc
is shown in (4); then the gain and phase of Vc/Vi are
derived, as shown in (5) and (6):
Vc
Viðf Þ ¼
R1
j2pfCp1
j2pfCpþ Rþ 1
j2pfCs
j2pfLþ 1
j2pfCsþ
R1
j2pfCp1
j2pfCp þ R
ð4Þ
Vc
Viðf Þ
¼ 2p4p2R2
Lampf 2ðCsþ CpÞ2 þ 1
8p2LCsCpR2Lampf 2ð8p4f 2LCsCp 4Cs 3Cp LÞ
þ16p4L2Cs2f 4 þ 4p2R2Lampf 2ðCs2 þ Cp2Þ þ 1
8>>>><>>>>:
9>>>>=>>>>;
ð5Þ
ff Vc
Viðf Þ
¼ arctan8p2LCs2RLampf 3
16p4LCsCpR2Lampf 4ðCsþ CpÞ 4p2R2
Lampf 2ðCsþ CpÞ2
þ4p2LCsR2Lampf 2 1
8>>>><>>>>:
9>>>>=>>>>;ð6Þ
To simulate the ignition and the steady state of the lamp inthe SPRT, inductor L, capacitor Cs, capacitor Cp and thethree different parameters of the resistance RLamp are,respectively, 1mH, 100nF, 10nF, 100O, 1 kO and 1mO;the result of this setup is shown in Fig. 6. By observing thephases, the phase difference between Vi and Vc at theresonant frequency is always 901 when RLamp is largerthan 1kO. However, in RLamp, the value of the phase at theresonant frequency, 100O, rises to 301. Therefore, owingto the variation of RLamp, the phase difference at theresonant frequency is not fixed. However, the variation of
Rlamp=1k Ω
Rlamp=100 Ω
Rlamp=1M Ω
10 100
frequency, kHz
1000
100
10
1
0.1
|Vo
/ Vi |
Rlamp=1k Ω
Rlamp=100 Ω
Rlamp=1M Ω
10 100
frequency, kHz
degr
ee (
Vo
/ Vi)
0−15
−90
−180
Fig. 5 Gains and phases of Vo/Vi
L¼ 103H, Cs¼ 107F, Cp¼ 108F
1000
1
100
10
0.110 100
frequency, kHz
R lamp= 1M Ω
R lamp= 1k Ω
R lamp= 100 Ω
R lamp= 1M Ω
R lamp= 1K Ω
R lamp= 100Ω
−90
−180
−30
0
10 100
frequency, kHz
degr
ee (
Vc
/ Vi )
|Vc / V
i |
Fig. 6 Gains and phases of Vc/Vi
L¼ 103H, Cs¼ 107F, Cp¼ 108F
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 671
the phase in Vc/Vi at the resonant frequency is lower thanthe variation of the phase in Vo/Vi at the resonantfrequency.
Section 3 will show further analysis of the SPRT with anoptimal design, in order to observe the relationship betweenthe phases of Vc/Vi at the resonant frequency and thevariations in the load resistance.
Equation (4) is modified to obtain the following:
Vc
Viðf Þ ¼
4p2f 2R2LampðCsþ CpÞð4p2f 2LCsCp Cs CpÞ
ð4p2f 2LCs 1Þð8p3f 3LCpCsRLamp 2pfCsRLamp 2pfCpRLampÞ2
þð1 4p2f 2LCsÞ2
j
ð8p3f 3LCpCsRLamp 2pfCsRLamp 2pfCpRLampÞ2pfRLampðCsþ CpÞð4p2f 2LCs 1Þ
ð8p3f 3LCpCsRLamp 2pfCsRLamp 2pfCpRLampÞ2
þð1 4p2f 2LCsÞ2
ð7Þ
When the phase of Vc/Vi is 901, the imaginary part of (7)is zero; then, (8) is solved to obtain (9), which shows theparameters of inductance L.
4p2f 2R2LampðCsþ CpÞð4p2f 2LCsCp Cs CpÞ
ð4p2f 2LCs 1Þð8p3f 3LCpCsRLamp 2pfCsRLamp 2pfCpRLampÞ2
þð1 4p2f 2LCsÞ2
¼ 0 ð8Þ
L ¼4p2f 2R2
LampðCsþ CpÞ2 þ 1
4p2f 2Csð4p2f 2CpCsR2Lamp þ 4p2f 2Cp2R2
Lamp þ 1Þð9Þ
Assuming that the required gain of Vo/Vi for the lampin the steady state is A, as shown in (10), then (9) and (10)can be used to derive the parameters of capacitor Cs, asfollows:
A ¼ Vc
Viðf Þ
¼
2pfCsRLamp
8p2LCsCpR2Lampf 2ð8p4f 2LCsCp 4Cs 3Cp LÞÞ
þ16p4L2Cs2f 4 þ 4p2R2Lampf 2ðCs2 þ Cp2Þ þ 1
( )
ð10Þ
Cs ¼
8p3f 3Cp3R3Lamp þ 2pfCpRLampð1 A2Þ
þA ðp
4p2f 2Cp2R2Lamp þ 1 A2Þ
2pfRLampðA2 4p2f 2R2LampCp2Þ ð11Þ
Based on (11), (9) becomes
L ¼
8p3f 3Cp4R5Lamp þ 2pfCp2R3
Lampð1 A2ÞþA2 þ 2CpR2
LampAð4p2f 2Cp2R2Lamp þ 1 A2Þ
ð2pfCpRLampAð4p2f 2Cp2R2Lamp þ 1 A2Þ þ A2
n oðð8p3f 3Cp3R3
Lamp þ 2pfCpRLampð1 A2ÞþAð4p2f 2Cp2R2
Lamp þ 1 A2Þð12Þ
Based on the equation of the input impedance in the SPRT,the value of the resonant frequency can be derived, asshown in (13) and (14).
Ziðf Þ ¼ j2pfLþ 1
j2pfCsþ
R1
j2pfCp1
j2pfCp þ Rð13Þ
At the resonant frequency, the imaginary part is zero, so
fr ¼
CpR2LampðCp þ CsÞ LCs
þ L2Cs2 þ 2LCsCpR2LampðCp CsÞ
n
þCp2R4LampðCsþ CpÞ2
o12
8p2LCsCp2R2Lamp
26666666666664
37777777777775
ð14Þ
where fr is the resonant frequency.Using (6), (11), (12) and (14), Fig. 7 shows the relation-
ship between the phases of Vc/Vi at the resonant frequencyand the capacitance Cp in the steady state, where RLamp,three gains and four operating frequencies are, respectively,225O, 0.5, 1, 2, 3, 50kHz, 75kHz and 100kHz. In Fig. 7, atthe resonant frequency, the phase of Vc/Vi is only slightlyaffected by the design of the operating frequency, but isgreatly impacted by the gain of the ratio Vo/Vi. Therefore,with a larger gain requirement, the phases of Vc/Vi at theresonant tend to 901. Additionally, with smaller values ofCs, the phases of Vo/Vi at the resonant also tend to 901.
3 Design of resonant tank
The proposed electronic ballast for use with fluorescentlamps will be designed with a suitable resonant tank. Thespecifications for this ballast are given in Table 1. Thecircuit input voltage is a 110V, 60Hz AC, and an Fl36dfluorescent lamp [9], whose equivalent resistance is 225O atsteady state. As shown in Fig. 3, the AC/DC rectifier iscomposed of a full-bridge rectifier without power-factorcorrection (PFC) [10]. The DC/AC inverter is composed ofa half-bridge inverter, where the gate signals of the switchesare symmetrically square waveforms with a duty cycle of0.5.
0
−20
− 40
− 60
− 80
− 90
phas
e of
Vi t
o V
c at
res
onan
t fre
quen
cy, d
eg
1 10 100 1
Cp, nF
Vo
Vi= 0.5
VoVi
= 1
Vo
Vi= 2
Vo
Vi= 3
Fig. 7 Relationships between the phases of Vc/Vi at the resonantfrequency and Cp in the steady state with different levels of voltagegainRLamp¼ 225O
672 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
Referring to Fig. 3, the 110V, 60Hz AC input voltage isrectified to a 156V DC for driving the DC/AV inverter.Thus, the square waveform, whose duty cycle is 0.5, isgenerated by switching the 156V direct current in the half-bridge switches. To simplify the analysis of resonant tanks,the fundamental waveform of the input voltage in theresonant tank is a 70V sine wave. Based on thespecifications, as shown in Table 1, the output voltage inthe lamp is calculated to be 90V. To provide sufficientoutput voltage, the voltage gain must be at least 1.3.Additionally, owing to the existence of parasitic resistancesand thermal losses in the circuit, there has to be enough of again margin to avoid an insufficient level of output voltage.Therefore, the voltage gain at the resonant frequency of50kHz is 3. Thus the gain margin is 1.7.
Referring to Fig. 7, the bold curve of the voltage gain 3shows that the phase at the resonant frequency (of between701 and 851 with an RLamp of 225O and with differentvalues of Cp) is able to achieve approximately 901. Thus,locking the phase difference to be 901 in the Vc/Vi of theSPRT is adequate for the electronic ballast proposed in thispaper.
In the SPRT, the phase of Vc/Vi at the resonantfrequency changes with different values of Cp, as shownin Fig. 8, where A is 3, and Cs and L are determined by (11)and (12), respectively. As shown in Fig. 8, smaller values ofCp are necessary in order for the resonant frequency to betracked. Unfortunately, the value of inductance L is largerfor a smaller Cp, as shown in Fig. 9, which shows therelationship between L and Cp, where A is 3, and Cs and Lare determined by (11) and (12), respectively. Additionally,a smaller Cs is necessary with a small Cp, as shown inFig. 10, which shows the relationship between Cs and Cp,where A is 3, and Cs and L are determined by (11) and (12),respectively.
The parameters of the SPRT can be designed accordingto the preceding analysis, as shown in Table 2. The phase ofVi to Vc at the resonant frequency is nearly 801 in thesteady state. Although, the phase 801 is close to 901, thebias voltage in the VCO of the PLL is smaller than others.Additionally, from the standpoint of input impedance, thePF of cos(101) is higher than for other cases. Besides, theresonant frequency at the steady state is very close to50kHz. Using the parameters shown in Table 2, thefollowing paragraphs will analyse all components in termsof voltage and current stresses.
The relationships between the gain of Vo/Vi and thephase of Vc/Vi are shown in Fig. 11. The gain of Vo/Vi is 3at the resonant frequency with an RLamp of 225O.Therefore, the current-regulator circuit limits to 0.4A thecurrent that flows through RLamp; so the gain of Vo/Vi willbe adjusted to 1.3, which means that the switchingfrequency will be about 57.7kHz, as shown in Fig. 11.Therefore, the phase of Vc/Vi is about 1481.
Table 1: Specification for the proposed electronic ballast
Specification Values
Circuit input voltage 110VRMS 60Hz AC
Lamp power 36W
Lamp voltage 90V AC
Lamp current 400mA
Lamp equivalent resistance 225O
Input voltage of the resonant tank 70VRMS AC
Required voltage gain 1.3
Resonant frequency 50kHz
Voltage gain at resonant frequency 3
−90
−70
−80
Vc Vi
(fr )
, deg
ree
∠
40n 40.5n 41.5n 42.5n41n 42nCp, F
Fig. 8 Relationships between the phases of Vc/Vi at the resonantfrequency and Cp in the steady state
100m
10m
1m
0.1m
L (H
)
40n 41n 42n40.5n 41.5n 42.5n
Cp, F
Fig. 9 Relationship between Cp and L
1m
100u
100n
10u
10n
0.1n
1u
1n
40n 41n 42n40.5n 41.5n 42.5n
Cp, FC
s, F
Fig. 10 Relationship between Cp and Cs
Table 2: Parameters of the SPRT
SPRT
Phase of Vo/Vi at resonant frequency 80.71
L 0.491mH
Cs 39.5nF
Cp 40.6nF
Resonant frequency (RLamp¼225O) 49kHz
Resonant frequency (Rlamp¼1MO) 50.7kHz
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 673
The voltage and current stresses on all components canbe calculated using Kichhoff’s voltage law and Kichhoff’scurrent law. The results are shown in Table 3. Based on thisresult, all components will be implemented.
4 Experimental results
In this work, by use of a PLL IC (CD4046) [11], theswitching frequency of the SPRT is limited within a certainrange in order to achieve accurate 901-phase locking.Although the phase at the resonant frequency is onlyapproximately 801, the error of 101 can be offset by a biasvoltage in the input of the VCO.
Referring to Table 2, in the SPRT, the resonantfrequencies at the ignition and in the steady state are50.7kHz and 49kHz, respectively. Additionally, fromFig. 11 and Table 3, the switching frequency in the steadystate is adjusted to be 57.7kHz with the current-regulatorcircuit. Therefore, the frequency range of the VCO is limitedto between 40kHz and 70kHz.
When the lamp is driven in the steady state, as shown inFig. 12, in which the switching frequency is about 56.8kHz,the phase difference between Vc and Vi in the steady state,as shown in Fig. 13, is about1461. This result is consistentwith the previous analysis given in Fig. 11.
Different levels of input AC voltage (110V720%) areapplied in order to determine the effects in the lamp. Asshown in Figs. 14–17, the values of lamp voltage andcurrent approach the same values, regardless of the valuesof the input AC voltage. However, the efficiency, includingthe power losses in the linear power supply used in the logic
10.0
7.5
5.0
2.5
0
Rlamp= 1Mohm
Rlamp= 225 ohm
Vc
Vi
Vo
Vi
Rlamp= 1Mohm
Rlamp= 225 ohm
40 k 50 k 57.7 k 60 k4.5 104 5.5 104
frequency, HZ
frequency, HZ
40 k 50 k 57.7 k 60 k
0°
−90°
−180°
−148°
Fig. 11 Gain of Vo/Vi and the phase of Vc/Vi
Table 3: Voltage and current stresses on all components ofthe SPRT
fSW 57.7kHz
VR Lamp 90.8VRMS
IR Lamp 0.403ARMS
VL 250VRMS
IL 1.4ARMS
VCS 97.8VRMS
ICS 1.4ARMS
VCP 90.8VRMS
ICP 1.34ARMS
lam
p vo
ltage
, Vla
mp
curr
ent,
A
93.5 V(RMS)
time
0.4 A(RMS)
Fig. 12 Lamp voltage and current in the steady stateInput AC voltage¼ 110VRMSSwitching frequency¼ 56.8kHzLamp voltage: 100V/divisionLamp current: 0.5A/divisionTime base: 10ms/division
Vi
VC
146°phase difference
Vin(50V/div); Vc(200V/div); time base(10 µs);switching frequency = 56.8 kHz
time
Fig. 13 Waveforms of Vc and Vi in the steady stateVin: 50V/divisionVc: 200V/divisionTime base: 10ms/divisionSwitching frequency: 56.8kHz
100
95
9090 100 110 120 130
lam
p vo
ltage
, V
input AC voltage, V
Fig. 14 Lamp-voltage variation with different input AC voltages(110 V720%)
674 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
and driver circuitry, decreases with increase in input powerbecause of the losses in the circuit.
As for the crest factor [13], the waveforms of VDC bus andthe lamp’s current in the steady state are shown in Fig. 18,in which the crest factor is 1.46. Additionally, with differentlevels of input AC voltage (110V720%), variation of crestfactor is as shown in Fig. 19. This result shows that the crestfactors are lower than the maximum limit of 1.7.
As illustrated in Fig. 20, which shows the process of lampignition, the lamp is ignited instantaneously.
By using variable resistances instead of the lamp load atthe steady state, the results for the same input voltage of110VMS are shown in Figs. 21–24. With the current-regulator circuit, the output currents approach the samemagnitude, regardless of the values of Rload. However, theoutput voltage and power increase with incrementalincreases in Rload. Additionally, with different values ofRload, the efficiency is approximately 80%, which includes
400
395
39090 100 110 120 130
input AC voltage, V
lam
p cu
rren
t, m
A
Fig. 15 Lamp-current variation with different input AC voltages(110 V720%)
input AC voltage, V
50
40
45
3590 100 110 120 130
pow
er, W
lamp power input power
Fig. 16 Variations of lamp power and input power with differentinput AC voltages (110 V720%)
90
80.0
77.5
75.0100 110 120 130
effic
ienc
y, %
input AC voltage, V
Fig. 17 Efficiency variation with different input AC voltages(110 V720%)
0.4 A (RMS)1.17 A (peak-peak)crest factor = 1.46
lampcurrent
VDC bus
Fig. 18 Relationship between VDC bus and lamp currentInput AC voltage: 110V RMSSample rate: 20M sample/sVDC bus: 50V/divisionLamp current: 0.4A/divisionTime base: 10ms
2.0
1.0
1.5
90 100 110 120 130
input AC voltage, V
cres
t fac
tor
Fig. 19 Crest-factor variation with different input AC voltages(110 V720%)
Vlamp
Ilamp
Vlamp(500 V/div) ; Ilamp(1 A/div) ; time base (5 ms)
Fig. 20 Lamp ignition
120
100
80
60
40137 152 190 201 237 262 283
Rload, Ω
lam
p vo
ltage
, V
Fig. 21 Output-voltage variation with Rload (around225O730%)
400
395
390
Rload, Ω
lam
p cu
rren
t, m
A
137 152 190 201 237 262 283
Fig. 22 Output-current variation with Rload (around225O730%)
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 675
the power losses in the linear power supply used in the logicand driver circuitry.
These experimental results have verified the analysis anddesigns discussed in Section 3. With sufficient gain margins,the lamp voltage and current can be supported withdifferent levels of input AC voltage, regardless of variationsof Rload or other components in the circuits. In addition,based on the PLL control, the lamp can be startedinstantaneously. Therefore, with the procedure describedin Section 3, the different specifications of the ballast, inwhich the resonant frequency of the circuit is continuouslytracked by the PLL, can easily be designed. Additionally,for the Vc/Vi in the SPRT, locking the phase difference at901 has the best effect in terms of tracking the resonantfrequency. Since the prototype circuit does not have thefront-end power-factor-correction converter, its measuredinput power factor is 0.53. Fig. 25 shows the measuredinput-current harmonics of the prototype circuit, comparedwith the IEC 61000 Class-C Standard.
5 Conclusions
This paper has proposed an electronic ballast for use withthe SPRT in which the resonant frequency is continuouslytracked by the PLL. According to the phase characteristicsof the SPRT, by using the SPRT, the PLL is adjusted withthe least bias voltage for locking to 901, the phasedifference of Vc/Vi in the resonant tank. The power-factorof the input impendence is close to unity when the phase ofVc/Vi is locked close to 901.
The voltage gain of the resonant tank at the resonantfrequency must be carefully designed. Because of variationsin the input AC voltage and the load, if the gain margin inthe circuit is relatively large, sufficient voltage gains canmaintain the lamp current. However, because of the highgain margin, the PF of the resonant tank will be relativelylow. If the gain margin in the resonant tank is small, thevoltage gain will be insufficient to ignite the lamp andmaintain the lamp current. Besides, based on the smallergain margin, the load tolerance and the input AC voltagewill be lower.
This paper has used PLL control to implement theballast; this offers high levels of load tolerance and inputAC voltage. Even though the input AC voltage hasvariations of 20%, the lamp current is still accuratelycontrolled by the regulator circuit. Additionally, theproposed ballast not only endures 30% variations in Rload,but also maintains the rated currents in Rload. In addition,whatever the input AC voltage, the crest factor is alwayslower than 1.7, which is necessary for extending the lifetimeof the lamp. As for the ignition, by tracking the resonantfrequency, an adequate voltage gain can be provided duringthis period; thus the lamp can be started instantaneously.During operation of the proposed ballast, the efficiency isaround 80%.
6 Acknowledgments
This work was partially sponsored by the National ScienceCouncil, Taiwan, ROC, under awards NSC 92-2213-E-006-087 and NSC 93-2213-E-006-138.
7 References
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11 CD4046BC data sheet, Fairchild Semiconductor Corporation, 200212 Cayless, M.A., and Marsden, A.M.: ‘Lamps and lighting’ (Edward
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Taiwan Patent application 093118006, 21 June 2004
Rload, Ω
output power input power
pow
er, W
60
40
20137 152 190 201 237 262 283
Fig. 23 Variations in input power and output power with Rload
(around 225O730%)
85.0
75.0
80.0
137 152 190 201 237 262 283
effic
ienc
y, %
Rload, Ω
Fig. 24 Efficiency variation with Rload (around 225O730%)
100
90
80
70
60
50
40
30
20
10
0
inpu
t-cu
rren
t har
mon
ics,
%
1 2 3 4 5 6 7 8 9 10 11 12 13
harmonicsIEC 61000 class-C
Fig. 25 Measured input-current harmonics of the prototype circuit
676 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005