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Pipelining Principles
Prof. Sirer
CS 316
Cornell University
Meet the Cast
Alice
Meet the Cast
Alice
Bob
Meet the Cast
Alice
Bob
They don’t like each other!
The Laundry
Four sequential tasks
Laundry Room Design #1
A large room with a one entry-door and one exit-door
Laundry Room Design #1
First Alice owns the room
Laundry Room Design #1
First Alice owns the room
Bob can enter as soon as she is done
No possibility for Alice and Bob to fight
Laundry Room Design #1
Elapsed Time for Alice: 4Elapsed Time for Bob: 4Elapsed Time for both: 8A better laundry room can improve utilization and speed up task completion
Time
Laundry Room Design #2
Elapsed Time for Alice: 4Elapsed Time for Bob: 4Elapsed Time for both: 5!!!
Time
Laundry Room Design #2
The room is partitioned into stagesOne person owns a stage at a time, the room can hold up to four people simultaneously
Laundry Room Design #2
Alice
Laundry Room Design #2
Bob Alice
Laundry Room Design #2
Bob AliceCharlie
Laundry Room Design #2
Bob AliceCharlieDave
ImplicationsPrinciple: Latencies can be masked by running isolated operations in parallel
Need mechanisms for isolation
Need mechanisms for handling dependencies between tasks
Let’s apply this principle to processor design…
MIPS Processor
Functional decomposition of our processor
A MIPS Pipeline
Pipeline stages for a MIPS processor
Pipeline Isolation
Latches between pipeline stages hold the values for the stage to operate on
Latches and register file are triggered on opposite edges of the clock
Pipeline Logic
Additional latches required to store the instruction for each pipeline stage
Copy the instruction forward, generate local control signals separately in each pipeline stage
Pipelining for Other CircuitsPipelining can be applied to any combinational logic circuit
What’s the circuit latency at 2ns. per gate?What’s the throughput?What is the stage breakdown? Where would you place latches?What’s the throughput after pipelining?Pipelining vs. superpipelining