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Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical...

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EE582 Physical Design Automation of VLSI Circuits and Systems Prof. Dae Hyun Kim School of Electrical Engineering and Computer Science Washington State University Placement
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Page 1: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

EE582 Physical Design Automation of VLSI Circuits and Systems

Prof. Dae Hyun Kim

School of Electrical Engineering and Computer Science Washington State University

Placement

Page 2: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

2 Physical Design Automation of VLSI Circuits and Systems

Metrics for Placement

• Wirelength

• Timing

• Power

• Routing congestion

Page 3: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

3 Physical Design Automation of VLSI Circuits and Systems

Wirelength Estimation

• Half-perimeter wirelength (HPWL)

A W

H

HPWL = W + H B

C D

Page 4: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

4 Physical Design Automation of VLSI Circuits and Systems

Wirelength Estimation

Page 5: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

5 Physical Design Automation of VLSI Circuits and Systems

Placement Algorithms

• Constructive – Min-cut based placement – Force-directed

• Analytical

– Gordian – Kraftwerk

• Iterative improvement

– Simulated annealing (Timberwolf) – Pairwise exchange

Page 6: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

6 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Idea – Cutsize minimization ≈ Reduction of global wires

Partition A Partition B Local connections Global connections

Page 7: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

7 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Partitioning

Page 8: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

8 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Algorithm – Min_Cut_Placement (N, n, C)

/* N: layout n: # cells to be placed n0: # cells in a slot C: connectivity matrix (netlist) */ begin if ( n ≤ n0 ) then place_cells (N, n, C); else (N1, N2) = cut_surface (N); (n1, C1), (n2, C2) = partition (n, C); Min_Cut_Placement (N1, n1, C1); Min_Cut_Placement (N2, n2, C2); end

Page 9: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

9 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example (Quadrature placement) – KL partitioning + Quadrature placement

Page 10: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

10 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Terminal propagation – Dunlop and Kernighan, TCAD’85

• Original min-cut placement algorithm

– Does not consider the locations of terminal pins.

Page 11: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

11 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• What if we swap {1,3,6,9} and {2,4,5,7}?

Page 12: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

12 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Terminal propagation

Page 13: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

13 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Terminal propagation

Page 14: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

14 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Terminal propagation

Page 15: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

15 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Terminal propagation

Page 16: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

16 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 17: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

17 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 18: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

18 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 19: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

19 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 20: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

20 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 21: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

21 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 22: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

22 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 23: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

23 Physical Design Automation of VLSI Circuits and Systems

Min-Cut-Based Placement

• Example

Page 24: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

24 Physical Design Automation of VLSI Circuits and Systems

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Page 25: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

25 Physical Design Automation of VLSI Circuits and Systems

Analytical Placement

• Kraftwerk2 – Spindler, “Kraftwerk2 – A Fast Force-Directed

Quadratic Placement Approach Using an Accurate Net Model”, TCAD’08

Page 26: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength
Page 27: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

27 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Net model – Two-pin nets

• Connectivity matrix

• Ideal wirelength cost function

– Γ = |x1 – x2| + |y1 – y2|

• Quadratic placement – Cost function Γ is quadratic.

Page 28: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

28 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Quadratic cost function – Γ = (x1 – x2)2 + (y1 – y2)2 = Γx + Γy

• Γx: x-component • Γy: y-component

• How can we optimize the cost function?

– 𝜕𝜕Γ𝑥𝑥𝜕𝜕𝑥𝑥1

= 0, 𝜕𝜕Γ𝑥𝑥𝜕𝜕𝑥𝑥2

= 0

– 𝜕𝜕Γ𝑦𝑦𝜕𝜕𝑦𝑦1

= 0, 𝜕𝜕Γ𝑦𝑦𝜕𝜕𝑦𝑦2

= 0

Page 29: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

29 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Example

p1 p2 x

Γ𝑥𝑥 = 𝑥𝑥 − 𝑝𝑝12 + 𝑥𝑥 − 𝑝𝑝2

2

𝜕𝜕Γ𝑥𝑥𝜕𝜕𝑥𝑥 = 0 = 2 𝑥𝑥 − 𝑝𝑝1 + 2 𝑥𝑥 − 𝑝𝑝2

𝑥𝑥 =𝑝𝑝1 + 𝑝𝑝2

2

Page 30: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

30 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Example

p1 p2 x1

Γ𝑥𝑥 = 𝑥𝑥1 − 𝑝𝑝12 + 𝑥𝑥1 − 𝑥𝑥2

2 + 𝑥𝑥2 − 𝑝𝑝22

𝜕𝜕Γ𝑥𝑥𝜕𝜕𝑥𝑥1

= 0 = 2 𝑥𝑥1 − 𝑝𝑝1 + 2 𝑥𝑥1 − 𝑥𝑥2 𝜕𝜕Γ𝑥𝑥𝜕𝜕𝑥𝑥2

= 0 = −2 𝑥𝑥1 − 𝑥𝑥2 + 2 𝑥𝑥2 − 𝑝𝑝2

𝑥𝑥1 =2𝑝𝑝1 + 𝑝𝑝2

3

𝑥𝑥2 =𝑝𝑝1 + 2𝑝𝑝2

3

x2

Page 31: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

31 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• The location of each cell is represented by – (x, y)

• The x-locations of M movable cells

– x = (x1, x2, …, xM)T – Cx: cell-to-cell connectivity matrix – dx: cell-to-pin connectivity matrix (constant)

Γx = 0.5 xTCxx + xTdx + const.

Page 32: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

32 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Wirelength minimization – 𝜕𝜕Γ𝑥𝑥

𝜕𝜕𝑥𝑥1= 0, 𝜕𝜕Γ𝑥𝑥

𝜕𝜕𝑥𝑥2= 0, …, 𝜕𝜕Γ𝑥𝑥

𝜕𝜕𝑥𝑥𝜕𝜕= 0

– i.e., 𝛻𝛻xΓx = Cxx + dx = 0

• where 𝛻𝛻x = ( 𝜕𝜕𝜕𝜕𝑥𝑥1

, 𝜕𝜕𝜕𝜕𝑥𝑥2

, …, 𝜕𝜕𝜕𝜕𝑥𝑥𝜕𝜕

)T

– Net force: Fx

net = 𝛻𝛻xΓx = Cxx + dx

Γx = 0.5 xTCxx + xTdx + const.

Page 33: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

33 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Applying only the net force makes a lot of overlaps.

Page 34: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

34 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Move force – Removes overlaps = spread cells out.

• x: current location (to be computed) • x’: last location • Change in the cell location

– Δx = x – x’

Page 35: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

35 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Density function – Dcell(x, y)

• Cell density at each location

• Move force

– Fx,imove = wi·(xi – xi

o) • xi: current location (to be computed) • xi

o: target location

Density

Page 36: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

36 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Net force

• Move force

Fxnet = Cxx + dx

Fxmove = Cx

o (x – xo) = Cxo (x – x’ + Φx)

Page 37: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

37 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Net force is used for wirelength minimization • Do not collapse the cells back to their initial

locations.

• Hold force

Fxhold = –(Cxx’ + dx)

Page 38: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

38 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

• Final equation Fx

net + Fxmove + Fx

hold = 0 [Cxx + dx] + [Cx

o (x – x’ + Φx)] + [–(Cxx’ + dx)] = 0 (Cx + Cx

o)·(x – x’) = –Cxo·Φx

(Cx + Cx

o)·Δx = –Cxo·Φx

x = x’ + Δx

Page 39: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

39 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

Page 40: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

40 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

Page 41: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

41 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

Page 42: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

42 Physical Design Automation of VLSI Circuits and Systems

Kraftwerk2

Page 43: Placement - eecs.wsu.edueecs.wsu.edu/~daehyun/teaching/2016_EE582/ppt/04-placement.pdf · Physical Design Automation of VLSI Circuits and Systems 2 Metrics for Placement • Wirelength

43 Physical Design Automation of VLSI Circuits and Systems


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