PLDs

What is programmable logic?

CMOS

Logic

uProcessors

uControllers

Standard

LogicProgrammable

Logic

ASIC

Logic Circuits

Standard Logic Circuits

Programmable Logic Circuits

• Realize single function or set of functions, once defined and with no possibility of changing.

• Contains great number of standard logic circuits

• Possibility of realizing many various functions

• Hardware can configure any time user need to only by programming.

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Programmable logic devices available today

• Major programmable logic architecture:

CMOSLogic

uProcessorsuControllers

StandardLogic

ProgrammableLogic

ASIC

SPLD CPLD FPGA

Introduction

• Fixed function digital ICs are classified according to their complexity.

• They are listed here from the least complex to the most complex.

• For example :- SSI, MSI, LSI, VLSI and ULSI.

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Cutaway view of one type of fixed-function IC package showing the chip mounted inside, with connection to input an output pins.

Fixed-Function Integrated Circuits

introduction

• In fixed function devices a specific logic function is contained in the IC package when it is purchased and it can never be changed.

• Another category of logic device is one in which the logic function is programmed by user and, in some cases, can be reprogrammed many times.

• These devices are called programmable logic devices or PLDs.

Introduction

• In many applications the PLD has replaced the hard-wired fixed function logic device.

• However, fixed function is still important and will be around for a long time but in more limited applications.

Introduction

• Advantages: -- Many more logic circuits can be “stuffed” into a

much smaller area with PLDs.- With certain PLDs, logic designs can be easily

changed without rewiring or replacing components.

- A PLD design can be implemented faster than one using fixed function ICs once the required programming language is mastered.

Basic idea

Type of PLDs

• The three major types of programmable logic are :-

1) SPLD (Simple Programmable Logic devices)2) CPLD (Complex Programmable Logic Devices)

and 3) FPGA (Field Programmable Gate Array).

SPLDs

• The least complex form of PLDs.• Can typically replaced several fixed function SSI or

MSI devices and their connections.• A typical package has 24 to 28 pins.• A few categories of SPLD are listed below:- - PAL (Programmable Array Logic)- GAL (Generic Array Logic)- PLA (Programmable Logic Array)- PROM (Programmable Read-Only Memory)

CPLDs

• Much higher capacity than SPLDs, permitting more complex logic circuits to be programmed into them.

• A typical CPLD is the equivalent of from 2 to 64 SPLDs and come in 44 pins to 160 pin packages depending on the complexity.

• There are several forms of CPLD, which vary in complexity and programming capability.

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Typical CPLD packages.

CPLDs are made using 2 to 64 SPLDs

Types of CPLD

FPGA

• Different from SPLD and CPLD.• Have the greatest logic capacity.• Consist of an array of anywhere from 64 to

thousands of logic gates groups that are sometimes called logic blocks.

• Two basics classes of FPGA are course grained and fine grained.

• FPGAs come in packages ranging up to 1000 pins or more.

PLD Programming

• A logic circuit design for a PLD is entered using one of two basic methods:-

- Schematic Entry- Text based Entry.

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In order to program a PLD, the following items are required:· PLD – there are numerous manufacturers of PLD’s. They come in various sizes with

internal structures that are equivalent to hundreds, thousands, or tens of thousands of equivalent gates.

· PLD programming software – this software allows the user to specify exactly how the circuit should perform. Functions might be specified in terms of truth table, Boolean expressions, state equations, and by several other methods. The PLD programming software would compile the information and produce a JEDEC file , which is essentially an industry standard binary file containing information on how to make connections within a given PLD. There are numerous brands of PLD programming software, including PLDShell, MAX PLUS II, PSPICE, ABEL, CUPL, XILINX, ORCAD, and many others.

· PLD programmer – this piece of hardware might contain a universal socket that could hold various types of PLD’s. The PLD software produces a JEDEC file which is downloaded into the programmer. The programmer can typically program, copy, erase, and verify the contents of PLD’s.

Computer with PLD programming software

JEDEC file downloaded

PLD Programmer

PLD inserted into socket

Review

1. What does PLD stand for?2. What does SPLD stand for?3. What does CPLD stand for?4. What does FPGA stand for?5. Basically, how does a CPLD differ from a

SPLD?6. List two ways in which a logic design can be

entered for PLD programming.

Review

7. List 4 SPLDs.8. What is the difference between a PAL and a

PLA?

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Generalized PLDA generic PLD for implementing SOP functions has:

Inverter/bufferarray for inputs AND array OR array

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PLD’s Compared

PROM Fixed at factory Programmable by customer

PLA Programmable by Programmable by customer customer

PAL Programmable by Fixed at factoryor GAL customer

Type AND array connections OR array connections

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PLD Logic Capacity

• SPLD: about 200 gates• CPLD

– Altera FLEX (250K logic gates)– Xilinx XC9500

• FPGA – Xilinx Vertex-E ( 3 million logic gates)– Xilinx Spartan (10K logic gates)– Altera

Programmable Logic Devices (PLDs)

FixedAND array(decoder)

ProgrammableOR array

Programmableconnections OutputsInputs

Programmable read-only memory (PROM)

ProgrammableAND array

FixedOR array

Programmableconnections OutputsInputs

Programmable array logic (PAL) device

Programmable logic array (PLA)

ProgrammableAND array

ProgrammableOR array

Programmableconnections OutputsInputs

Programmableconnections

All use AND-OR structure- differ in which is programmable

Ahmad Almulhem, KFUPM 2010

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Programmable Symbology

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PROM

representation using gates simplified representation

Note: This PROM has 4 memory locations of 4 bits each

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PLA

representation using gates simplified representation

Programmable Logic Array (PLA)

• AND array and OR array are programmable

• XOR is available to complement an output if needed

• Example:• 3 inputs/2 outputs• F1 = A B’ + A C + A’ B C’• F2 = (AC + BC)’

Ahmad Almulhem, KFUPM 2010

Source: Mano’s textbook

Programmable Array Logic (PAL)

• Fixed OR array and programmable AND array• Opposite of ROM

• Feed back is used to support more product terms

• AND output can not be shared here!

• Example:• 4 inputs/4 outputs with fixed 3-

input OR gates• W = A B C’ + A’ B’ C D’• X = ?• Y = ?• Z = ?

Ahmad Almulhem, KFUPM 2010Source: Mano’s textbook

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PAL Logic Diagram

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PROM Design Example

Use a PROM to implement an:• inverter F1 = A• OR F2 = A+B• NAND F3 = A·B• XOR F4 = AB

A B F1 F2 F3 F40 0 1 0 1 00 1 1 1 1 11 0 0 1 1 11 1 0 1 0 0

Truth table is transferreddirectly to the PROM grid.

Field Programmable Gate Array (FPGA)

• Xilinx FPGAs• Configurable Logic

Block (CLB)• Programmable logic

and FFs• Programmable

Interconnects• Switch Matrices• Horizontal/vertical lines

• I/O Block (IOB)• Programmable I/O pins

Ahmad Almulhem, KFUPM 2010

Source: Mano’s textbook

Field programmable gate arrays

– a programmable device using more complex cells

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FPGA Vendors & Device Families

• Xilinx– Virtex-II/Virtex-4: Feature-

packed high-performance SRAM-based FPGA

– Spartan 3: low-cost feature reduced version

– CoolRunner: CPLDs• Altera

– Stratix/Stratix-II• High-performance SRAM-

based FPGAs– Cyclone/Cyclone-II

• Low-cost feature reduced version for cost-critical applications

– MAX3000/7000 CPLDs– MAX-II: Flash-based FPGA

• Actel– Anti-fuse based

FPGAs• Radiation tolerant

– Flash-based FPGAs• Lattice

– Flash-based FPGAs– CPLDs (EEPROM)

• QuickLogic– ViaLink-based

FPGAs

Special FPGA functions

• Internal SRAM• Embedded Multipliers

and DSP blocks• Embedded logic analyzer• Embedded CPUs• High speed I/O (~10GHz)• DDR/DDRII/DDRIII SDRAM

interfaces• PLLs

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Overview of manufactures

Altera31.5%

Xilinx30.3%

Lattice9.9%

Vantis9.8%

Actel7.4%

Lucent4.8%

Others0.6%

Phillips0.7%

QuickLogic1.4%

Atmel1.7%

Cypress1.9%

• Market in 1998: