+ All Categories
Home > Documents > PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives...

PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives...

Date post: 06-Aug-2020
Category:

Documents
Upload: others
View: 4 times
Download: 0 times
Download Report this document
Share this document with a friend
19
PolarFire SoC – AMP-capable solution for both deterministic real-time and rich OS support Vishakh Rayapeta, Sr. Staff Applications Engineer March 13, 2019
Transcript
Page 1: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

PolarFire SoC – AMP-capable solution for both deterministic real-time and rich OS support

Vishakh Rayapeta, Sr. Staff Applications Engineer

March 13, 2019

Page 2: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

2

Award-winning PolarFire FPGA as an SoC platform

Proven Security

Defense-grade security

DPA safe Crypto coprocessor

Built-in anti-tamper

Exceptional Reliability

SEU immune configuration

Block RAM with ECC

Extended temperatures

Lowest Power

Low static power technology

Power optimized transceivers

Up to 50% lower than SRAM FPGAs Control Plane

Signal

Processing

Video & Image

Processing Hardware

Acceleration

10G Bridging &

Aggregation

Low Power

Optics Portable

Equipment

Page 3: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

3

Real-time Linux?

Wide spread Linux adoption Rich OS with thousands of applications to choose from

Requirements still exist for real-time while running Linux Safety-critical

- The ability to deterministically monitor the execution environment

Real-time system control

- Completing tasks deterministically, on time every time

Securing the IoT

- Execute a trusted execution environment deterministically for consistent results

Working with our partner, SiFive Architected a complex SoC FPGA that provides determinism and a rich

OS within the same multi-core CPU cluster

Page 4: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

4

What is Real-time? Subjective concept

• Perception of the system reacting immediately to user inputs

• System reacts within x milliseconds to an external input: • Usually

• Most of the time

• All the time, otherwise

• The system fails

• The system can become damaged

• Somebody might get hurt

The system is able to control a physical process at a speed suitable to the process under control

What we usually mean by Real Time is Determinism

Page 5: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

5

Determinism

Periodic Interrupts - T0 = T1

Consistent Execution Times - E0 = E1 = E2

T0 T1

Main()

ISR

Main()

ISR

Main()

ISR

E0 E1 E2

Page 6: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

6

Standard Application Processor

• Memory Hierarchy

• L1 cache

• L2 cache

• DDR memory

• Micro-architecture

performance enhancement

features

Core 1

Core 2

Core 3

Core 4

L2 cache

L1 cache L1 cache L1 cache L1 cache

DDR4

Page 7: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

7

Memory Hierarchy and Determinism

Cache misses affect determinism Retrieving data from DDR is non-

deterministic

Accessing to L2 cache is non-deterministic

L1 L1 L1

L2

L1 cache miss

L2 cache miss

L1 L1 L1

L2

DDR

L1 L1 L1

time

L1 cache miss

Core 1 Core 2 Core 3 Core 4

L2 cache

L2 cache

L1 cache L1 cache L1 cache L1 cache

Interconnect

Page 8: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

8

Measured ISR Execution Time in a Quad Core CPU

SMP 1 SMP 2 SMP 3 SMP 4

L2 cache

L2 cache

L1 cache L1 cache L1 cache L1 cache

DDR

L1 L1 L1

L2

L1 cache miss

L2 cache miss

L1 L1 L1

L2

DDR

L1 L1 L1

time

L1 cache miss

5332800

5333000

5333200

5333400

5333600

5333800

5334000

5334200

Execution Time Variability

Page 9: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

9

Background - Foreground

L2-LIM

L1-TIM

L2-LIM

time

interrupt

Classic real-time system

• Infinite background loop executes main application code

• Time-critical code is executed as a result of an interrupt

Core 1 Core 2 Core 3 Core 4

L2-LIM

L2 cache

L1-TIM L1-TIM L1-TIM L1-TIM

Deterministic Path

Page 10: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

10

PolarFire SoC Flexible Memory Subsystem

Configurable L1 memory subsystem

• As cache

• As a tightly integrated memory

Configurable L2 memory subsystem

• As a cache

• As a scratchpad memory

• As a Loosely Integrated Memory (LIM)

• Direct addressing of memory

Core 1

Core 2

Core 3

Core 4

L2

$, Scratchpad, LIM

L1 $/TIM L1 $/TIM L1 $/TIM L1 $/TIM

DDR4

Page 11: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

11

Flexible Memory Subsystem Provides ISR Determinism

SMP 1 SMP 2 SMP 3 RT1

L2 cache

L2 cache

L1 cache L1 cache L1 cache TIM

DDR

LIM

L2-LIM

L1-TIM

L2-LIM

time

interrupt

4989880

4989900

4989920

4989940

4989960

4989980

4990000

ISR

Cycle

s

Periodic Interrupts

Execution Time Variability

Page 12: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

12

Micro-Architecture Also Impacts Determinism

5722600

5722800

5723000

5723200

5723400

5723600

5723800

5724000

ISR

Cycle

s

Periodic Interrupts

Execution Time Variability SMP 1 SMP 2 SMP 3 RT1

L2 cache

L2 cache

L1 cache L1 cache L1 cache TIM

DDR

LIM

L2-LIM

L1-TIM

L2-LIM

time

interrupt

Disable branch predictor during critical code execution, or permanently

Page 13: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

13

Coherent Message Passing in AMP systems

L2 cache for SMP cluster

L2 LIM for real-time

L2 scratchpad for coherent

message passing

SMP 1 SMP 2 SMP 3 RT 1

L 2 cache

L 2 cache

L 1 cache L 1 cache L 1 cache TIM

DDR

LIM Coherent Message Buffers

Page 14: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

14

PolarFire SoC: RISC-V Enabled Innovation Platform

Freedom to Innovate in

• Linux and real-time

• Securely connected IoT systems

• High-rel safety-critical systems

• Thermal and power-constrained systems

Page 15: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

15

New Mi-V Embedded Experts Network

Freedom to Engage with the Mi-V Ecosystem

Page 16: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

16

Free rapid software development and debug

capabilities without hardware

Complete PolarFire SoC processor subsystem

model

Freedom to Start Software Development

Page 17: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

17

HiFive Unleashed Development Board HiFive Unleashed Expansion Board

PolarFire SoC Embedded Experts Development Kit

Freedom to begin hardware development

Page 18: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

18

Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by

enabling Linux and deterministic architectures in novel ways

First SoC FPGA with deterministic, coherent CPU cluster and a deterministic L2 memory subsystem enabling Linux + real-time applications

First SoC FPGA architecture integrating a RISC-V processor subsystem and low-power FPGA technology

PolarFire SoC addresses the industry’s need for a mid-range, low-power SoC FPGA with high levels of security and reliability

Developers can begin development today

antmicro Renode platform for software development

PolarFire SoC Embedded Experts Development Kit for hardware development

New Mi-V Embedded Experts Network

Page 19: PolarFire SoC AMP-capable solution ... - RISC-V International · 18 Summary PolarFire SoC gives designers the freedom to create innovative low-power systems by enabling Linux and

THANK YOU


Recommended
RISC-V SoC FPGA Brings Real-Time to Linux Presenter ... · FPGA BU – Embedded Strategy To be the leading provider of programmable RISC-V solutions Highly differentiated, open ISA

RISC-V SoC FPGA Brings Real-Time to Linux Presenter ... · FPGA BU – Embedded Strategy To be the leading provider of programmable RISC-V solutions Highly differentiated, open ISA

Documents

UG0758: PolarFire FPGA Design Flow User Guide · Figure 3 · HDL vs. Netlist Flow File Types in Libero SoC When you create a new project in Libero SoC it automatically creates new

UG0758: PolarFire FPGA Design Flow User Guide · Figure 3 · HDL vs. Netlist Flow File Types in Libero SoC When you create a new project in Libero SoC it automatically creates new

Documents

SoC Level Analytics, Trace & Debug for RISC-V Designs...SoC Level Analytics, Trace & Debug for RISC-V Designs Rupert Baines, CEO, UltraSoC rupert.baines@ultrasoc.com RISC-V Technical

SoC Level Analytics, Trace & Debug for RISC-V Designs...SoC Level Analytics, Trace & Debug for RISC-V Designs Rupert Baines, CEO, UltraSoC [email protected] RISC-V Technical

Documents

PolarFire SoC MSS TRM - Microsemi

PolarFire SoC MSS TRM - Microsemi

Documents

UG0726 User Guide PolarFire FPGA Board Design

UG0726 User Guide PolarFire FPGA Board Design

Documents

MicroSemi PolarFire FPGA the Avalanche Board with Open ...Running a Linux-Capable Open Source Soft SoC on the Avalanche Board with MicroSemi PolarFire FPGA RISC-V Summit, Dec 3 2018

MicroSemi PolarFire FPGA the Avalanche Board with Open ...Running a Linux-Capable Open Source Soft SoC on the Avalanche Board with MicroSemi PolarFire FPGA RISC-V Summit, Dec 3 2018

Documents

PolarFire® SoC Product Overview

PolarFire® SoC Product Overview

Documents

Building Custom RISC-V SoCs in Chipyard · •Create a heterogeneous BOOM and Rocket RISC-V SoC •Learn how to generate Verilog for an SoC •Learn how to run VerilatorRTL simulations

Building Custom RISC-V SoCs in Chipyard · •Create a heterogeneous BOOM and Rocket RISC-V SoC •Learn how to generate Verilog for an SoC •Learn how to run VerilatorRTL simulations

Documents

PolarFire SoC FPGAs

PolarFire SoC FPGAs

Documents

State of the Union - RISC-V...SoC es Berkeley World RISC-V You are here User ISA v1.0, Raven-1 tapeout (28nm), RVC MS thesis 8 th shop 1 st al SoC Modest RISC-V Project Goal 5 Become

State of the Union - RISC-V...SoC es Berkeley World RISC-V You are here User ISA v1.0, Raven-1 tapeout (28nm), RVC MS thesis 8 th shop 1 st al SoC Modest RISC-V Project Goal 5 Become

Documents

ARM Based SoC verification v1 - T&VS€¢ ARM based SoC Verification challenges ... • RISC processor cores for portable devices and mobile ... • Pre-empts verification done with

ARM Based SoC verification v1 - T&VS€¢ ARM based SoC Verification challenges ... • RISC processor cores for portable devices and mobile ... • Pre-empts verification done with

Documents

RISC-V “Rocket Chip” SoC Generator in Chisel · RISC-V “Rocket Chip” SoC Generator in Chisel Yunsup Lee UC Berkeley yunsup@eecs.berkeley.edu. ... code FPGA Verilog ASIC Verilog

RISC-V “Rocket Chip” SoC Generator in Chisel · RISC-V “Rocket Chip” SoC Generator in Chisel Yunsup Lee UC Berkeley [email protected]. ... code FPGA Verilog ASIC Verilog

Documents

PolarFire FPGAs - Microsemi

PolarFire FPGAs - Microsemi

Documents

RT PolarFire: Building RISC-V Processor Subsystem

RT PolarFire: Building RISC-V Processor Subsystem

Documents

Energy Efficient Digital Frontend Designs With PolarFire ...

Energy Efficient Digital Frontend Designs With PolarFire ...

Documents

Libero SoC PolarFire v2.1 Release Notes · • BSDL files generated using Libero SoC PolarFire v2.1 are now compliant with IEEE standard 1149.6 as well as 1149.1. Silicon Features

Libero SoC PolarFire v2.1 Release Notes · • BSDL files generated using Libero SoC PolarFire v2.1 are now compliant with IEEE standard 1149.6 as well as 1149.1. Silicon Features

Documents

PolarFire® FPGA and PolarFire SoC FPGA Programming User …

PolarFire® FPGA and PolarFire SoC FPGA Programming User …

Documents

Embedded Software Development for RISC-V Based SoC RISC …Embedded Software Development for RISC-V Based SoCs Embedded Software Development for RISC-V Based SoC. Page §2 MINRES Technologies

Embedded Software Development for RISC-V Based SoC RISC …Embedded Software Development for RISC-V Based SoCs Embedded Software Development for RISC-V Based SoC. Page §2 MINRES Technologies

Documents