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Power Amplifier Design

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Power Amplifier Design
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2.4GHZ POWER AMPLIFIER DESIGN (Using MGA-43228 ICs) 1 The steps design for Power Amplifier 1.1 Step 1: Calculate DC bias and DC supply Figure 1 Avago RF amplifier MGA-43228 pin configuration and internal block diagram 1.1.1 Power supply Select normal gain mode: V dd 1 =V dd 2 =V dd 3 =V bias =5 V,V byp =0 V I dd1 =50 mA,I dd2 =180 mA,I dd3 =270 mA , I bias =26.5 mA
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Page 1: Power Amplifier Design

2.4GHZ POWER AMPLIFIER DESIGN(Using MGA-43228 ICs)

1 The steps design for Power Amplifier

1.1 Step 1: Calculate DC bias and DC supply

Figure 1 Avago RF amplifier MGA-43228 pin configuration and internal block diagram

1.1.1 Power supplySelect normal gain mode: V dd 1=V dd 2=V dd 3=V bias=5V ,V byp=0V

I dd 1=50mA , Idd 2=180mA , I dd 3=270mA , I bias=26.5mA

Page 2: Power Amplifier Design

V c 1, V c 2 and V c 3 are bias pins that are used to set the bias conditions to the 3 internal gain stages

of the PA. V c 1, V c 2 and V c 3 supplied through V c=2.1V pin on demonstration board with R2=1.2kOhm , R3=300Ohm and R4=1.2kOhm .

Page 3: Power Amplifier Design

1.1.2 NoteThe MGA-43228 has a specific turn-on and turn-off procedure to prevent damage to the amplifier. A higher voltage at the V c pins than at the V bias pin will cause a high current DC short at the V c pins. The turn-on and turn-off sequence is shown in figure below. The final step in the turn-on procedure where bias is applied to V byp is only used when the low-gain mode is desired.

1.2 Step 2: Small-signal s-parameter calculation

1.2.1 Calculate stable parameter (Stability)

1.2.1.1 S-parameter of MGA-43228 ICsWe are using bandwidth from 2.4 GHz to 2.5GHz. So, we will calculate at 2.450 GHz frequency. With polarization conditions as at step1 section:

V dd 1=V dd 2=V dd 3=V bias=5V ,V byp=0V ,V c=2.1V

Page 4: Power Amplifier Design

S-parameter at 2.44628 GHz frequency:

S11=0.073174774+ j∗0.3930799123=0.39983∠79.45467

S12=0.0002703+ j∗0.0009925=0.00103∠74.76540

S21=26.735143984− j∗19.086788848=32.84925∠−35.52385

S22=−0.8149916151+ j∗0.340978547=0.88345∠157.29640

1.2.1.2 Conditional stability

The Rollet’s stability factor K is defined as:

K=1−|S11|

2−|S22|2+|∆|2

2|S12 S21|When|Δ|=|S11S22−S12 S21|

Δ=S11 S22−S12 S21=0.38559∠−124.75974 => |Δ|<1

K=1−|S11|

2−|S22|2+|∆|2

2|S12 S21|

Z11 Z22

S '11

Γ2Γ1

E

ZS=50OhmPower Amplifier(R0=50Ohm)

Input matching

Output matching

S '22

Γ LΓ s

ZL=50Ohm

Figure 1 1Two-ports Network Figure 1Figure 2 Two-port Network

Page 5: Power Amplifier Design

¿1−|0.39983∠79.45467|2−|0.88345∠157.29640|2+|0.38559∠−124.75974|2

2|0.00103∠74.76540×32.84925∠−35.52385|=3.08276>1

Additional stability factor B is defined as:

B=1+|S11|2−|S22|

2−|∆|2

¿1+|0.39983∠79.45467|2−|0.88345∠157.29640|2−|0.38559∠−124.75974|2=¿0.23071 > 0

Unconditional stability with all value of input and output impedance.

1.2.1.3 Select Γ1and Γ2 for system stable

{S '11=S11+S12 S21 Γ2

1−S22 Γ 2

<1

S ' 22=S22+S12S21 Γ 1

1−S11Γ 1

<1

The circular locus of Γ1 is defined as:

{center Ω1=S11

¿−Δ¿ S22

|S11|2−|Δ|2

=0.18089− j∗5.35854

Radius R1=|S12||S21|

||S11|2−|Δ|2|

=3.02053

The circular locus of Γ2 is defined as:

{center Ω2=S22

¿−Δ¿S11

|S22|2−|Δ|2

=−1.06741− j∗0.43961

Radius R2=|S12||S21|

||S22|2−|Δ|2|

=0.05348

Page 6: Power Amplifier Design

Figure 2 Circular locus on Smith Chart

Confirm that with all of input and output impedance, the power amplifiers operate stability.

1.2.2 Calculate transducer power gain and noise figure

1.2.2.1 Calculate maximum transducer power gainWe have an unconditional stable device k > 1 and |Δ|<1 ,we can solve for maximum transducer power gain simultaneous conjugate match conditions:

Γ MS∧Γ ML Γ1¿=¿ S '11∧¿ Γ2

¿=¿ S '22

{ Γ MS=B1±√B1

2−4|C1|2

2C1

=0.28042∠−88.06656

Γ ML=B2±√B2

2−4|C2|2

2C2

=0.87398∠−157.61572

B1=1+|S11|2−|S22|

2−|∆|2

B2=1+|S22|2−|S11|

2−|∆|2

C1=S11−Δ S22¿

C2=S22−Δ S11¿

Maximum transducer power gain:

Γ1=¿ Γ MS=0.28042∠−88.06656∧¿ Γ2=¿ Γ ML=0.87398∠−157.61572

Page 7: Power Amplifier Design

GTUmax=|S21|

2 (1−|Γ MS|2) (1−|Γ ML|

2 )|(1−Γ MS S11) (1−Γ MLS22)−Γ MS Γ ML S12 S21|2

=4591.19=37.26192dB Maximum available gain (MAG):

MAG=|S21||S12|

(k−√k2−1 )=4595.396=37.26193dB

Figure 3 Circular locus of maximum power gain

1.2.2.2 Calculate minimum noise figure

NF=10 log( SNRinput

SNR output)=2.1dB

We have the ratio SNR input good (> 45dB) and noise figure NF = 2.1 dB very small, so we don’t need consider noise parameter. We only transmit maximum power gain.

1.2.2.3 Compromises between power gain and noise parameter

Skip this step

1.2.3 Design input and output matching with Γ MS∧Γ ML parameter

S '11

Γ2 , ZoutΓ1 , Z¿

E

RS=50Ohm

Power Amplifier(R0=50Ohm)

Input matching

Output matching

S '22

Γ LΓ s

Z22Z11

Page 8: Power Amplifier Design

Γ1=¿ Γ MS=0.28042∠−88.06656∧¿ Γ2=¿ Γ ML=0.87398∠−157.61572

Γ1=Z¿−R0

Z¿+R0

=¿Z¿=R0

1+Γ 1

1−Γ 1

=43.47218− j∗26.44712

Γ2=Zout−R0

Zout+R0

=¿ Zout=R0

1+Γ2

1−Γ2

=3.49338− j∗9.84666

1.2.3.1 Design input impedance matching with Z¿ parameter

Zmatched=43.47218+ j∗26.44712

E

RS=50OhmInput

matching

Z¿=43.47218− j∗26.44712

Figure 4 Parameters of input matching network

RL=50Ohm

Page 9: Power Amplifier Design

Figure 5 Input Matching Network Design

Figure 6 ADS Simulation of Input Matching Network

Page 10: Power Amplifier Design

Figure 7 Simulation Result

1.2.3.2 Design output impedance matching with Zoutput parameter

Zout=3.49338− j∗9.84666

Zmatched=3.49338+ j∗9.84666

Γ2 , Zout

Output matching

Γ L

RL=50Ohm

Figure 8 Parameters of output matching network

Page 11: Power Amplifier Design

Figure 9 Output Matching Network Design

Figure 10 ADS Simulation of Output Matching Network

Page 12: Power Amplifier Design

Figure 11 Simulation Result

1.2.3.3 Simulation Power amplifier circuit

Figure 12 Power Amplifier Design

Page 13: Power Amplifier Design

Figure 13 Simulation Result

1.2.3.4 Evaluate design power amplifier circuit

Ideal Parameters PA circuit design(Simulation)Gain 37.26193 dB 37.014 dB

Input return loss (IRL) - -46.543 dBoutput return loss (ORL) - -37.506 dB

Zout 3.49338− j∗9.84666 3.43891− j∗9.80979Z¿ 43.47218− j∗26.44712 43.5666− j∗26.4130

Page 14: Power Amplifier Design

SIMULATION WITH BANDWIDTH FORM 2.4 GHz to 2.5GHz FREQUENCY

Frequency GHz

2.396 GHz 2.4088 2.434 2.446 2.458 2.471 2.483 2.496

Gain dB 36.91 36.977 37.273 37.014 37.165 37.14 36.752 36.856Input return loss (IRL) dB

-21.914 -35.908 -22.071 -46.543 -25.998 -23.453 -21.641 -23.322

output return loss (ORL) dB

-18.682 -23.083 -31.081 -37.506 -26.913 -26.412 -17.781 -16.485

1.3 Large Signal S-parameter simulation


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