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Erik Nijeboer / Bram Bruekers Oktober 2017 Power Delivery Network Analysis
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Page 1: Power Delivery Network Analysis - FHI

Erik Nijeboer / Bram Bruekers

Oktober 2017

Power Delivery Network Analysis

Page 2: Power Delivery Network Analysis - FHI

2 © 2017 Cadence Design Systems, Inc.

• Why Power Delivery Network Analysis?

• Analysis types, – DC simulation

– Thermal aware simulation

– AC simulation

• PDN analysis at Prodrive Technologies

• Tools and integration

Agenda

Page 3: Power Delivery Network Analysis - FHI

3 © 2017 Cadence Design Systems, Inc.

• DC voltage is the most fundamental criterion for the operation of the circuitry in the system– The voltage supply is allowed to deviate by an amount specified by

the vendor

– This deviation (or fluctuation) of the supply is composed of DC loss and AC noise

– The total voltage tolerance is commonly 5% (or less) of the nominal operating voltage

– If the tolerance is constant, then a reduction in DC loss yields a larger AC noise budget

Why Is Power Distribution Analysis ?

Page 4: Power Delivery Network Analysis - FHI

4 © 2017 Cadence Design Systems, Inc.

• Numerous factors have combined to exacerbate the problem– Core voltage levels continue to drop: 1.2V and less are now

common. Total margin drops from 250mv to 60mv

– As voltage is reduced, current requirements typically increase: IR drop = I * R

– Miniaturization of electronics results in fewer layers and higher densities thus reducing the available area for power net

Why Power Analysis Is Important?

Page 5: Power Delivery Network Analysis - FHI

5 © 2017 Cadence Design Systems, Inc.

• With IR drop analysis you see– Voltage levels across the board

– Current density

– Via current and hotspot

– Power loss

DC analysis

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6 © 2017 Cadence Design Systems, Inc.

• Heating due to current changes resistance of copper

• Without Thermal effect IR drop estimates will be inaccurate.

• High temperature due to localized current density can cause smoke or fire hazard

• Cadence DC analysis includes effects of – Component heating (power dissipation), including heatsinks

– Joule heating (PCB copper)

What about Thermal effects ?

Page 7: Power Delivery Network Analysis - FHI

7 © 2017 Cadence Design Systems, Inc.

• Switching circuit requires current to charge the load.VRM needs to supply this power

• VRM is unable to respond if output impedance exceeds target impedance.– Introduces switching noise:

• Impedance should be smaller than Zt at broad frequency range to lower switching noise.

• AC analysis calculates PDN impedance

Why AC power analysis?

Zt =Vdd * ripple

50% * Imax

Page 8: Power Delivery Network Analysis - FHI

8 © 2017 Cadence Design Systems, Inc.

• Add decoupling capacitors, bulk/ceramic capacitors

• Loop inductance’ reduction, effect at higher frequencies– Different decoupling capacitors

– Thinner dielectric

– Location of capacitors

– Change fanout

How to lower impedance?

Low Loop

Inductance

High Loop

Inductance

Low Loop

Inductance

– AC analysis will locate impedance hotspots and helps to get correct capacitor locations

Page 9: Power Delivery Network Analysis - FHI

9 © 2017 Cadence Design Systems, Inc.

• To determine proper metal thickness for power/gnd planes

• To find out – If and where to add additional via or power/gnd shape to ease the

overheat

– Whether to add additional plane layers needed in the board stackup

– Power dissipation and temperature profiles in PKG/PCB

– If and where to add sense line compensation for VRM

• Decoupling capacitors – Quantity, type and location

Design Decisions depending on PDN Analysis

Page 10: Power Delivery Network Analysis - FHI

10 © 2017 Cadence Design Systems, Inc.

Prodrive Technologies

Bram Bruekers

Since 2003 working at Prodrive Technologies

Analogue / Mixed signal hardware design

PCB design

– 15+ years experience– High current & voltage– Low noise

PCB tooling support & maintenance

Page 11: Power Delivery Network Analysis - FHI

11 © 2017 Cadence Design Systems, Inc.

Prodrive Technologies

• One of the fastest growing privately owned technology companies in Europe

• HQ located in Son, Netherlands

• International located: Germany, USA, Israel, China

• Design of electronics, software and mechanics

• Manufacturing• Core competences

– High end computing

– Power conversion

– Motion & mechatronics

– Industrial automation

– Vision & sensing

– IoT

• Industries of main interest:– Industrial

– Automotive

– Infra & energy

– Medical

Page 12: Power Delivery Network Analysis - FHI

12 © 2017 Cadence Design Systems, Inc.

MRI Gradient Amplifier

• 3-axes gradient amplifier cabinet

• 2100V / ±1200A Patented end stage

• Maximum 45kW continuous output power for three axes

• Integrated high precision current sensors

• High reliability of >30,000 hours

• Lifetime: >10 years

• Multiple FRUs (Field Replaceable Units)

Page 13: Power Delivery Network Analysis - FHI

13 © 2017 Cadence Design Systems, Inc.

Mains Input Board

• Inrush current limiter

• Power distribution

• Integrated current measurements

• Designed for 3x 130A continuous

Page 14: Power Delivery Network Analysis - FHI

14 © 2017 Cadence Design Systems, Inc.

Design Choices

• What type of interconnection to use?

Pro Con

Cable Easy / flexible routing Assembly issues, many connections

Where to place electronic circuits?

Bus-bar current carrying capability Difficult to ‘route’ through complex

product

Where to place electronic circuits?

PCB Electronic circuits possible

Ease of assembly

Complex design

Heating

Page 15: Power Delivery Network Analysis - FHI

15 © 2017 Cadence Design Systems, Inc.

Design Choices

PCB

• Design complexity

– How many layers ?

– Copper weight ?

– Total Thickness -> Limited by components !

• Thick copper

– Lower temperature ?Not necessarily !

– Higher costs + leadtime PCB FAB house

– PCB Assembly issues

So, thicker is not always better

Page 16: Power Delivery Network Analysis - FHI

16 © 2017 Cadence Design Systems, Inc.

Simulation to make design choices

• PCB heating most critical factor for this circuit– Absolute voltage drop not interesting

• Initial stackup : 6 layers 4oz (~140µm) copper – Creating hotspots due to stackup, routing and plane cuts.

– Long leadtime for raw material

– UL certification for 140µm+ copper in several PCB FABs not available

• Final stackup : 12x 2oz (~70µm) copper– Hotspots are more spread because of overlapping planes

– ‘Standard’ available materials = short lead time !

Page 17: Power Delivery Network Analysis - FHI

17 © 2017 Cadence Design Systems, Inc.

Comparison 2 PCB stack-ups

Initial Final design

# Layers 6 12

Copper weight 4oz 2oz

Material availability - +++

PCB costs €€€€€ €€€

# PCB Fabs - +++

Page 18: Power Delivery Network Analysis - FHI

18 © 2017 Cadence Design Systems, Inc.

Simulated vs. Measured

ΔT simulated ~19˚C ΔT measured ~16˚C

Total current of 390A

No airflow

Page 19: Power Delivery Network Analysis - FHI

20 © 2017 Cadence Design Systems, Inc.

Other practical applications

• Feasibility check

• Debugging

Page 20: Power Delivery Network Analysis - FHI

21 © 2017 Cadence Design Systems, Inc.

Feasibility

• Question from a customer:

“Can the routing cope with a current of 7A?”

• Microcontroller board– Dense design, not much place for wide traces

• Used PowerDC to simulate the current through the specific part of the PCB– Result: Yes, routing can handle the specified current.

Hotspot is caused by the connector.

Top Bottom

ΔT simulated ~14˚C

Current density

Page 21: Power Delivery Network Analysis - FHI

22 © 2017 Cadence Design Systems, Inc.

Debugging

• Issue with core supply of microcontroller– Stability issues during qualification

• IR drop simulation to simulate the voltage drop from the supply to the microcontroller

• Last minute PCB change, extra VIAs were added

• ΔV is about 65mV only ~5mV supply voltage margin!

Page 22: Power Delivery Network Analysis - FHI

23 © 2017 Cadence Design Systems, Inc.

Why we use PowerDC

• Initially usage:

– High-current designs IPC2221B / IPC2152 not possible to use on complex boards

– Temperature rise of a PCB

• Now also for power distribution and voltage drop simulations

Page 23: Power Delivery Network Analysis - FHI

24 © 2017 Cadence Design Systems, Inc.

• Direct integration with OrCAD/Cadence PCB Editor– Use PI constraints during layout

– DRC markers

• Capable to analyze designs from:– Altium

– Mentor Graphics

– ODB++

– Zuken

Integration with PCB tools

Page 24: Power Delivery Network Analysis - FHI

25 © 2017 Cadence Design Systems, Inc.

Automatic Report generation

Page 25: Power Delivery Network Analysis - FHI

26 © 2017 Cadence Design Systems, Inc.

For more information visit at booth 4

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27 © 2017 Cadence Design Systems, Inc.

For more information visit at booth 6

Page 27: Power Delivery Network Analysis - FHI

28 © 2017 Cadence Design Systems, Inc.

For more information:

Visit us at booth 4

www.cb-distribution.nl

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29 © 2017 Cadence Design Systems, Inc.

• Cadence PowerDC (DC Analyse, Thermal aware)– Pre- and postlayout

– Setup Layout Constraints

• Cadence Power SI (AC Analysis)– Impedance analysis

– Location and type of capacitors

• Cadence Optimize PI– Automatic decap optimization

– Tradeof between performance, cost

Cadence Power Integrity tools


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