46
Power Electronic Devices Semester 1 Lecturer: Javier Sebastián Electrical Energy Conversion and Power Systems Universidad de Oviedo Power Supply Systems
Power Electronic Devices
Semester 1
Lecturer: Javier Sebastián
Electrical Energy Conversion and Power Systems
Universidadde Oviedo
Power Supply Systems
2
Review of the physical principles of operation of semiconductor devices.
Thermal management in power semiconductor devices. Power diodes. Power MOSFETs. Power IGBTs High-power, low-frequency semiconductor devices (thyristors).
Outline
Lesson 4 - Power MOSFET.
Semester 1 - Power Electronic Devices
Electrical Energy Conversion and Power Systems
Universidadde Oviedo
3
4
Outline
• The main topics to be addressed in this lesson are the following: Review of the basic structure and operation of low-power MOSFETs.
Internal structures of power MOSFETs.
Static characteristics of power MOSFETs.
Dynamic characteristics of power MOSFETs.
Losses in power MOSFETs.
5
Review of the basic structure of low-power MOSFETs.
DS G
+
P-
Substrate
N+ N+
SiO2
Ohmic contactMetal
GS D
NameMetal
Oxide
Semiconductor
Structure
N-channel enhancement MOSFET
G (Gate)
D (Drain)
S (source)
Substrate
Schematic symbol G
D
SP-channel enhancement MOSFET
Schematic symbol
6
Review of the operation of low-power MOSFETs (I).
++ ++G DS
+
P-
Substrate
N+ N+- - - -
GDS
+
P-
Substrate
N+ N+
V1
+ + + +
- - - -
Depletion layer(space charge)
V2 > V1
+ + + ++++ +++
- - - -
- -
A thin layer containing mobile electrons (minority
carriers) is induced
7
Review of the operation of low-power MOSFETs (II).
V3 = V TH > V2
GDS
+
P-
Substrate
N+ N+
++++ ++++
- - - -- - - -
This thin layer containing mobile electrons (minority carriers) is
called inversion layer
This is a depletion layer (without carriers)
• When the electron concentration in the new thin layer of electrons is the same as the hole concentration in the substrate, we say that the inversion process has started.
• The gate voltage corresponding to this situation is the threshold voltage, VTH.
• It should be noted that the inversion layer is like a new N-type region artificially created by the gate voltage.
8
Review of the operation of low-power MOSFETs (III).
V4 > V TH
G DS
P
P-
Substrate
N+ N+
+++++ +++++
- - - -- - - - - -
• Inversion layer when the voltage between gate and substrate is higher than VTH.
vGS
GDS
P-
Substrate
N+ N+
+++++ +++++
- - - -- - - - - -
vDS
• Now, we connect terminal source to terminal substrate.• Moreover, we connect a voltage source between terminals drain and source.
• How is the drain current iD now?
iD
9
Review of the operation of low-power MOSFETs (IV).
• Now, there is a N-type channel due to the inversion layer. • This channel allows the current to pass from the drain terminal to the source terminal. • With low values of vDS (i.e., vDS << vGS), the channel shape is uniform.
vGS
GDS
P-
Substrate
N+ N+
+++++ +++++
- - - - -
vDS = vDS1 > 0iD
- - - - -
• If the value of vDS approaches vGS, then the channel shape is not uniform any more.• This is the normal situation when the MOSFET is working in linear applications, which is very different from the case of switching applications.
10
Review of the operation of low-power MOSFETs (V).
• Drain current iD is practically zero when vGS = 0, because no channel exists between drain and source.
• The same occurs for any vGS < VTH (i.e., iD » 0).
vDS1
G DS
P-
Substrate
N+ N+
iD» 0
G DS
P-
Substrate
N+ N+
iD» 0
vDS2 > vDS1
• Operation when vGS = 0.
11
Review of the operation of low-power MOSFETs (VI)
vDS [V]
iD [mA]
4
2
84 120vGS = 2.5V
vGS = 3V
vGS = 3.5V
vGS = 4V
vGS = 4.5V
VGS = 0V < 2.5V < 3V < 3.5V < 4V Resistive behaviour
Behaviour as current source
vGS < VTH = 2V< 4.5V
Open-circuit behaviour
+
-vDS
iD
+
-vGS
2.5kW
10VG
D
S
• Graphical analysis.
Load line
12
Review of the operation of low-power MOSFETs (VII)
• Parasitic diode.
G
D
S
• There is a parasitic diode between drain terminal and source terminal due to the internal connection between substrate and source.
DS G
+
P-
Substrate
N+ N+
13
Internal structure of power MOSFETs (I).
G
D
S
• A typical transistor is constituted of several thousand cells.
• As all the FET devices, MOSFET can be easily connected in parallel.
• They are vertical MOSFETs.
• Examples of cells:
V-groove MOS (VMOS)Drain
N+
N-
PN+
Source Gate
Body
Source-body connection
N+
N-P
N+N+
Double diffused MOSFET (DMOS)Drain
Source Gate
Body
Internal structure of power MOSFETs (II).
• Other structures (I):
MOSFET with trench gate (UMOSFET)
Drain
N+
N-PN+
Source
Body
Gate
MOSFET with extending trench gate (EXTFET)
Drain
N+
N-P
N+Source
Body
GateSource-body connection
• The breakdown voltage is limited to 25 V.
14
Internal structure of power MOSFETs (III).
• Other structures (II):
MOSFET with graded doped (GD) and trench gate
Drain
N+
NPN+
Source
Body
Gate Source-body connection
• Also for low voltage (breakdown voltage is about 50 V).
15
ND-source
ND-drain-
ND-drain+
NA-body
Doping
Structure with charge coupled PN super-junction in the drift region
(CoolMOS TM)
N+
N-
N+N+P+
P-
Drain
Source Gate
Body
Source-body connection
• 3 times better for 600-800 V devices.
16
Internal structure of power MOSFETs (IV).
N+
N-
P N+N+
• Tridimensional structure of a DMOS:
DrainDrift regionBody
Gate
Source
17
Packages for power MOSFETs (I).
• Packages are similar to those of power diodes (except axial leaded through-hole packages).
• There are many different packages.
• Examples: 60V MOSFETs.
RDS(on) = 9.4 mW, ID = 12 ARDS(on) = 12 mW, ID = 57 A
RDS(on) = 9 mW, ID = 93 ARDS(on) = 5.5 mW, ID = 86 ARDS(on) = 1.5 mW, ID = 240 A
18
Packages for power MOSFETs (II).
• Other examples of 60V MOSFETs.
RDS(on) = 3.4 mW, ID = 90 A
19
Information given by the manufacturers.
• Static characteristics:
- Drain-source breakdown voltage.
- Maximum drain current.
- Drain-source on-state resistance.
- Gate threshold voltage.
- Maximum gate to source voltage.
• Dynamic characteristics:
- Parasitic capacitances.
20
• It is the drain-source breakdown voltage when the gate terminal is connected to the source terminal. • It corresponds to a specific value of the drain current (for example, 0.25 mA).
Drain-source breakdown voltage, V(BR)DSS.
ID = 0.25 mA
V(BR)DSSG
D
S
21
Maximum drain current.
• ID depends on the mounting base (case) temperature.
• At 100 oC, ID = 23·0.7 = 16.1 A
• Manufacturers provide two different values (at least) :- Maximum continuous drain current, ID.
- Maximum pulse drain current, IDM.
22
Drain-source on-state resistance, RDS(ON) (I).
• It is one of the most important characteristics in a power MOSFET. The lower, the better. • For a given device, its on-resistance decreases with the gate voltage, at least until this voltage reaches a specific value. • Power MOSFETs typically increase their on-resistance with temperature. Under some circumstances, power dissipated in this resistance causes more heating of the junction, which further increases the junction temperature, in a positive feedback loop. • If a MOSFET transistor produces more heat than the heat sink can dissipate, then thermal runaway can still destroy the transistors. This problem can be alleviated by lowering the thermal resistance between the transistor die and the heat sink. • Thermal runaway refers to a situation where an increase in temperature changes the conditions in a way that causes a further increase in temperature, often leading to a destructive result. It is a kind of uncontrolled positive feedback. • However, the increase of on-resistance with temperature helps balance current across multiple MOSFETs (and MOSFET cells) connected in parallel, so current hogging does not occur.
23
Drain-source On Resistance, RDS(on) (Ohms)
Drain-source on-state resistance, RDS(ON) (II).
• RDS(ON) increases with temperature.
• RDS(ON) decreases with VGS.
24
Drain-source on-state resistance, RDS(ON) (III).
• Comparing different devices with a given value of ID, the value of RDS(on)
increases with V(BR)DSS.
25
Drain-source on-state resistance, RDS(ON) (IV).
• The use of new internal structures (such as charge coupled PN super-junction in the drift region) has improved the value of RDS(ON) in devices in the range of 600-1000 V.
Year 2000
Year 1984
26
Gate threshold voltage, VGS(TO) (I).
• Manufacturers define VGS(TO) with the gate terminal connected to the drain terminal and at a specific value of ID (e.g., 0.25 mA or 1 mA)
• Standard values of VGS(TO) are in the range of 2-4 V.
ID = 1 mA
VGS(TO)G
D
S
27
Gate threshold voltage, VGS(TO) (II).
• VGS(TO) depends on the temperature:
28
Maximum gate to source voltage, VGS.
• Frequently, this value is ± 20V.
29
Parasitic capacitances in power MOSFETs (I).
• Power MOSFETs are faster than other power devices (such as bipolar transistors, IGBTs, thyristors, etc.).
• This is because MOSFETs are unipolar devices (no minority carriers are stored at the edges of PN junctions).
• The switching speed is limited by parasitic capacitances.
• Three parasitic capacitances should be taken into account:
- Cgs, which is a quite linear capacitance.
- Cds, which is a non-linear capacitance.
S
D
G
Cdg
Cgs
Cds
- Cdg, Miller capacitance, which is also a non-linear capacitance.
30
Parasitic capacitances in power MOSFETs (II).
• Manufacturers provide information about three capacitances, which are different from the ones mentioned in the previous slide (however, they are directly related with them):
- Ciss = Cgs + Cgd with Vds=0 (input capacitance). Ciss » Cgs.
- Crss = Cdg (Miller or feedback capacitance).
- Coss = Cds + Cdg (output capacitance). Coss » Cds.
Ciss
Coss
S
D
G
Cdg
Cgs
Cds
S
D
G
Cdg
Cgs
Cds
31
Parasitic capacitances in power MOSFETs (III).
• Example of information provided by manufacturers.
Ciss = Cgs + Cgd Crss = Cdg Coss = Cds + Cdg
32
Switching process in power MOSFETs (I).
• Analysis of the switching process assuming:
- Inductive load (frequent situation in power electronics).
- Clamping (or free wheeling) diode.
- Ideal diode.
Cdg
Cgs
CdsV1 R
V2
IL
33
Switching process in power MOSFETs (II).
• Starting situation:
- The power transistor is off and power diode is on.
- Therefore: vDG = V2, vDS = V2 and vGS = 0.
iDT = 0 and iD = IL.
+
-vDS
vGS
+
-
+-
vDG
Cdg
Cgs
CdsV1 RV2
IL
iDT
iD
B
A
- From this situation, the mechanical switch changes from position “B” to “A”.
+-
+-
34
Switching process in power MOSFETs (III).
• iDT = 0 while vGS < VGS(TO)
• vDS = V2 while iDT < IL (the diode is on).
+
-vDS
vGS
+
-
+-
vDG
Cdg
Cgs
CdsV1 RV2
IL
iDT
iD
B
A
VGS(TO)
vDS
iDT
vGSB®A
IL
V2
This slope depends on R, Cgs and Cdg.
+-
+-
+
-
35
Switching process in power MOSFETs (IV).• The current provided by V1 through R is
mainly used to discharge Cdg Þ almost no
current is used to charge Cgs Þ vGS = constant.
• As a consequence, the Miller plateau appears.
+
-vDS
vGS
+
-
+-
vDG
Cdg
Cgs
CdsV1 RV2
IL
iDT
B
A
VGS(TO)
vDS
iDT
vGS B®A
IL
+-
+-
+
-
36
Switching process in power MOSFETs (V).
• Cgs y Cdg complete the charging process.
VGS(TO)
vDS
iDT
vGSB®A
IL
+
-vDS
vGS
+
-
+-
vDG
Cdg
Cgs
CdsV1 RV2
IL
iDT
B
A+-
V1
The time constant depends on R, Cgs and Cdg.
+-
37
Switching process in power MOSFETs (VI).
• Computing losses between t0 and t2:
- The control voltage source V1 has to charge Cgs (large) from 0 to VM and discharge Cdg (small) from V2 to V2-VM.
- There is high voltage (V2) and increasing current (from 0 to IL) in the MOSFET at the same time (from t1 to t2).
iDT
+
-vDS
vGS
+
-
Cdg
Cgs Cds
V2
+-
+
-
+
-t0 t1 t2 t3
VGS(TO)
vDS
iDT
vGS B®A
IL
V1
VM
PVI
38
Switching process in power MOSFETs (VII).
• Computing losses between t2 and t3:
- The control voltage source V1 has to discharge Cdg from V2-VM to -VM.
- There is high current (IL) and decreasing voltage (from V2 to 0) in the MOSFET at the same time (from t2 to t3).
V1
VM
t0 t1 t2 t3
VGS(TO)
vDS
iDT
vGSB®A
IL
PVI
iDT = IL
+
-vDS
vGS
+
-
Cdg
Cgs Cds+-
+
-
+
- IL
39
Switching process in power MOSFETs (VIII).
• Computing losses after t3:
- The control voltage source V1 has to charge Cgs from VM to V1 and Cdg from -VM to -V1.
- There is high current (IL), but the voltage is very low. Therefore, there are only conduction losses.
iDT = IL
+
-vDS
vGS
+
-
Cdg
Cgs Cds+-
+
-
+
- IL
V1
VM
t0 t1 t2 t3
VGS(TO)
vDS
iDT
vGSB®A
IL
PVI
40
Switching process in power MOSFETs (IX).
• The switching speed strongly depends on the gate charge Qg. The gate charge is the electric charge that the driving circuitry must provide for switching the MOSFET. - The driving circuitry must provide the gate-source charge Qgs from t0 to t2.
- The driving circuitry must provide the gate-drain charge Qgd from t2 to t3.
- The driving circuitry must provide more electric charge for the gate voltage to reach the final value V1. The gate charge Qg includes this charge and the addition of Qgs + Qgd.
- For a given driving circuitry, the lower Qg, the faster the switching process. - Obviously, t2-t0 » QgsR/V1, t3-t2 » QdgR/V1 and PV1 = V1QgfS, where fS is the switching frequency.
vGS
iV1
t0 t2t3
V1
iV1 R
Qgs
Qgd
Qg
41
Year 2000
Switching process in power MOSFETs (X).
IRF 540
BUZ80 Year 1984
• Example of information provided by manufacturers:
42
Power losses in power MOSFETs (I).
• Static losses:- Reverse losses Þ negligible in practice due to the low value of
the drain current at zero gate voltage, IDSS.
- Conduction losses, due to RDS(on):
PMOS_cond = RDS(ON)·ID_RMS2,
where ID_RMS is the RMS value of the drain current.
• Switching (dynamic) losses:- Turn-on losses and turn-off losses.
• Driving losses.
43
vDS
iDT
vGS
PVI
Power losses in power MOSFETs (II).
Conduction losses
Switching losses
PMOS_cond = RDS(on)·ID_RMS2
Won
Woff
PMOS_S = fS(won + woff)
44
Power losses in power MOSFETs (III).
• Driving losses.
vGS
iV1
t0 t2t3
Qgs
Qgd
Qg
PV1 = V1QgfS
V1
iV1
R
Equivalent circuit
V1
iV1
RB
Actual circuit to have low R equivalent values
• It should be noted that for a given MOSFET, the switching times decrease when R decreases, thus allowing higher values of iV1.• Moreover, the lower the switching times, the lower the switching losses.
45
The parasitic diode in power MOSFETs (I).
• It usually is a slow diode, especially in the case of high voltage MOSFETs.
G
D
S
IRF 540
46
The parasitic diode in power MOSFETs (II).
• Case of a high voltage MOSFET structure (e.g., charge coupled PN super-junction in the drift region).
