3
10-phase
VR for CPU
4-phase VR
for Chipset
VR for Memory
VR
VRVR
Server
Around 30% real estate of motherboard is occupied by VR
Present Server Motherboard with High Current
POL (Voltage Regulator)
CPU
CPU
4
current
Power
density
W/in3
100
500
700
1A 20A10A
300
Integrated
POL
Capsulated
POL
Discrete POL
40A
Power Density of Today’s POL Modules
Research Objective
High density, High current
integrated POL module
6
Inductor substrate
Driver
Inductor Io(max)>15A
3D Integration for High Current Applications
Active layer
Active devices
3D Integrated Converter
3D integration can save footprint and fully utilize space.
7
In-package decoupling Caps
Active Layer Using “Flip-MOS Pair”
Top
MOSFET
(bare die)Substrate
(Maxwell Q3D)
Embedding the devices allows for smallest loop inductance
Drain
Bottom
MOSFET
(bare die)
L_loop =0.82 nH !
Direct-bond-copper (DBC) is used to build this active layer
8
Advantage of DBC Active Layer
Tmax = 158°C
Tavg = 96.8°C
AlN DBC has ~6x greater thermal conductivity than 4-layer PCB
Tmax = 94.1°C
Tavg = 91.0°C
PCB AlN DBC
Embedded
bare die
CPES Proprietary 9
LTCC Low Profile Inductor Substrate
Stack Multi-layer
LTCC tapesPress
Sintering
Cut holes by laser
Screen print the holes
with silver paste
Very Simple
Fabrication Process
10
L1
Vin Vo
R
i1
i2L2
Integrated Coupled Inductor for two-phase Buck converter
Two-phase POL With non-coupled inductor Inductor is too large
Inverse coupling can reduce Inductor footprint.
Lself
Vin Vo
R
M
i1
i2 Lself
Inverse coupled inductor
Cancel DC flux
Footprint 52%
reduction
11
current
Power
density
W/in3
100
500
700
1A 20A10A
300
Integrated
POL
Capsulated
POL
Discrete POL
40A
Two-phase POL with
couple inductor 1.5MHz
Single-phase POL
1.5MHz
Power Density of POL Converters--- CPES Prototypes
13
Lateral-Trench
MOSFET
100kHz 1MHz
Trench MOSFET
Current
100MHz
VDMOS
30A
40A
Lateral MOSFET
Semiconductor Device Technologies
10MHz
GaN based HEMT
10A
20A
14
Objective for ARPA-E Project
High Switching Frequency (2 ~ 5 MHz)
High Power Density ( > 1000 W/in3)
High Efficiency ( 88%)
Three-dimensional Integration
IR Generation 1.1 GaN Device
New Magnetic Material
15
current
Power
density
W/in3
100
500
700
1A 20A10A
300
Integrated
POL
Capsulated
POL
Discrete POL
40A
Two-phase POL with
couple inductor 1.5MHz
Single-phase POL
1.5MHz
Power Density of POL Converters--- CPES high frequency POL with GaN device
2~5 MHz
16
Team Members & Roles
Gen 1.1 GaN Device
Development
High Frequency Drive
IC Development
Integrated GaN Module
Development
Supporting VT for
Reliability Assessment
FeNC Magnetic Material
Development
NiZn Sheet Material
Development
FeNC and NiZn Magnetic
Material Characterization
Magnetic Substrate
Fabrication
Magnetic Material
Performance Optimization
GaN Device Loss
Modeling
Magnetic Loss Modeling
Topologies Evaluation
LTCC Characterization
3D Integration Design
Thermal Management
Prototype Design
Testing and Evaluation