Project LED Cube
• Team Stolen Pie– Patrick Bloem– Jess Tate– Devin Pentecost– Caleb Pentecost
University of Portland School of Engineering
AdvisorDr. Osterberg
Industry RepresentativeTBD
Senior Design
3University of Portland School of Engineering
Introduction
• An Interactive 3D MEMS Display• Uses accelerometers• LED Cube (Animation)
Senior Design
4University of Portland School of Engineering
Project Proposal
Functional Specification
MOSIS Chip Design and Macro
Model Creation
MOSIS Fabrication
(by foundry)
Design Document
Construct Cube
Assemble
Circuits
Test and
Debug
Founder's Day
Display
Software Frameworkin
g
Microcontroller
Programming
Design Approach
Senior Design
7University of Portland School of Engineering
MilestonesStatus Description
Original Target
Previous Target
Present Target
Complete Top Level MOSIS block diagram complete 10/16/11 10/16/11 10/16/11
Complete Top level microcontroller design complete 10/23/11 10/23/11 10/23/11
Complete Initial B2Logic Edif Files Complete 10/31/11 10/31/11 10/31/11
Complete Cube mock-up and pinout complete 11/6/11 11/6/11 11/6/11
Complete Design Document v0.9 11/12/11 11/12/11 11/12/11
Complete Final Budget Complete 11/12/11 11/12/11 11/12/11
Complete Design Document v1.0 approved 11/19/11 11/19/11 11/19/11
Complete Final MOSIS Edif Files complete 11/21/11 11/21/11 11/21/11
On Track Initial CPLD/FPGA Macro Model Complete 12/4/11 12/4/11 12/9/11
On Track Peer Evaluations/Lab Notebooks Due 12/5/11 12/5/11 12/5/11
On Track Place casing request 1/27/12 1/27/12 1/27/12
On TrackCPLDs programmed and determined if
functional2/3/12
2/3/12 2/3/12
On Track Wire wrap tutorial complete 2/10/12 2/10/12 2/10/12
On Track LED cube constructed 2/24/12 2/24/12 2/24/12
On Track Circuit complete with macro models 3/9/12 3/9/12 3/9/12
Senior Design
8University of Portland School of Engineering
Accomplishments
• Final Budget Complete• Design Document v1.0 approved• Final MOSIS Edif Files complete• 555 Timer Experiment• Accelerometer Experiment
Senior Design
12
Accomplishment: 555 Timer Experiment Results
University of Portland School of Engineering
• Well above 60 frames/second!
Senior Design
13
Accomplishment: Accelerometer Experiment
University of Portland School of Engineering
• Demonstration
Senior Design
14University of Portland School of Engineering
Plans
• Complete Initial CPLD/FPGA Macro Model
• Complete Peer Evaluations
Senior Design
15University of Portland School of Engineering
Concerns/Issues
• Box Construction Techniques– Debugging/Access
• FPGA/CPLD Confirmation– No experiments have been done with these
devices yet.