QUARTUS II GUIDE
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1 Start Icon ............................................................................................................................ 3
1.1 The Quartus II Screen ................................................................................................. 3 2 Project creation................................................................................................................... 3 3 Schematic entry .................................................................................................................. 6
3.1 Create new drawing .................................................................................................... 6 3.2 Symbol selection......................................................................................................... 8 3.3 Placement of an AND gate .......................................................................................... 9 3.4 Deleting a symbol ....................................................................................................... 9 3.5 Moving a symbol ...................................................................................................... 10 3.6 Selecting a group of symbols..................................................................................... 10 3.7 Drawing wires........................................................................................................... 11 3.8 Adjusting a line......................................................................................................... 12 3.9 Adding input/output points........................................................................................ 13 3.10 Using the zoom tool .................................................................................................. 14 3.11 Saving files ............................................................................................................... 14 3.12 Closing a project ....................................................................................................... 15 3.13 Opening a project...................................................................................................... 15
4 System compilation .......................................................................................................... 16 5 System Simulation............................................................................................................ 18
5.1 Initiating simulator.................................................................................................... 18 5.2 Waveform editor ....................................................................................................... 18 5.3 Selecting signals to display in waveform window...................................................... 19 5.4 Adjusting the view of the waveform.......................................................................... 21 5.5 Waveform timing bars............................................................................................... 21 5.6 Editing input waveforms ........................................................................................... 22 5.7 Running the Simulator .............................................................................................. 24 5.8 Printing ..................................................................................................................... 24 5.9 Grouping signals ....................................................................................................... 25
6 Pin assignment.................................................................................................................. 27 7 Programming Altera FPGA boards ................................................................................... 28
QUARTUS II GUIDE
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Notes 1. References to mouse clicks will be in the following format
C����
L = single click left mouse button
CC����
L = double click left mouse button
C����
R = single click right mouse button
P����
L = press click left mouse button and keep pressed. Release after action is
complete
2. The top menu bar provides an undo button ( ). VERY USEFUL!!
3. The keyboard ��� key will cancel any operation.
QUARTUS II GUIDE
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1 Start Icon
1.1 The Quartus II Screen
2 Project creation Select � �� ����� �� ���� from ���� menu
��������
�� ����
� ���� �
� ��� ��� ���� �
� �������
Click the � �� ���� ���. check box to disable this dialogue box from appearing in future
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For simple projects it is unlikely that you will need to add files to the project. C����
L the button to
continue.
Quartus II has all the features that you are likely to need, therefore
C����
L the button to
continue.
� Choose a fresh directory for each QuartusII project
� Provide suitable name
� continue
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For simple projects, Quartus II contains all the necessary EDA (Electronic Design Automation) tools for design and implementation of Altera FPGA based systems. C����
L the button to
continue.
The two families of devices used in the department are
• Cyclone • MAX7000S
C����
L the button to continue.
The devices used are : • Cyclone o EP1C20F324C7
� 324 pins � 7nS gate delay � 20,000 flip-flop equivalent � 256Kbits RAM � Design of complex systems
• MAX7000S o EPM7128SLC84-15
� 84 pins � 15nS gate delay � 128 flip-flop equivalent � Simple logic replacement
C����
L the button to continue.
� Select target family of devices
� Allow user to select a particular device.
EP1C20F324C7
Target list
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Quartus II finishes the � �� � ���� � � ���� with a summary of your responses. C����
L the button to complete wizard.
3 Schematic entry
3.1 Create new drawing
Create a new design file by C����
L the new file icon ( ) or selecting the ������� �� �� menu
item.
For schematic entry (i.e. diagrams using logic symbols) choose the ������������� ����� ����� ����� � ���������entry. The AHDL, Verilog, and VHDL allow the designer to describe the design in a computer language format.
� Choose
� continue
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The main work area now looks as follows The main drawing tools are
Drawing area
Project files
Only one in this simple
project.
Drawing tools
Selection and smart drawing tool Text tool
Symbol tool Block tool
Orthogonal conduit tool Orthogonal bus tool
Wire drawing tool (Orthogonal node tool)
Use rubberbanding Use partial line selection
Full screen
Zoom tool
Find tool
Temporary file � ���!�"�# is created
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3.2 Symbol selection C����
L the symbol tool button to open the logic symbol listing.
Primitives Description Notes buffer • Specialised buffer functions
logic • ��� , ���� , , � and � , symbols.
• Symbols with various numbers of inputs
Standard logic symbols
other • Ground and Vcc points. • Schematic title area.
pin • Input • Output • Bidirectional
These can be connected to real input/output device pins
storage • D-type, JK, SR, Toggle, latch flip-flops
Full range of flip-flops
C����
L the
symbol to get a list
Display area for selected
components
Symbol list
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3.3 Placement of an AND gate
A quick way to bring up the symbol selection window is to CC����
L when pointer is
over the drawing area
3.4 Deleting a symbol First, select the appropriate symbol.
� Select ��� gate � Display area shows symbol selected
� check this box if you will be placing more than one of the symbols on your drawing
� C����
L to insert into drawing
C����
L on the drawing
area to place the symbol
If using �$�� ����� �� ��
• C����
L to continue to place the
required set of symbols
• C����
R and ������ to terminate
process
� To select, move mouse
over symbol and C����
L
� Press DEL key on keyboard
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3.5 Moving a symbol If you wish to move symbols while maintaining all is connections then ensure that the
system is set to %""�"������ mode.
C����
L button.
3.6 Selecting a group of symbols A group of symbols can be selected by enclosing them in a bounding box. Resulting screen display Selected group can be either moved or deleted.
� Select symbol by moving mouse over
symbol and P����
L
� move object to required position then release button.
� Move mouse to top corner of your bounded box and
P����
L
� Drag box to lower left corner of box and release mouse button.
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3.7 Drawing wires
Left click button to set into wire drawing mode. To draw a wire between two points If two points are not in line then Quartus II will include right angle junctions in the connection.
In normal symbol layout mode, it is possible to draw single wires. If you move the mouse cursor to a symbol terminal point, then the wire drawing cursor ( ) is activated. Draw line as normal.
A junction between two lines is shown by a dot. Create a wire junction by drawing the wire to the line. A junction will be created automatically.
Wire drawing cursor
Symbol wiring points
� Move wire drawing cursor to start point
� P����
L
� Move cursor to end point and release mouse button
To exit wire drawing mode C����
L
the selection button .
junction
crossover
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3.8 Adjusting a line Quartus II drawn wires do not always take the ideal routes. The lines can be moved and edited in a number of ways. 1.
If %""�"������ has been enabled (use icon), then moving the symbols will also move the attached wires.
2. Select segment of line to be moved by placing mouse on line and C����
L .
3. Delete line and redraw.
• Select line (as above), then press keyboard � �� key.
Line with 3 segments
� Select segment
Indicates end of segment
� P����
L . Drag line to required position.
Release button when happy with position.
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3.9 Adding input/output points The input output points to circuits need to be marked for a number of reasons
1. input points for the injection of signals (for test)
2. output points to monitor results from the injection of test signals
3. to provide points which can be connected to real chip pins when the design is transferred to a physical FPGA device.
Input/output pins are placed on your drawing in the same way as logic components Example wired circuit with 3 inputs and 1 output.
Input pin
3 input pins
1 output pin
� CC����
L to bring up pin
name edit window
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3.10 Using the zoom tool
The zoom tool ( ) allows you to expand and contract your view of the drawing. � C
����L
zoom tool icon.
�
�
C����
L selection tool ( ) to exit zoom mode.
3.11 Saving files On a regular basis use the ���������&���or the�����������&������
menu options or the icon to save your design to disk. First execution with a new project will ask for a filename. The default name is often adequate for simple projects.
� Specify suitable signal name
� continue
RIGHT button Zoom OUT, centred on position of mouse
LEFT button Zoom IN, centred on position of mouse
mouse
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3.12 Closing a project When you have finished your work it is necessary to close the project. Use the ���������������� menu item.
3.13 Opening a project Use one of the following methods � Select menu option ���������' $������� ( to access file pick dialogue. You will
be looking for a ))))�*$# file qpf = +uartus �roject �ile
� Select menu option ���������, ���� ����� �
and C����
L on the appropriate entry.
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4 System compilation The designed system must now be checked, which involves the use of the compiler tool.
or by C����
L the compiler tool icon ( ) on the top icon bar. The following progress window
appears Pressing start gives an indication of how the compilation is progressing.
Invoke from the tools menu
OK Problems!
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A circuit with a wire missing Gives the following output in the lower information window
The concept of fault finding is central to many aspects of engineering. In general it is not easy, and requires the application of logical reasoning to the problem. Read the error messages carefully as these are the only pieces of evidence that you have to target the problem.
Missing wire
Error caused by missing wire
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5 System Simulation
5.1 Initiating simulator Start simulator tool with menu item -�������� %�� �-�.
5.2 Waveform editor
� Set �%�� ���� mode
� open waveform editor
� start simulator
� C����
R in this area to
invoke selection mode
� select .��� �� ����� %�( option
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5.3 Selecting signals to display in waveform window
If you wish to display signals that are internal to your design than add additional output points.
� Click here
� set filter to ����/����
request list of nodes
Input/output nodes
Example circuit
3 inputs : A, B, and C 1 output : Z
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The designer can now select the signals to be displayed on a waveform diagram. The signal selection options are
1. Left click mouse to select a single signal. Erases all other selections 2. Left press mouse and drag to select a group of signals 3. Shift | left click mouse to select a signal while leaving all other selection unaffected.
Selecting all the nodes for the test circuit gives
Use ���������&���or the icon to save your waveform setup to disk. Use regularly as you update the waveforms.
Selected nodes
� continue
� C����
R to complete operation
� select signals to be displayed
� C����
L to move selected
signals to display list
� C����
L to move ALL
signals to display list
Resulting waveform display window
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5.4 Adjusting the view of the waveform The default conditions of the waveform are
• Time-scale increments shown as 10nS (10 nanoseconds). o This is likely to be too small as the physical delay of the chips used are in
the order 7 to 15 nS.. • Total waveform area has an end time of 1µS. (1 microsecond)
The view of the waveform can be changed in a number of ways 1.
The zoom tool ( ) can be used to zoom in and out of any part of the waveform. When activated
• C����
R to zoom out
• C����
L to zoom in
• C����
l to exit zoom mode.
2. The length of the simulation period can be modified by changing the end time. Use menu
item ��� ������ �-�� �( to change.
3. To view the complete waveform to the end time, C����
R and choose menu item 0� �
���� ����� ���� . You can also use the keyboard :: � ��� .
4. The mouse scroll wheel can be used to scroll quickly left and right.
5.5 Waveform timing bars The vertical timing bars allow designer to make timing measurements. When initially configured, waveform window has one timing bar called the � �� �� �� ��� �"�.
1 �� �� �� ��� �" � shown by solid blue line 1 �� �� �� ��� �"� time
position shown here (from 0 origin)
1 �� �� �� ��� �" � moved by P����
L
and dragging this box
Signal names
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Additional timing bars can be created by CC����
R on the timing bar line
Delete a timing bar by
C����
L top square of bar and selecting the ���� � option
5.6 Editing input waveforms The designer must now configure appropriate input waveforms to check the operation of the circuit. To highlight a part of the waveform to edit The shaded are on the waveform can now be changed to a variety of values. The following table gives the most common options.
Timing bar line CC����
L to create this timing bar
Shows time difference between two pointers
� C����
L and drag
mouse along waveform � release button
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Icon Action on highlighted area Notes
1.
Set to ZERO
2.
Set to ONE
3. Set clock signal
The test waveform for the example circuit is as follows Inputs A and B are clock waveforms and input C is set to all ZERO. Ensure that you save this waveform file regularly. At this stage the output signal (Z) is in a unknown state.
Set period
Set duty cycle
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5.7 Running the Simulator Firstly, ensure that the circuit has been compiler. You must do this every time you change an aspect of your design. Refer to section 4 for details. Switch back to the simulator window if open, or select menu item -�������� %�� �-�. To run the simulator, it is necessary to generate a functional simulation netlist.
You can also use the start simulation button ( ) on the top button bar. If no errors are indicated, a window will give you the simulation results.
5.8 Printing Menu item File | Print… will give access to the Quartus II print facilities. All aspects of a project can be printed.
Details on how to change your view of this window are given in section 5.4 Values of signals at timing bar
� C����
L this button to
prepare simulation
� C����
L to start simulator
� C����
L to view results
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5.9 Grouping signals During simulation it is often very useful to group signals together and view them as single signal units. In our example circuit, we can group the three input signals as a unit. Return to waveform editor (section 5.1 )
3 input signals
� P����
L and drag down to highlight
the signals you wish to group
� Release here
� C����
R here to pull up selection window
� C����
L to select group
Name data group
� format of data
� C����
L to continue
C����
L to expand
Group coding in hexadecimal
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Expanding the data group gives
Remember to use ���������&���or the�����������&������ menu
options or the icon to save your design to disk on a regular basis.
Remember to re-compile your project after you have made changes to any aspects of your project
A simulation of the example circuit gives the results
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6 Pin assignment In preparation for the generation of a file to be downloaded to the FPGA chip the input/output points of the circuit MUST be assigned to real pins on the chip.
Please check the documentation of the particular FPGA chip for the pin assignment information. This will vary for different FPGA development boards.
Select menu item 2 ������ �� �������� The assignments for an EPM7128SLC84-15 on the Heriot-Watt Digital Logic Trainer board is as follows
� CC����
L to list input/output points
� CC����
L to list pins
Data A switches 1 to 3
Led 1
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The effect of these assignments is to add the I/O assignment information to the circuit diagram If you wish to change the assignments then re-select menu item 2 ������ �� �������� Please check the documentation of the particular FPGA chip for the pin
assignment information. This will vary for different FPGA development boards.
To change the Altera device being used in the project select menu item 2 ������ �� ����� �&���( �����Remember that the pin structure of the new device may be significantly different and you may have to re-do all the pin assignments.
7 Programming Altera FPGA boards Invoke programmer with menu item -��� ������ � �.
Details of pin assignment
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If the system is set-up then the following window will appear Design should now be running on the target hardware.
If the programming hardware is not set-up on your system, then consult the appropriate Quartus II documents as to the procedures. The student edition of Quartus II (called the Web edition) contains all the necessary drivers to use a printer port programmer.
Programmer that is connected to computer through the printer port
Ensure that JTAG mode is set
Programming file should be picked up automatically
� Check this box to specify program chip operation
� CC����
L to start download to chip