1. IntroductionThe optical code-division multiple access (OCDMA) technique has been proposed as anattractive implementation in access networks and local area networks (LANs) owingto its ability to (a) realize high statistical multiplexing gain even in a burst trafficenvironment, (b) increase the number of active users, and (c) provide high-securitymultiple-user access over the same bandwidth [1]. Moreover, the usage of OCDMAtechniques has an advantage over synchronous multiple access schemes such as timedivision multiple access (TDMA) because these techniques do not require traffic man-agement or synchronization between the transmitters [2].
The key components of OCDMA systems consist of the encoder and the decoder,which perform all-optical code generation and data recognition, respectively [1]. Acode or sequence of pulse time slots, also referred to as chips, is attributed to eachuser to encode its data bits. The encoded data are then broadcast into the networkand are only recognized by the matched decoder. Various OCDMA approaches havebeen proposed including spread-spectrum encoding [3], spectrum amplitude encoding[4], spectral phase encoding [5], two-dimensional (2D) encoding [6,7], and hybrid cod-ing [8].
Two-dimensional encoding allows the simultaneous and effective utilization of thetime and frequency domains and does not require chip synchronization. Consequently,this allows greater flexibility in code designs, a higher number of simultaneous users,a larger data throughput, and better scalability to accommodate additional users. In2D OCDMA encoding techniques the code is defined by multiple wavelengths, whereeach wavelength is delayed by a multiple of time chips within a bit period, thus mak-ing better utilization of the bandwidth in comparison to one-dimensional (1D) codes ofsimilar principle.
Most 2D OCDMA systems have so far been achieved using arrays of tunable fiberBragg gratings (FBGs) [6,9]. In practice, it is difficult to tune each wavelength cor-rectly in a real-time system over a wide range of wavelengths by stretching the FBGsor changing their temperatures. This approach of FBG tuning limits the flexibility,accuracy, and encoding operation of the OCDMA system, and also affects the linksetup time, which generally reduces the throughput of the OCDMA system. To over-come the above-mentioned limitations, a fast, accurate tunable OCDMA encoder isrequired, through which the incoming data can be encoded to different users withoutaffecting the network’s performance.
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This paper reports a solution that solves the above-mentioned complexities of the2D OCDMA system. The proposed encoder–decoder structure uses the steering capa-bility of the opto-very-large-scale-integrated (VLSI) processor [10,11] to steer selectivewavelength components to different time delay paths, where each path enables thewavelength component to occupy a specific time chip within a bit period, thus synthe-sizing 2D (wavelength and time) OCDMA codewords. Experimental results are alsopresented that demonstrate the principle of the proposed 2D OCDMA encoder–decoder structure at 2.5 Gbits/s.
2. Opto-VLSI ProcessorAn opto-VLSI processor comprises an array of liquid crystal (LC) cells independentlydriven by a VLSI circuit that generates on the LC layer digital holographic diffractiongratings capable of steering and/or shaping optical beams [10,11] as shown in Fig. 1.Each pixel is assigned a few memory elements that store a digital value and a multi-plexer that selects one of the input voltages and applies it to the aluminum mirrorplate. An opto-VLSI processor is electronically controlled, software configured, polar-ization independent, cost-effective because of the high-volume manufacturing capabil-ity of VLSI chips as well as the capability of controlling multiple optical beams simul-taneously, and very reliable since beam steering is achieved with no mechanicallymoving parts [10,11]. These attractive features paved the way for the opto-VLSI tech-nology to be employed in reconfigurable optical network devices.
Figure 1 also shows a typical layout and a cell design of a 2N-phase opto-VLSI pro-cessor. Indium tin oxide (ITO) is used as the transparent electrode, and evaporatedaluminum is used as the reflective electrode. By incorporating a thin quarter-wave-plate (QWP) layer between the LC and the VLSI backplane, a polarization-insensitiveopto-VLSI processor can be realized, allowing optical beam steering with polarization-dependent loss as low as 0.5 dB as reported by Manolis et al. [12]. The ITO layer isgenerally grounded and a voltage is applied at the reflective electrode by the VLSI cir-cuit below the LC layer to generate stepped blazed gratings for optical beam steering[10,11].
Figure 2 illustrates the steering capability of a typical opto-VLSI processor of pixelsize d, driven by various blazed gratings [Fig. 2(a)], which correspond to phase holo-grams [Fig. 2(b)]. If the pitch of the blazed grating is q�d (where q is number of pix-els per pitch), the optical beam is steered by an angle � that is proportional to thewavelength ��� of the incident light and inversely proportional to q�d, as shown inFig. 2(c). A blazed grating of arbitrary pitch can be generated directly by digitally
Fig. 1. Opto-VLSI processor and LC cell structure design.
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driving a block of LC pixels with appropriate phase levels (controlled by changing thevoltage applied to each pixel), so an incident optical beam is dynamically steeredalong arbitrary directions.
For a small incidence angle, the maximum steering angle of the opto-VLSI proces-sor is given by [10]
�max ��
Md�radians�, �1�
where M is the number of phase levels, d is the pixel size, and � is the wavelength ofthe incident beam. For example, a four-phase opto-VLSI processor having a pixel sizeof 5 �m can steer a 1550 nm laser beam by a maximum angle of �±4°. The maximumdiffraction efficiency of an opto-VLSI processor depends on the number of discretephase levels that the VLSI can accommodate. The theoretical maximum diffractionefficiency is given by [13]
� = sinc2��n
M � , �2�
where n=gM+1 is the diffraction order (n=1 is the desired order), and g is an integer.Thus an opto-VLSI processor with binary phase levels can have a maximum diffrac-tion efficiency of 40.5%, while a four-phase level allows for efficiency up to 81%. Thehigher diffraction orders (which correspond to the cases g�0) are usually unwantedcross-talk, which must be attenuated or properly routed outside the output ports tomaintain a high signal-to-cross-talk performance.
3. Reconfigurable 2D OCDMA Encoder–Decoder StructureThe proposed 2D OCDMA encoder and decoder structures are illustrated in Fig. 3. Atthe transmitter side, data pulses modulate a broadband light using an electro-opticmodulator (EOM). The generated optical pulses are then collimated and launchedtowards a transmissive grating plate, which spreads the wavelength components ofthe input light along different directions and maps them onto N pixel blocks on a 1D
Fig. 2. (a) Phase level versus pixel number for blazed grating synthesis, (b) correspond-ing steering phase holograms of the various pixel blocks, and (c) principle of beam steer-ing using an opto-VLSI processor.
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opto-VLSI processor. Each pixel block is driven by a digital phase hologram to steerthe incident wavelength component along predetermined directions. A wavelengthcomponent incident on a pixel block can either arbitrarily be steered along an opticalpath and coupled, through another grating plate, into an arbitrary port of an outputfiber collimator array, or be deliberately steered off track so that its power is notcoupled back into any port of the fiber collimator array.
Every collimated wavelength component diffracted off the opto-VLSI processor issteered by an appropriate angle using a wedge prism, which aligns it to the axis of afiber collimator element that couples it into its assigned fiber delay line. The coupledwavelengths are then delayed through fiber delay lines of different lengths that mapthem into different time chips within the bit period to avoid pulse overlapping. Thedelay (through delay lines) and attenuation (through beam steering) of the wave-length components enable different 2D codewords to be generated, thus realizing areconfigurable 2D OCDMA encoder.
At the receiver side, a fiber collimator is used to collimate the signal and launch thecollimated optical beam towards a transmissive grating plate, which spreads thewavelength components occupying the various chips along different directions andmaps them onto the active window of the decoding opto-VLSI processor. It is impor-tant to note that in order to retrieve the encoded signal, the decoding opto-VLSI pro-cessor must be loaded with phase holograms that are identical to those of the encod-ing opto-VLSI processor.
The wavelength components are then appropriately steered to fiber delay linesarranged in a reversed order in comparison to the transmitter delay lines. Thisenables time alignment of all wavelengths occupying the various time chips within abit period. Subsequently, the signal is detected using a high-speed photoreceiver.When the codewords of the encoder and decoder are matched, a high-peak autocorre-lation waveform is generated, which can be recognized using a threshold detector. Asa result, the codewords of the encoder and decoder can be matched only when the digi-tal phase holograms loaded on both opto-VLSI processors are the same.
4. Experimental Setup and ResultsThe experimental setup for demonstrating the principle of the proposed reconfigurable2D OCDMA encoder–decoder structure is shown in Fig. 4(a). Figure 4(b) shows a pho-tograph of the encoder–decoder setup. A low-coherent amplified spontaneous emission(ASE) source was launched into an EOM and intensity modulated with a non-return-
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to-zero periodic pattern of 10,000 at 12.5 Gbits/s (this is equivalent to a 2.5 Gbits/sreturn-to-zero pattern with a 20% duty cycle). The modulated light was collimatedusing a 1 mm diameter collimator, which was then launched to a 1200 lines/mm grat-ing plate. The grating plate spread the wavelength components of the collimatedbeam along different directions and mapped them onto the active window of the firstopto-VLSI processor. Both opto-VLSI processors used in this experiment have 1�4096 pixels and 256 phase levels, with 1 �m pixel size and 0.8 �m spacing betweeneach pixel. They were controlled using LabView software to generate optimized digitalholograms that independently steer the incident wavelength components along arbi-
Fig. 4. (a) Experimental setup for demonstrating reconfigurable 2D OCDMA structure.(b) Photograph of the encoder–decoder structure setup.
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trary directions. To demonstrate the principle of the proposed structure the codewordsgenerated were using five wavelengths, namely, �0=1551.6 nm, �1=1553 nm, �2=1554.5 nm, �3=1556.1 nm, and �4=1557.5 nm, and five times slots, namely, t0=0 ns,t1=0.08 ns, t2=0.16 ns, t3=0.24 ns, and t4=0.32 ns (corresponding to 0, 16, 32, 48, and64 mm fiber lengths), implemented using THORLABS reusable fiber-to-fiber splices of0.2 dB optical loss. Examples of three possible codeword patterns with five time slotsand five hop wavelengths have been examined to demonstrate the proof-of-concept ofthe proposed reconfigurable structure, as shown in Fig. 5.
In the first scenario, the first opto-VLSI processor was configured for the first code-word shown in Fig. 5, where digital phase holograms were loaded to couple back thewavelengths �0, �1, �2, and �3 towards t0, t1, t3, and t4, respectively, and substantiallyattenuate (steer away) wavelength �4. Figure 6(a) shows the digital phase hologramsloaded into the first opto-VLSI processor. These phase holograms were diffractionblazed gratings that steered only the wavelengths �0, �1, �2, and �3 for maximumbackcoupling into the fiber collimator array. Figure 6(b) shows the measured spectrumof the optical beams reflected off the first opto-VLSI processor. The measured inherentloss of the encoder–decoder, including the two-way fiber coupling losses, was �10 dB,and this loss has been compensated by the use of the erbium-doped fiber amplifier(EDFA). Figure 7(a) shows the encoded signal after being amplified by an EDFA.
Fig. 5. Examples of three codeword patterns in a system with five time slots and fivehop wavelengths.
Fig. 6. (a) Phase hologram of the first opto-VLSI processor, (b) measured spectrum ofthe reflected optical beams.
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At the receiver side the signal was collimated using a 1 mm diameter fiber collima-tor and the collimated optical beam was launched towards another 1200 lines/mmgrating plate that spread the wavelengths along different directions and mappedthem onto the active window of the second opto-VLSI processor. The latter was loadedwith the same phase holograms as those of the first opto-VLSI processor. The reflectedwavelengths were coupled back, and the fiber delay lines were placed in reverse order.
Fig. 7. (a) Encoded output signal with the first codeword. (b) Autocorrelation peakwhen the decoder’s and encoder’s codeword are matched. (c) The eye diagram of anerror-free transmission.
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Accordingly, the time delays between the wavelength chips, which were introduced bythe transmitter’s fiber delay lines, were equalized, and, hence, all wavelength compo-nents were overlapped over a single bit period. Subsequently, the coupled-back opticalsignal was detected by the high-speed photoreceiver and monitored using a high-speed digital oscilloscope. When the first and second opto-VLSI processors had thesame phase hologram configurations, the original input pulse was recovered, generat-ing an autocorrelation function, as illustrated in Fig. 7(b), which shows the detectedsignal when the encoder and decoder codeword are matched and Fig. 7(c) shows thecorresponding eye diagram.
Note that a mismatch between the encoder and decoder codeword results in a low-intensity output pulse (cross correlation). To demonstrate this, a second scenario wascarried out where the codeword of the encoder was left unchanged while the decoderwas reconfigured to match the second codeword illustrated in Fig. 5. As a result, across-correlation output signal, shown in Fig. 8(a), was obtained, revealing a mis-match between the encoder and decoder codeword. In another scenario, the secondopto-VLSI processor was configured to generate the third codeword as shown in Fig. 5.In this case, a cross-correlation function was also generated as shown in Fig. 8(b).
The experiments demonstrated that an autocorrelation function results only whenboth opto-VLSI processors were loaded with identical digital phase holograms andthat a cross correlation was observed otherwise. Moreover, it was noticeable that thelargest cross-correlation peak [Fig. 8(a)] slightly exceeded half of the autocorrelation
Fig. 8. (a) Cross-correlation function when the decoder was loaded with the secondcodeword. (b) Cross-correlation function when the decoder was loaded with the thirdcodeword.
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peak and that the autocorrelation peak remained easily distinguishable for differentno-match scenarios.
One of the most important features of the opto-VLSI processor is its beam steeringcapability. The opto-VLSI processor used in this experiment can steer the beam up to5°; therefore, by loading a proper digital phase hologram, it is easy to steer �2 to t1instead of �1 without mechanically changing the physical position of the delay fiber t1.As a result, wavelengths can be easily switched ON or OFF, and the order of thewavelengths can be easily changed if all the steering occurs within the 5°. It is alsoimportant to note that the proof of concept of the proposed structure was experimen-tally demonstrated at 2.5 Gbits/s; therefore, the fixed delays used in this experimentare enough to encode and decode data up to 2.5 Gbits/s. If higher speed is needed,only the delay lines need to be changed.
Note that in the proposed structure each node can transmit to all other nodes usinga single opto-VLSI processor; thus optical switching between encoders is not required.Therefore, the complexity of each network node is significantly reduced in comparisonto previously reported structures.
For the experimentally demonstrated OCDMA structure only ten users can beaccommodated. An additional wavelength increases the number of users to 20. It isalso important to note that the scalability of the proposed encoder–decoder structuredepends on the size of the active window of the opto-VLSI processor. With the currentdevelopments in LC technology, the active window of the opto-VLSI processor canpractically be as large as 20 mm�20 mm, enabling 32 different wavelengths to be pro-cessed simultaneously. Finally, issues related to precise delay line realization can besolved using integrated waveguides where delay lengths with submicrometer preci-sion can be achieved.
5. ConclusionWe have proposed and experimentally demonstrated a reconfigurable 2D (wavelength-time) OCDMA encoder–decoder structure for access networks. The structure employstwo 1�4096 pixel opto-VLSI processors that generate wavelength coding through theapplication of digital phase holograms and time coding using fiber delay lines thatmap the wavelength components into different time chips within a bit period. Experi-mental results have shown that a high autocorrelation peak is generated wheneverthe encoder and the decoder digital phase holograms are matched. Otherwise, a low-peak cross-correlation function is generated. The proposed 2D OCDMA encoder–decoder structure has been demonstrated at 2.5 Gbits/s.
AcknowledgmentThis work is supported by the Office of Science and Innovation, Government of West-ern Australia. The authors thank Zhenglin Wang and Rong Zheng for their assistancein the experiments and Adam Osseiran for useful discussions.
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