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Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital...

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1 Registers and Counters Chapter 6 Steve Oldridge Dr. Sidney Fels Topics • Registers Shift Registers Ripple Counters Synchronous Counters Other Counters • HDL Registers & Counters Overview • Register – Group of flip-flops – n-bits (1 per flip-flop) – n-bits of binary • Counter – Register with a fixed function
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Page 1: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

1

Registers and Counters

Chapter 6

Steve Oldridge

Dr. Sidney Fels

Topics

• Registers

• Shift Registers

• Ripple Counters

• Synchronous Counters

• Other Counters

• HDL

Registers & Counters Overview

• Register

– Group of flip-flops

– n-bits (1 per flip-flop)

– n-bits of binary

• Counter

– Register with a fixed function

Page 2: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

2

4-bit register

Parallel Load

Page 3: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

3

Shift Registers

Serial Transfer

Serial Transfer Example

Page 4: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

4

Serial Adder

State Table

Serial Adder Circuit

Page 5: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

5

Universal Shift Register

• Clear

• Clock

• Shift Right

• Shift Left

• Parallel load

• n Parallel Outputs

• Control

Universal Shift Register

Shift Register Controls

Page 6: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

6

Ripple Counters

Ripple Counter Timing Diagram

Close Up

Page 7: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

7

Counting Sequences

State Diagram of BCD counter

BCD Ripple Counter

Page 8: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

8

Three decade counter

Synchronous Counters

Binary Up Down Counter

Page 9: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

9

BCD Synchronous Counter State Table

4-bit Binary Counter

Page 10: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

10

Function of the Counter

BCD Counter

Page 11: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

11

Other types of Counters

Counter with unused states

Ring Counter

Page 12: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

12

Ring Counter

Johnson Counter

Johnson Counter

Page 13: Registers and Counters - University of British Columbiacourses.ece.ubc.ca/256/lectures/2010/Digital Logic Design...– Ripple Counter – Parallel Load – Ring Counter – Johnson

13

HDL Binary Counter

module Binary_Counter_4_Par_Load (

output reg [3:0] A_count, // Data output

output C_out, // Output carryinput [3:0] Data_in, // Data input input Count, // Active high to count

Load, // Active high to loadCLK, // Positive edge sensitive

Clear // Active low);

assign C_out = Count & (~Load) & (A_count == 4'b1111);always @ (posedge CLK, negedge Clear)

if (~Clear) A_count <= 4'b0000;else if (Load) A_count <= 4'b0000;

else if (Count) A_count <= A_count + 1'b1;else A_count <= A_count; // redundant statement

endmodule

Registers & Counters Review

• Register– Group of flip-flops

– D, J/K,T

• Counter– Register with a fixed function

– Ripple Counter

– Parallel Load

– Ring Counter

– Johnson Counter


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