Renesas Electronics America Inc. (C) 2010 Renesas Electronics America Inc. All Rights Reserved...

Renesas Electronics America Inc.

(C) 2010 Renesas Electronics America Inc. All Rights Reserved

SuperH SH-2A MCUsFAE Training

Nilesh RajbhartiProduct Marketing ManagerJune 2010, v1.0

(C) 2010 Renesas Electronics America Inc. All Rights Reserved2

Contents

Introduction to SuperH SH-2A MCUs

SH-2A Architecture

FREE SW From Renesas

Focus Products – SH7216 + SH7264

Demonstration Tools From Renesas

Where to get more information


WiFiSH, RX, R8C

High-end Connectivity

V850ESV850ES50MHz50MHz

RX600RX600100MHz100MHz

SH-2ASH-2A200MHz200MHz

Ultra Low Power

78K078K010MHz10MHz

78K0R78K0R20MHz20MHz

V850ESV850ES20MHz20MHz

R8CR8C20MHz20MHz

M16CM16C32MHz32MHz

Application Focused Solutions

TFT LCD Control

H8S/SXH8S/SX50MHz50MHz

RX600RX600100MHz100MHz

SH-2ASH-2A200MHz200MHz

General Purpose 1

6-b

it

32

-bit

MCU and MPU Solutions

32

-bit

32

-bit

32

-bit

8-b

it

16

-bit

Application Processor

SH-3SH-3200MHz200MHz

SH-4SH-4240MHz240MHz

SH-4ASH-4A600MHz600MHz3

2-b

it

Motor ControlSH, RX, R8C

Capacitive Touch

R8C

Industrial CANR8C, R32C, SH

Lighting78K0

R32CR32C64MHz64MHz 8

-bit


Evolution of SuperH Core

Without MMU(Managed by

Nilesh Rajbharti)

With MMU(Managed by

Brian Davis’ Team)

1993 1995 2000 2008

SH-1SH-1

SH-4ASH-4A

SH-2ASH-2A

Digital Audio, Automotive, Industrial, Consumer, Embedded microcontroller

Mobile, CIS, Industrial, Network, Digital AV Embedded processor

SH-2SH-2

SH-3SH-3

SH-4SH-4

Dual Core

Dual Core

Automotive Grade SuperH parts are managed by ABU


What is unique about SuperH MCUs?

Ultra fast performance Up to 400 DMIPS at 200MHz & 9 cycles of Interrupt Latency

Industry’s fastest 10nS flash memory technologyNo performance degradation as CPU runs faster; No need to execute from RAM

Large on-chip Memories & External Memory InterfacesUp to 1MB Flash, 1MB RAM; SDRAM, NAND Flash & Serial Flash Interfaces

Rich Connectivity peripherals10/100Mbps Ethernet, USB HS/FS Host/Device, I2S, CAN

Advanced Display Capability using low cost BOMAdd QVGA display without external frame memory (VGA in Q4/10)

Supported by leading Third Party SW & ToolsCMX, Eclipse, Express Logic, GCC, Jungo, IAR, Micrium, Segger, Swell

SH-2A contains the highest performance

embedded flash MCUs

SH-2A contains the highest performance

embedded flash MCUs

Available Double-precision 64-bit FPUOnly general purpose MCU with 64-bit FPU – precise & efficient processing


Target Applications

Factory AutomationPrecision Motion ControlIndustrial Connectivity

Fast I/O Control

Operator Panels

Scientific & MedicalSignal Analysis

Quiet Motor ControlConnectivity

Operator Panels

Building AutomationHigh-end Security Systems

Image ProcessingSpeech, Connectivity

Thermostat, Control Panel

Control Panels

Office AutomationImage Processing

Precise Stepper ControlConnectivity

Operator Panels

White GoodsEnergy Efficient Motor Control

Information DisplaysConsumerMedia Players

User Interfaces


Competitive Landscape

SAM3 (Cortex-M3)SAM7 (ARM7TDMI)

SAM9 (ARM9E)AVR32 (UC3A)

STR7 (ARM7TDMI)STR9 (ARM9E)

STM32 (Cortex-M3)

PIC32 (MIPS M4K)

TMS320F (C2000)Stellaris (Cortex-M3)

LPC2xxx (ARM7TDMI)LPC1xxx (Cortex-M3)

LPC3xxx (ARM9E)

MCF52xx (ColdFire V2)

Only SH-2A offer up to 400DMIPS of performance for embedded flash MCU Nearest competition offers about 106DMIPS

SH-2A MCUs use world’s fastest 100MHz single cycle flash Nearest competition uses 50MHz

Only SH-2A MCUs offer double precision (64-bit) FPU Very few offer FPU and that is single precision (32-bit) only

SH-2A MCUs shine when customer needs

performance & high-throughput

SH-2A MCUs shine when customer needs

performance & high-throughput


Tools Ecosystem

C/C++ Compilers

KPIT GNU Tools

FREE

RTOS & Middleware

Eval Boards

SH7216 Motor Control

Emulators

E10A-USB E200F

FREE

IDEs

FREE

Sample Code & Libraries from RenesasFREE

SH7216 RDK

= Device Specific


SH7125SH7125

Full SH-2/SH-2A Family Line-up

SH7080SH7080

General Purpose/

Motor/Inverter

Pins: 100 - 176Flash: 256/512 KBRAM: 16/32 KB

Pins: 64Flash: 16 - 128 KBRAM: 4/8 KB

SH7124SH7124Pins: 48/52Flash: 16 - 128 KBRAM: 4/8 KB SH7280

USB, CAN

SH7280USB, CAN

Pins: 100 - 176Flash: 128K - 1MBRAM: 8 - 32KB

SH7216Ethernet, USB,

CAN, FPU


CAN, FPU

Connectivity

Pins: 176Flash: 512K-1MBRAM: 64K – 128KB

ContactMarketing

SH7264LCD, USB,

CAN, FPU, Audio

SH7264LCD, USB,

CAN, FPU, Audio

HMI

Pins: 176/208Flash: 0RAM: 640K/1MB

SH7267LCD, USB

CAN, FPU, Audio

SH7267LCD, USB

CAN, FPU, Audio

Pins: 144/176Flash: 0 KBRAM: 1.5MB

SH7147CAN

SH7147CAN

CAN

Pins: 100Flash: 256 – 512 KBRAM: 12/16 KB

SH7137CAN

SH7137CAN

Pins: 80/100Flash: 128/256 KBRAM: 8/16 KB


FPU, Audio


FPU, Audio

Pins: 256Flash: 0RAM: 32KBSH7239

CAN, FPU

SH7239CAN, FPU

Pins: 120Flash: 256/512 KBRAM: 32/64 KB

10Kami alternative


Pop Quiz

What makes SH-2A MCUs unique in the industry? Superscalar & 100MHz Single Cycle Flash

Can SH-2A MCUs run Windows CE, Linux and VxWorks? No. Windows CE requires MMU and SH MCUs don’t have MMU

SH-2A MCUs are best choice against 100MHz and slower Cortex-M3 parts. True or False? False


SH-2A Architecture


SH-2A Executes 2 Instructions/Clock

ShiftPipeline

BranchPipeline

MultiplierPipeline

MemoryPipeline

Inst Queue 1

Inst Queue 2

Inst Decode 1

Inst Decode 2

Load/Store Pipeline

Arithmetic Pipeline

Integer Unit 32/64-bit Floating Point Unit

2.0DMIPS/MHz (v2.1) when executing from Flash

200MHz, 5-stage Pipeline Core

2 Instructions per Clock

Separate FPU Pipeline

IntegerPipeline 1

IntegerPipeline 2

8 Individual Pipelines

1. SH-2A executes 2 instructions/clock2. SH-2A delivers 2x

performance than traditional flash MCUs

1. SH-2A executes 2 instructions/clock2. SH-2A delivers 2x

performance than traditional flash MCUs


SH-2A offers the Highest DMIPS/MHz

Benefit: Do more work at same clock OR lower the clock & lower the power consumption

Source: Respective vendor’s web sites.

2

1.65 1.561.3 1.25 1.2

0.9

0

0.5

1

1.5

2

2.5

SH-2A RX600 PIC32 SH-2 Cortex-M3 AVR32UC3A

ARM7TDMI

DM

IPS

/MH

z

Confidential – Customer version of this slide is available


SH-2A Offers Fast Interrupt Response

Drawing not to scale

9 Cycles

9 cycles

CPULatency

SaveContext

(By Complier)User Code

RestoreContext

Typical MCUs

INTTrigger

Latency

CPULatency +

Save ContextUser Code

RestoreContext

SH-2A MCU

15Reg.

BanksLIFO

HW saves the context in register bank LIFO

OnePrimary

Reg.Bank

+

SH7216 Cortex-M3 ARM7TDMI PIC32

MCU Interrupt Latency 9 18+ 24 – 42 18 – 40+



SH-2A HW MUL, MAC & DIV Performance

Operation SH-2A Cycles Cortex-M3 Cycles PIC32 Cycles

32x32 = 64 2 3 – 7 2

32x32 = 32 2 1 N/A

16x16 = 32 1 N/A N/A

32x16 = 64 N/A N/A 1


32x32 + 32 2 2 N/A

32x32 + 64 4 N/A 2

16x16 + 64 3 N/A N/A


32÷32 = 32 34 or 36 2 - 12 9 – 34

SH-2A can execute other instructions in parallel while MUL, MAC, or DIV are in progress

Sources:1. Cortex-M3 Technical Reference Manual, Rev r1p1. Table 18.1 Instruction Timings. www.arm.com.2. MIPS M4K Software User Manual. Table 2.1 MDU Instruction Latencies (High Performance MDU). www.mips.com

Confidential

http://www.arm.com/

http://www.mips.com/


Pop Quiz

Some SH-2A MCUs offer 32-bit FPU. True or False False Some SH-2A MCUs offer 32/64-bit FPU

Cortex-M3 is specified to offer 12 cycles of Interrupt latency. It means Cortex-M3 based MCU can execute User ISR in 12 cycles after an interrupt event is received. True or False? False Due to bus & peripheral overhead, actual latency will be more.

While SH-2A multiply/divide operation is in progress, CPU can continue to execute next instructions. True of False? True. As long as the next instruction does not need MUL/DIV result.


SH-2A Uses Fastest Flash (10ns read time)

SH7216 STM32F LPC24xxAVR32 UC3A

PIC32 TMS320F28

Max Freq (MHz) 200 72 72 66 80 150

Flash Speed (MHz) 100 24 20 33 30 27

MCU operating frequency

Pro

cess

ing

perf

orm

an

ce

Competing MCU with 30 MHz flash

SH7216 with 100 MHz

flash

100 MHz 　

1 wait cycle

DIF E WBDIF E WBIF

2 wait cycles

DIF E WBDIF E WB

IF

3 or more

30 MHz 　

DIF E WBDIF E WBIF

Processing performance gap

Other vendors employ wide-bus & prefetch buffers but they still

cannot match 100MHz flash performance



SH-2A Prefetch Mechanism

SH2A CPUInternal RAM

Up to 64KB@ 1cycle

F bus(Instruction)

M bus(Data)

Flash Memory

200MHz (max.)

200MHz (max.)

128bit

f MHz

f MHz

f MHzf/2 MHz

f MHz

Prefetch Buffer

Branch Pre-decode

Instruction cache

ROM cache

Branch Prefetch Buffer

ROM Data

cache

Keeps pipeline full when executing sequential code

Eliminates branch penalty when executing

BRA, BSR

“Literals” don’t flush I-Cache

Max Freq: 100MHzNo Wait State

Required

Two cycle flash access when fetching first Instruction of ISR and Jump through Register Instructions All subsequent fetches are single cycles

SH-2A offers deterministic high performance for real-

world applications

SH-2A offers deterministic high performance for real-

world applications


How does Competition prefetch work?

http://techtrain.microchip.com/webseminars/documents/P32Prefetch_061008.pdf

STR91xF Manual http://www.datasheetarchive.com/datasheet-pdf/071/DSA00357684.htmlExpect STM32FXL Adaptive Real-Time Accelerator to be very similar

Prefetch is common

Mini Cache to minimize branch penalty Only effective for

“Localized” branches

Dedicated Branch cache to speed-up loops in recent “<5 hops”

Real-world apps with “>5 hop” loops don’t benefit

Confidential

Competition cannot deliver high performance when

code jumps a lot – i.e., real-world applications

Competition cannot deliver high performance when

code jumps a lot – i.e., real-world applications

http://www.datasheetarchive.com/datasheet-pdf/071/DSA00357684.html


SH-2A CPU(Superscalar)

On-chip RAM

F bus(instruction)

M bus(data)

32bit/1cyc

Cachecontroller

I bus(internal bus) 32bit/1cyc

DMACExternal

bus controlExternal busBridge

P bus(peripheral bus)

Timer A/D SCI PORT

32bit/1cyc

16bit, 1cyc @ 50MHz

Cache memory Instruction cache: 8KB

Data cache: 8KB

4way set associative (LRU)

On-chip Flash

ROM cache

128bit/2cyc

SDRAM I/F

SH-2A internal block diagram

FPUFPU

Flash MCUs Only

ROMless Only

SH-2A includes multiple busses optimized for

required data throughput

SH-2A includes multiple busses optimized for

required data throughput


SH-2A Supports Concurrent Transactions

CPU(Bus Master #1)

ExternalMemories

InternalMemories

Peripherals

DMAC(Bus Master #2)

Bus Masters can initiate transactions concurrently Concurrent transactions as long Master & Targets are unique ‘Writes’ are buffered or “posted”

New ‘Read’ can begin before previous ‘Write’ is completed – Useful when Peripheral bus is running at slower than CPU

‘Reads’ are always blocking

Targets

SH-2A is designed for high data throughput

SH-2A is designed for high data throughput


SH7216 External Memory Bus InterfaceFlash/ROM/ASIC

SRAM

BurstROM

SDRAM

Separate Read & WriteWait Cycles for each CS

8 CS Regions

Bus Arbitrator

SDRAM Auto Refresh

Little/Big Endian

EthernetMAC+PHY

8/16/32 Bus

Up to 4, 8MB Blocks

Up to 64MB

Flash/ROM/ASIC

A0 – A22,A24, A25

SDRAMA23/RD/WR#

SH7216

A23 not availabl

e to Flash!

Max 64MB per CS region< 64MB when using SDRAM and Flash/ROM/ASIC together

SDRAM + Flash in one system


Single & Double Precision Floating Point Unit

2MFLOPS/MHz – Total of 400MFLOPS @ 200MHz

IEEE754-compliant Easily share data with other systems

Single (32-bit) & Double (64-bit) Precision Precise and faster control loops & algorithms

Designed for Embedded Systems Automatic scaling of floating format Supports FMAC, FABS, FLOAT, FDIV, FSQRT etc.

Function(Double Precision)

Time* (nS)

sin 680

cos 650

tan 900

asin 995

acos 1225

atan 695

log 910

exp 950

pow 1140

* Based on SH7203 (SH-2A core with FPU) 200MHz execution from SDRAM with cache enabled Performance using flash-based MCU & FPU at 200MHz is not available at this time.

Capitalize on 32/64-bit FPU when customer needs

complex signal processing

OR advanced motor/motion control

Capitalize on 32/64-bit FPU when customer needs

complex signal processing

OR advanced motor/motion control


Pop Quiz

SH-2A CPU must wait for a Write to Peripheral to complete before it can initiate any Read. True or False? False. Writes are buffered.

When SH-2A MCUs operate beyond 100MHz, there will be performance penalty because the embedded flash is limited to 10nS read (100MHz). True or False? False SH-2A MCUs employ advanced ROM Cache module to provide

sustained, deterministic performance all the way to 200MHz


FREE SW From Renesas


SW from Renesas

Sample codes for major peripherals

Vector Control Motor Algorithms for SH7216

Open Source TCP/IP Stack

CAN API – compatible with R8C & R32C API

USB Device for SH7216 – CDC, MSC, HID

USB Host Stack for SH7264

GUI API – graphics library for SH7264 (2Q10)

Fixed Point Math for SH-2A

DSP Library for SH-2A FPU In Beta Now, available on request

Audio codec (mp3, WMA, AAC, OGG) licenses from Renesas

AES Library (128-bit block with 128/192/256-bit key sizes)


Signal Processing Library

DSP Library for SH2A-FPU

Available FREE to Renesas customers Binary library by default; Source upon NDA Beta available now

Implements IIR, FIR, FFT, Boxcar and Decimation Routines


CAN APIs for SHC

Compatible with R8C & R32C

Flash-over-CAN APIsAvailable on Renesas web site – REU05B0067PC Utility on www.am.renesas.com/CAN

CAN to UART Bridgewww.am.renesas.com/CAN

http://www.am.renesas.com/CAN





Current SH-2A Promotions


Ultra Fast Performance, Connectivity, Advanced GUI and Digital Audio

SH7216 + SH7264

Ultra fast performance Up to 400 DMIPS at 200MHz & 9 cycles of Interrupt Latency

Advanced Signal & Image Processing CapabilitiesSingle & Double precision Floating Point Unit; DSP Instructions

Large on-chip Flash & External Memory InterfacesUp to 1MB Flash with 128KB RAM; SDRAM, NAND Flash & Serial Flash Interfaces

High-throughput ConnectivityEthernet, USB HS/FS Host/Device, CAN

Advanced Display Capability using low cost BOMLCD Controller with on-chip frame buffer & video input

Reuse software & tools investmentCommon CPU, Peripherals, Compiler, Debugger & Third Party Infrastructure

Competitive PricesSH7264 starting from $6.50 & SH7216 starting from $7.00 (10k pieces)


Competitive LandscapeFor Real-time Control

Renesas: SH7216 Freescale: ColdFire MCF52 ST: STR9 TI: TMS320 NXP: LPC17xx, LPC29xx Microchip: PIC32 Atmel: SAM9

Renesas: SH7264 Freescale: i.MX21, 27L (ARM9) ST: SPEAr Basic300 (ARM9) TI: TMS320DM335 (ARM9) NXP: LPC3230 (ARM9/FPU) Atmel: SAM9G45 (ARM9)

For GUI Control

2

1.561.25 1.2

0.9

0

0.5

1

1.5

2

2.5

SH7216/7264Core

A B C D

DM

IPS

/MH

z

SH7216/7264 CPU Offers highest DMIPS/MHz

Source: Respective vendor’s web sites.

27

C

30

B

33

A

2024100Flash

Speed (MHz)

EDSH7216

SH7216 Uses Fastest Flash

Only SH7264 offers 1MB of on-chip RAM


ApplicationsKey Features

Key Features & Applications

SH7216/14

100/200MHz Superscalar Core 32- & 64-bit FPU Up to 1MB Flash & 128KB RAM 32KB Data Flash Ethernet, USB Device, CAN 12bit ADC

AC Drives Motion Control Distributed I/O Commercial Building Access/Security AED Sleep Screening

SH7264/62

Operator Interface (HMI) Automated Visual Inspection Audio with images Video (no compression)

144MHz Superscalar Core 32- & 64-bit FPU Up to 1MB SRAM USB HS Host & Device, 2x CAN LCD Controller Video Input and graphics blending Digital Audio support I2S, SPIDF


TFT LCD

QVGA

Digital RGB16-bit

Bus i/fROM,SRAM,

NOR 、 PCMCIA

RSPI 2ch (serial IF up to 48Mbps,1ch forserial flash boot)

NAND IF

Video In Display CTL(VDC3)

＋NAND

Flash

＋NOR

Flash

＋SDRAM

＋Serial

Flash

SH7264 – Minimal systemBT.656

Video Videodecoder

SRAM 1MB

SDRAM

NOR - Flash

Serial - Flash

NAND - Flash

SH2A-FPU

144MHz

Page 0 (160kB)

Page 1 ( 80kB)

Page 2 ( 80kB)

Page 3 (160kB)

Page 4 (240kB)

Page 5 (304kB)

VRAM1-QVGA

VRAM2-QVGA

Program,

Work

VideoData

Serial-Flash + On-Chip SRAM (VRAM+ Program + Work)

Example Minimal System => lowest System BOM Cost


SH7262 / 7264 Application Example

• Superscalar – 345DMIPS• Floating Point Unit


SH7216 Application Example


Kernels

µC/OS-IIµC/OS-III

µC/FS MiddlewareµC/GUI

µC/BuildingBlocks

µC/Probe

µC/TCP-IP

µC/USB-Device µC/USB-Host

µC/Bluetooth

µC/CAN µC/Modbus

* Business qualification required – contact Renesas


Third Party Support by SW Components

Third Party IDE Compiler Debug RTOSTCP/IPStack

USB Device

USBHost

Graphics File

CMX - - -SH7216

SH7264SH7216 SH7216 No - SH7216

Express Logic - - -SH7216SH7264

SH7264SH7216

SH7216 SH7264 SH7264SH7216

SH7264

FreeRTOS.org - - -SH7216

SH7264SH7216 - - - -

IARSH7216SH7264

SH7216SH7264

SH7216SH7264

- - - - - -

KPIT GNU ToolsSH7216SH7264

SH7216SH7264

SH7216SH7264

- - - - - -

Jungo - - - - - SH7264 SH7264 - -

Micrium - - -SH7216SH7264

SH7216SH7264*

SH7216SH7264*

SH7264* SH7264*SH7216SH7264*

Micro Digital - - - No No No SH7264 - No

RoweBots - - -SH7216SH7264

SH7216*SH7264*

SH7216*SH7264*

SH7264* -SH7216SH7264

Segger - - -SH7216SH7264

SH7216 SH7216 SH7264* SH7264SH7216SH7264

Swell - - - - - - - SH7264 -

* = In DevelopmentNo = Not Yet

‘-’ = Not Offered


Demonstration Setups


Low Cost Motor Control Demo Board

On-board 24VDC PMAC Motor USB Powered to 6000 RPM External power to 10000 RPM Drive larger motor with external

power module

Pre-programmed Vector Control Algorithm 3 Shunt Current Detection Hall & Encoder Connectors

PC Application to learn/experiment Real-time display of parameters

Contact your Renesas contact to request yours

New!


Learn, Evaluate & Develop

A comprehensive tool to learn, evaluate, & prototype using SH7216

SH7216 Board+

USB Cable+

Power Supply

All Software is downloaded

from Micrium Site

uC/OS-III Book with Example Applications

+

+

Learn RTOS Theory of operation & Usage SH7216 Architecture

Evaluate Pre-programmed Demo Application Example Applications with Full

Source Prototype

Full-featured, flexible board Debugger included on the board Power supply included

MSRP: $199

µC/OS-IIIµC/Probe

Available from bookstore.micrium.com

Book Only MSRP: $89

New!


SH7216 Demo Board

Debug USB

Ethernet

User USB

User Switches

Ethernet PHY with IEEE1588 User Pot

Microphone

Stereo Audio Out

RS-232

Micro SD Card Slot

Character LCD

LED for Spinning Motor SimulationApplication Headers

On-board Debug

P/N: YRDKSH7216 for US - Suggested Resale: $199YRDKSH7216W for W/W - Suggested Resale $209

Available from bookstore.micrium.com & Disty Partners

Thermistor

3 Axis Accelerometer (ADI)


IEEE1588 Solution using SH7216

Precision Time Protocol for Motion Control & Factory Automation

Sub-10nS accuracy Proven Software Components from Reputable SW Vendors Ultra Fast CPU with 100MHz Single Cycle Embedded Flash Advanced Motor Control Units & FPU for precise Motion

Control

Micrium RTOS

MicriumTCP/IP Stack

IXXATPTP Component

User Application

SH7216

SMSCOr

National Semiconductor

PHY + Timestamp

SMSCOr

National Semiconductor

PHY + Timestamp

MII


SH7216 CAN Demo Case

“Mix & Match” CAN RSKs

Support now includes: R8C, M16C, R32C and SH2/2A

S/W includes: CAN API and Flash over CAN

Suit cases built for customer demos

API, Demo Code, Training Material & Kit all based on Standard RSKs

Contact Renesas to reserve one


Media Player Demo using SH7264 RSK (QVGA & VGA)

Demo application, Image and music player Play MP3/WMA/AAC while viewing

JPEGs USB Thumb Drive SD Memory Card

Uses Express Logic ThreadX, USBX, FileX, PEGX (resold

from Swell SW)

Demo available for QVGA VGA External VGA Monitor

Made available by download or CD via Renesas FAE


More information on Renesas Intranet

Intranet: Consumer & Industrial Business Unit > Product Marketing & Solutions Group > Product Families > High-End > SuperHhttp://home.rea.renesas.com/consum_indust/ProductMarketingSolutionsGroup/ProductFamilies/HighEnd/SuperH/index.html#P79_491

Renesas Electronics America Inc.(C) 2010 Renesas Electronics America Inc. All Rights Reserved

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