+ All Categories
Home > Documents > Report 2

Report 2

Date post: 19-Jul-2016
Category:
Upload: jeevrkg
View: 6 times
Download: 0 times
Share this document with a friend
Description:
report
48
EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT VISVESVARAYA TECHNOLOGICAL UNIVERSITY “Jnana Sangama”, Belgaum-590014, Karnataka. EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT carried out at Defence Avionics Research Establishment,DRDO SUBMITTED IN PARTIAL FULFILLMENT FOR THE AWARD OF MASTER OF ENGINEERING In DIGITAL ELECTRONICS AND COMMUNICATION ENGG For the academic year 2013-2014, Submitted by JEEVITHA T USN: 1DS12LEC06 Under the Guidance of INTERNAL GUIDE NAME : EXTERNAL GUIDE NAME : Mrs. Kiran Gupta Mr.Hemanth Vasant Paranjape 1 | Page
Transcript
Page 1: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

VISVESVARAYA TECHNOLOGICAL UNIVERSITY

“Jnana Sangama”, Belgaum-590014, Karnataka.

“EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR

PULSE DETECTION AND MEASUREMENT”

carried out at

Defence Avionics Research Establishment,DRDO

SUBMITTED IN PARTIAL FULFILLMENT FOR THE AWARD OF

MASTER OF ENGINEERING In DIGITAL ELECTRONICS AND COMMUNICATION ENGG

For the academic year 2013-2014, Submitted by

JEEVITHA T

USN: 1DS12LEC06

Under the Guidance of

INTERNAL GUIDE NAME: EXTERNAL

GUIDE NAME:

Mrs. Kiran Gupta Mr.Hemanth Vasant Paranjape

Professor, Scientist ‘E’

Dept of E & C DARE,DRDO

1 | P a g e

Page 2: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Department of Electronics & Communication

DAYANANDA SAGAR COLLEGE OF ENGINEERING

Shavige Malleshwara Hills, Kumaraswamy Layout, Bangalore – 560 078

CERTIFICATE

This is to certify that Jeevitha T carried out the Project on “Evaluation of polyphase FFT architecture

for pulse detection and measurement” under my guidance for the subject “Project” for the final year of

Master of Technology in Digital Electronics & Communication at DayanandaSagar College of

Engineering.

Head of Department, Assistant Professor,

Dr.Girish.V.Attimarad Prof. Kiran Gupta

--------------------------------- ---------------------------------

2 | P a g e

Page 3: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

ACKNOWLEDGEMENT

The satisfaction and euphoria that accompany the successful completion of any task would be

incomplete without the mention of the people who made it possible, whose constant guidance and

encouragement crowned our effort with success.

I wish to place on record my grateful thanks to Dr.Girish.V.Attimarad,Head of the Department,

Electronics and Communication Engineering, for providing encouragement and oppurtunity.

I would like to thank my internal project guide, Prof.Kiran Gupta, Department of Electronics

and Communication Engineering for her valuable guidance and time to time evaluation of the Project.

I extend my gratitude to Dr. K.L. Sudha for her kind co-ordination in the project phase.

I would like to thank my external project guide, Mr. Hemant Vasant Paranjape, Scientist ‘D’,

Defence Avionics Research Establishment,DRDO for her valuable guidance and time to time

evaluation of the Project.

I would also like to thank Mr. Abhijit S Kulkarni, Scientist ‘C’, Defence Avionics Research

Establishment,DRDO for his timely guidance and support.

My thanks to the staff of the department of ECE, DSCE for the kind cooperation.

Submitted by:

JEEVITHA T

1DS12LEC06

3 | P a g e

Page 4: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Evaluation of Polyphase Filter architecture for Pulse

detection and measurement

Introduction:

Filtering is an important and necessary operation in any receiver system. A filter is a system that

alters the spectral content of input signals in a certain way. Common objectives for filtering include

improving signal quality, extracting signal information, and separating signal components. Filtering can

be performed in the analog or digital domains.

The major advantages of digital processing over analog processing are programmability,

reproducibility, flexibility and stability. Since digital processing algorithms are implemented as computer

programs or firmware, it is very easy to change any parameter (for example filter gain, filter pass band

width etc.) compared to analog processing.

Abstract:

Polyphase filtering is a multirate signal processing operation that leads to an efficient filtering

structure for hardware implementation. Polyphase filtering parallelizes the filtering operation through

decimation of the filter coefficients, h(n). Polyphase filters can also be used to sub-band the frequency

spectrum, thus producing a filter bank. FIR filters are commonly used in DSP implementations. FIR

filters are linear phase filters, so phase distortion is avoided

Block Diagram:

4 | P a g e

Page 5: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Design Procedure:

The incoming N data samples are distributed in M branches and an M point FFT is performed. A

given M point FFT divides the input frequency band into M fs/M filters. Number of points M is selected

based on time resolution required. The decimation results in gaps in the frequency domain. Hence each

FFT filter must be widened to cover the gaps. This is done by applying time domain window to the

incoming data. Also the update rate can also be controlled by selecting proper values of M and N.

Polyphase FFT approach allows us to control filter skirts, degree of overlap to meet our system

parameters.

Polyphase filters are commonly used in Mobile communications for realizing hardware efficient

filters for channelization. The present work aims at implementing this approach for ESM application and

evaluating it against other proven techniques.

Software used: Matlab.

5 | P a g e

Page 6: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

INTRODUCTION

The wideband digital receiver presented in this research is designed using a unique approach of

decimation in frequency to allow a trade between frequency resolution and update rate to improve the

time of arrival estimate. By designing the architecture generically and defining a set of design parameters,

system level engineers can generate wideband digital receiver architectures to suit the specific needs of

the EW system.

A simple block diagram of the Channelized Wideband Digital Receiver. The digital receiver consists of a

decimation filter, FFT, and encoder/signal processor that outputs a PDW. The shaded block contains the

decimation filter and FFT.

The shaded block is realized as a polyphase DFT which uses decimation in frequency to filter the

incoming input data and produce a frequency spectrum as output.

6 | P a g e

Input sampl

es

Encoder(para-

encoder)

Decimation filter

FFT PDW

Spectrum estimator

Page 7: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

FREQUENCY CHANNELIZATION

Channelization is one of the most important operations in building digital electronic

warfare (EW) receivers. The equivalent analog operation is the filter bank. Therefore, digital

channelization can be considered a digital filter bank. It can also be considered as an TV-port

network with one input and

N-1 outputs.

The only practical approach to building a wideband digital EW receiver with today's

technology is through channelization. A common method of performing channelization is by

employing the fast Fourier transform (FFT).

The main objectives of a receiver are to determine the number of input signals and their

frequencies. The circuit used to accomplish these goals is referred to as the encoder.

The encoding circuit is the most difficult subsystem to design in an EW receiver. In an analog

filter bank, the shape of the filter is difficult to control, and it is difficult to build filters with

uniform performance such as the bandwidth and the ripple factor, shape of each individual filter

in a digital filter bank can be better controlled. As a result, the encoder should be slightly easier

to design because it does not need to compensate for the filter differences.

FILTER BANKS

The straightforward approach for building a filter bank is to build individual filters, each

one with a specific center frequency and bandwidth. Figure shows such an arrangement. Each

digital filter can be either a finite impulse response (FIR) or infinite impulse response (IIR) type.

Theoretically, each filter can be designed independently with a different bandwidth or

shape. In this arrangement, if the input data are real (as opposed to being complex) the output

data are also real. The output is obtained through convolving the input signal x(n) and the

impulse response of the filter h(n). One of the disadvantages of this approach is that the

operation of the filter bank is computationally complex.

It is desirable to build a receiver with uniform frequency resolution; that is, the filters

have the same shape and bandwidth. It is easier to build such a filter bank through FFT

techniques than by using individual filter design because there is less computation.

7 | P a g e

Page 8: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

POLYPHASE FFT FILTER BANK:

A block diagram of a polyphase DFT is shown in Figure. For a sample size

N and decimation factor M, there are N/M = D channels and filters. Each separate

channel decimates the incoming data by D and streams the data in parallel through

each filter. The number of coefficients per filter is always equal to the decimation factor, M.

8 | P a g e

Page 9: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

For the case where the sample size is N=256 and with the decimation factor of M=8

,N/M=D=32. therefore there a total of 32 channels and hence 32 filters and each filter has 8 co-

efficients and each incoming channel will decimate the incoming data by a factor of 32 and then

performs the filtering as shown in the figure.

9 | P a g e

Page 10: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

10 | P a g e

Page 11: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Decimation Filter + FFT design:

The filter is designed in three stages. The first stage consists of the design of an FFT filter bank.

The second stage is where the algorithm is applied. the third stage results in the desired filter

design.

STAGE 1: FFT filter bank

For a rectangular window in the time domain the corresponding output in the frequency

domain is a sine function and the response is shown in Figure.

This shape represents the response of one filter output. This filter shape is not desirable because

the sidelobes are very high.

11 | P a g e

Page 12: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

these figures show the response of adjacent filters. The first represents a marginally overlapping

filter bank. The second represents non- overlapping filter bank.

12 | P a g e

Page 13: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

STAGE 2: Decimation in the frequency domain:

ALGORITHM:

1. Decimation also can be used in the frequency domain processing. In this section, the FFT

outputs will be decimated. This operation can decrease the complexity of the FFT

operation. Instead of presenting a general case, a special case will be presented because

the notation will be simpler. Let us assume that the outputs of the 256-point FFT are

decimated by 8. A 256-point FFT can be written as

where N = 256.

2. There are 256 outputs in the frequency domain. If every eighth output is kept and the

other outputs are discarded, the resulting outputs are k = 0, 8, 16, . . . , 248. There are a

total of 32 (256/8) outputs. These outputs can be written as

3. First let us arbitrarily choose two frequency components k = 16 and k = 248 and rewrite

in slightly different form. The results are

13 | P a g e

Page 14: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

4. In the above equations the relation of e− j2 πn= 1 when n integer is used. Now let us define

a new quantity y(n) as

Each y(n) value contains a total of 8 data points. This operation can be graphically represented in

Figure.

14 | P a g e

Page 15: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

In this figure, the 256 input data points are divided into eight 32-point sections. The beginning

data point of each section is shown. These eight sections are stacked and summed vertically as

shown in the figure. The results are the 32 y(n) values.

5. Using these y(n) values, the FFT results can be rewritten as

15 | P a g e

Page 16: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

6. All these equations can be written into one as

where k = 0, 1, 2, . . . , 31; and w = 0, 1, 2, . . . , 31. The output X(8k) can be relabeled as Y(k);

thus, the above equation can be written as

This equation represents a 32-point FFT. In order to obtain the outputs of a 256-point FFT

decimated by 8, a 32-point FFT can achieve the goal. Thus, the design of the FFT can be

simplified. The input signal must be manipulated, however, in order to obtain the desired result.

A general statement without further proof will be presented here. If one wants to perform

an TV-point FFT and the outputs in the frequency domain are decimated by M, one can achieve

the goal by performing an N/M-point FFT. A new input format y(n) must be built first. The

generalization of the y(n) can be written as

where n - 0, 1, 2, . . . , (N/M) - 1. The outputs in the frequency domain can be obtained as

the results are as shown in the figure:

16 | P a g e

Page 17: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

This shows the output of the single filter.

This shows the decimated filter bank.

This filter bank has many holes (high insertion loss region). If an input signal falls in one of the

holes, the receiver will miss it entirely. The shape of this filter is definitely unacceptable.

17 | P a g e

Page 18: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

STAGE 3: Windowed decimated FFT filter bank:

ALGORITHM:

1) To widen the individual filters and at the same time suppress the sidelobes, a window (or

weighting) function can be applied to the input data. There are many different window

functions. The one used here is the Parks-McClellan window because it can provide the

desired frequency response.

The time domain and the frequency domain response of the window function generated

by the FDATOOL is as shown in the figure:

This shows the time domain response of the window function. The design parameters involved

are :

N=256;

M=8;

δ1= 0.01;

δ2=0.001;

fs=3000MHz;

18 | P a g e

Page 19: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Fp =fs/(N/M) ;

Fs = 2*Fp;

This gives the frequency domain response of the window function.

The input data x(n) will be modified by the window function h(n). Here, h(n) instead of w(n) is

used for the window function because h(n) will be used to represent the impulse function of a

filter. The resulting data xm(n) used as the input of the FFT can be written as

where n = 0, 1, 2, . . . , 255.

2) As stated previously, the outputs are decimated by 8.Under this condition the modified

data can be used to find the y(n) as

where n = 0, 1, 2, . . . , (N/M) - 1. A few y(n) terms are written as

19 | P a g e

Page 20: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

If a 32-point FFT is performed on these y(n) values, 16 individual filters will be generated. Each

filter shape is as shown in Figure.

The filter bank so generated is:

20 | P a g e

Page 21: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

21 | P a g e

Page 22: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Advantages of Polyphase Filtering:

First, by parallelizing the filter through polyphase decomposition, the sampling rate of

each individual filter is reduced by a factor of 1/D, where D is the number of filters.

A second significant advantage to using the channelized polyphase filtering

method is an increase in time resolution, which improves the TOA and PW calculations

in an EW receiver.

22 | P a g e

Page 23: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Electronic Warfare Receiver Model In Software

The basic functions of the EW receiver can be generalized into three groups:

1. detection of the incoming signal

2. track detection(tracking of the radar pulses)

3. parameter measurement of the input signal(interleaved pulse train)

Detection:

the overall functions that are performed in the detection are:

1. accepts the input samples.

2. the algorithm of decimation in frequency domain will be implemented here in this

module.

3. computes the FFT of this processed data.

4. determines four peaks(corresponding to maximum four inputs) with the highest

magnitude taking into consideration side lobe rejection.

Track detection:

enables monitoring of the target throughout its life time.

Parameter measurement:

this is where the important parameters of the input signal are measured such as:

1. frequency of the input pulse

2. pulse width

3. time of arrival of a pulse

4. power of the pulse.

23 | P a g e

Page 24: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Generation of the input signals

Input / test signals are generated in matlab:

the parmeters that are used to generate the test signals are:

1. frequency varied from 700-1000MHz.

2. pulse width 100ns - 200μs

3. delay 0-500ns

4. pri(pulse repetition interval) 5-10μs

5. power (expressed in dBm) −20-7 dBm

24 | P a g e

Page 25: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

the flowchart for the generation of the input signals are as shown:

1. Known_pattern:

25 | P a g e

Page 26: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

2. test_case_generator:

26 | P a g e

Page 27: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

some of the input signals that are generated are as shown :

1. the signal is an interleaved pulse train of two signals of frequencies 1000MHz and

900MHz.

the FFT of the above input signal is as shown below:

27 | P a g e

Page 28: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

the information about the input is stored in a text file as shown below:

28 | P a g e

Page 29: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Receiver Algorithm

detection:

1. The input data/ samples are stored in samples.txt

2. Grouping of the data begins :

P = length(A);

P = P - mod(P,256);

L = (P/N);

where A is a variable which contains the imported data (samples.txt)

3. Design an equiripple low pass FIR filter with the following parameters:

• Fs=1350MHz

• Fp=21.09375MHz

• Fs=42.1875MHz

• Wp=1/64

• Ws=1/32

Fdatool is used to generate the filter co-efficients.

H(n) co-efficients.

Decimation in the frequency domain is applied on the incoming data:

29 | P a g e

Samples(14080)

L21

1 2 3……………………

256

P= P- mod(P,256) Mod(x,y)= x-n.*yn = floor(x./y)

Consider an example:

Page 30: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Let x(n) be the input, h(n) be the filter co-efficients :

5.Calculate the 32 point FFT of the processed data.

6. Compute the magnitude of complex data(FFT) samples. Determine the first peak with the

highest magnitude. Done by using a “MAX” command.

fft_frame1 = (fft(yn,32))

[magn1 pos1]=max(fft_frame1(1:16))

7.Calculate its adjacent peaks

30 | P a g e

Pos1=1

Magn5=0Magn6=0

Magn5 =fft_frame1(pos1+1)

Magn6 =fft_frame1(pos1-1)

no

yes

Page 31: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

8. Also calculate the inphase(I1) and quadrature phase(Q1) data of the fft_frame1 using the

REAL and IMAG commands respectively.

I1 = real(fft_frame1)

Q1 = imag(fft_frame1)

9. Calculate the magnitude of the complex data samples. And store this data in a variable c.

10. Apply the peak detection algorithm. The inputs that are passed to the algorithm are c and

pos1.

11. Once the peak detection algorithm is completely executed the final result now contains four

peaks i.e., four maximum peaks (magn1,magn2,magn3,magn4) and their positions (pos1,

pos2,pos3,pos4) respectively.

12. once the peaks have been identified compare them with the threshold to check its validation.

13. then store these valid peak positions in fft_freq1, fft_freq2, fft_freq3, fft_freq4 respectively

which is nothing but the fft centre frequency.

31 | P a g e

Page 32: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

peak detection algorithm:

1. The algorithm determine 4 peaks with highest magnitude from every frame, taking into

consideration side lobe rejection.

2. The parameters that are passed to sidelobegaurd are magnitude of the elements of

fft_frame1 and pos1.

3. Concept of bandpass sampling:

• Used to sample a continuous bandpass signal centred about some frequency other

than zero.

• The sampling freq in this case is calculated as:

For ex: let fc=1000MHz and B=500MHz

Then 1500MHz ≥ fs ≥ 1250MHz. Fs=1350MHz is used.

Now converting these translated frequencies into DFT bins we have:

32 | P a g e

fc-B/2 =750MHz fc=1000MHz fc+B/2=1250MHz

fs- (fc-B/2) =600MHz fs-fc=350MHz fs-(fc+B/2)=100MHz

Page 33: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

In case of a single signal:

1.The inputs to the function are c(magnitude of the complex FFT data) and pos1.

2. The output of the function is a sequence ‘d’.

3. The first peak and its side lobes are eliminated.

33 | P a g e

pos1=1

d=c

16≥pos1≥3

ret

d(i-1)=c(i-1) & d(i)=0

d=c

Calculate the first differential

D(i-1)>0 & D(i)<0

no

yesyes

no

no

Page 34: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

For more than a single signal:

1.The inputs to the function are c(magnitude of the complex FFT data) and pos1.

2.The output of the function is a sequence ‘d’ with the first peak and its side lobes .

34 | P a g e

pos1=1

d=c

16≥pos1≥3

ret

d=c

no

yesyes

no

S8= .0003 ; slg8=c(pos1)*s8 S7=.0005 ; slg7=c(pos1)*s7 S6=.001 ; slg6=c(pos1)*s6 S5=.0501 ; slg5=c(pos1)*s5 S4=.1585 ; slg4=c(pos1)*s4 S3=.4585 ; slg3=c(pos1)*s3 S2=.631 ; slg2=c(pos1)*s2

S1=1 ; slg1=c(pos1)*s1

If(pos1-i)>slg(i) then d(pos1-i)=c(pos1i) else

d(pos1-i)=0

Page 35: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

The results for the previous input are as shown below:

35 | P a g e

Page 36: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Overview:

Peak Detector has the following functionalities:

1.Accept the data from the FFT module

2.Compute the magnitude of the complex data samples received

3.Determine 4 peaks with highest magnitude from every frame, taking into consideration side lobe

rejection.

36 | P a g e

Page 37: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

track detection:

1. track detection algorithm can be generalized into two process:

detecting the rise and the fall of the pulse

tracking the pulse in between the rising edge and the falling edge of

the pulse

37 | P a g e

Track detection:

Set four filter indices(filt_index1,filt_index2,filt_index3,filt_index4) for four input pulses.

The local copy of fft_freq1 is made and will be stored as r1.

The flowchart to detect a rising edge and a falling edge as well as tracking a peak is as shown:

Page 38: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

38 | P a g e

Rise1=

017≥ r (i+1)≥

3r(i+1)≠filt_index2,3,4Initialise rise1=1,

filt_index1=r(i+1), toa_coarse=i, rising

power,Rising frme=i+1, and

latched power. Rise1=0

no

nono

yes

yes

yes

end

end

Rise1=1

r(i+1)≠filt_index1

,2,3,4

Initialise rise1=0, filt_index1, fall_time, falling power

Initialise the latched power

no

no

yes

yes

end

end

Page 39: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Parameter measurement

1.The parameters that are passed to the parameter measurement are:

• freq

• Toa_coarse

• I,Q data

• PW_coarse

• Rising power, falling power, max power.

• magn1,magn5,mag6(the three values computed during detection)

39 | P a g e

Page 40: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

Pulse width and time of arrival calculation

1.Calculate the approximate pulse width :

• Pulse width= PW_coarse*(N/fs)

2. Calculate the power ratios:

• Power_ratio_start = sqrt(rising_power)/ sqrt(max_power)

• Power_ratio = sqrt(power)/ sqrt(max_power)

• Power_ratio_end = sqrt(falling_power)/ sqrt(max_power)

3. Calculate the offset at the start and end of the pulse:

• toa_offset_end = (power_ratio_fall)*(N/fs)

• toa_offset_start = (power_ratio_start)*(N/fs)

4.Recalculate the pulse width as:

• width = pulse width + ( toa_offset_start) + (toa_offset_end)

5. Similarly the TOA of a pulse can be calculated as:

• Toa_fine= Toa_coarse *(N/fs) – (toa_offset_start)

40 | P a g e

Page 41: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

41 | P a g e

Frequency calculation:

The frequency is calculated by the phase measurementsThe look up table method used earlier to calculate the phase was inaccurate.Hence we use the octant method.

4. Depending on the octant in which the signal lies the phase is calculated as:

Page 42: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

5. The frequency is then calculated as:

φ =ωt

42 | P a g e

Refining the frequency calculation:

6. Consider the figure where the response in the frequency domain traverses three samples.

7. These three samples can be used to provide an estimate of the peak location between bins, δ , which can then be added to the peak index, k , to provide a fine estimate of the tone frequency.

Page 43: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

result:

43 | P a g e

8. Calculate the centre frequency as: freq = (fft_freq-1)*(fs/N)

errf< x

Frequency=freq +errf

Final_freq=fs-frequency

Frequency=freq - errf

noyes

Page 44: Report 2

EVALUATION OF POLYPHASE FFT ARCHITECTURE FOR PULSE DETECTION AND MEASUREMENT

44 | P a g e


Recommended