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Research Activities in Power Electronics at UCF. Presentation at Princess Sumaya University for Technology. Florida Power Electronics Center Orlando, Florida USA [email protected]. Outline of topics. About Florida Power Electronics Center Single-Stage PFC Converters - PowerPoint PPT Presentation
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Research Activities in Power Electronics at UCF Florida Power Electronics Center Orlando, Florida USA [email protected] Presentation at Princess Sumaya University for Technology
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  • Research Activities in Power Electronics at UCF Florida Power Electronics CenterOrlando, Florida [email protected] atPrincess Sumaya University forTechnology

  • Outline of topics About Florida Power Electronics Center Single-Stage PFC Converters Low Voltage DC-DC converters Inverters Generalized Analysis of DC-DC Converters

  • WELCOME TO FLORIDAOrlandoArea

  • Florida Power Electronics CenterPower Factor Correction (PFC) Circuits - NASASoft-Switching DC-DC Converters - I-4 Florida InitiativeLow voltage AC-DC and DC-DC Converters - NSFDynamic Modeling and Control - NSFElectromagnetic Interference and Compatibility - NSF Inverter Application / Photovoltaic Cell Industry & I-4 Dr.Issa Batarseh DirectorDr.Wenkai Wu Asst DirectorHigh Frequency AC DPS NSF & I-4 Smart Electronic Load Maximum Power Point Tracking System

  • Topologies and Converter System Dr. Issa Batarseh Magnetics Dr. Thomas Wu Power Devices Dr.J J Liou Modeling and Control Dr.Zhihua Qu Packaging Dr.Louis ChowMultidisciplinary Research Group

  • FloridaPEC - Team Christopher IannelloJaber A.Abu QahouqWei GuWenkai WuWei HongKhalid RustomJoy MazumdarShailesh AnthonyDuy BuiAbdelhalim M AlsharqawiShiguo LuoJia LuoSongqrian DengPeter KornetzkyJay VaidyaShilba ReedyFloridaPEC.engr.ucf.edu

  • AC/DC converter power supplyTelecommunication device, and other industrial equipmentComputerTV setsMedical equipment~ConverterAC SourceDC LoadPower Conversion

  • Single-Stage PFC Converters

  • For linear load:For nonlinear load :Definition of Power Factor

  • --Distortion factor, where--Displacement factor

  • Typical Line Current Waveform Without PFCLine current is zero when vl(t) < vc(t). PF 0.67 THD >110%

    Chart1

    100

    81

    60.6

    37

    15.7

    2.4

    6.3

    7.9

    Harmonic number

    Current magnitue (%)

    Sheet1

    1100

    381

    560.6

    737

    915.7

    112.4

    136.3

    157.9

    Sheet1

    Harmonic number

    Current magnitue (%)

    Sheet2

    Sheet3

  • PFC Approaches i) Passive PFC converter ii) Active two-stage PFC converter iii) Active single-stage PFC converter

  • Three Basic PFC Approaches Active two stage PFC converterActive single stage PFC converterPassive PFC converter

  • Special Family--Single-stage PFC AC/DC ConverterPFC stage and DC/DC stage share the same switchSingle Loop

  • Prior Art(b) Boost/forward combination DCM+DCM (Russian circuit, 1992)(a) Boost/flyback combination DCM+DCM (Redl, 1994)Advantage SimpleLeast component count DisadvantageInherent Low efficiencyHigh DC Bus Voltage StressTurn off spike

    Advantage No turn off spikeLow voltage rated capacitor DisadvantageInherent Low efficiencyHigh DC Bus Voltage Stress

  • Conventional Energy transfer concept

  • New energy transfer conceptk12+(1-k) 1> 12

  • Flyboost PFC cell + Flyback DC/DC cellSingle active switch + single controllerNew Concept

  • Operation modeFlyback mode:|Vin| < Vcs n1 * VoBoost mode: |Vin| > Vcs n1 * Vo

  • Simulation resultsTrace 1 Current through flyback windingTrace 2 Rectified input currentTrace 3 DC/DC stage currentOperation waveform in one line cycle

  • Apply to other topologies

  • Measured Power Factor vs. line voltageMeasured Efficiency vs. line voltageMeasured storage capacitor voltage (Vs) vs. line voltage Line voltage and line current at line voltage=110V AC. Trace A: Line voltage (100V/div, 5ms/div); Trace B: Line current (measured after auxiliary line filter;1A/div; 5ms/div). The measured Power Factor is 99.4% Experimental Results

    Chart1

    97.3

    98

    98.9

    99.3

    99.3

    99.3

    99.5

    99.2

    99.1

    99.3

    98.8

    98.7

    98.7

    98.7

    97.8

    97.7

    97.5

    97.3

    97.2

    97.2

    PF/%

    Line Voltage/V

    PF/%

    Sheet1

    Measured Data of Single Switch Converter with Fly Back Loop

    Load resistor: 5.2Ohm (Electronic Load Agilent N3305A)

    AC Source:HP 6841ADate: 04/23/01

    Vline/VPF/%Pline/WPout/WVout/VVs/Veff/%

    8597.3183.3150.427.97104.682.05

    9098.0182.3150.327.96108.782.45

    10098.9181.2150.227.95118.182.89

    11099.3180.3150.027.93127.983.19

    12099.3180.0149.927.92137.683.28

    13099.3179.8149.727.90147.683.26

    14099.5179.5149.527.88156.083.29

    15099.2179.4149.427.87163.483.28

    16099.1179.7149.127.85171.982.97

    17099.3179.8149.027.83182.282.87

    18098.8179.6148.927.82188.182.91

    19098.7180.0148.527.80197.082.50

    20098.7180.4148.427.79206.582.26

    21098.7180.6148.327.77216.082.12

    22097.8180.6148.127.76219.082.00

    23097.7180.8148.027.74224.981.86

    24097.5181.0147.527.71232.581.49

    25097.3181.5147.327.68241.081.16

    26097.2182.1146.827.66251.580.62

    27097.2182.5146.827.63261.180.44

    Sheet1

    PF/%

    Line Voltage/V

    PF/%

    Sheet2

    PF/%

    Line Voltage/V

    eff/%

    Efficiency vs. Line Voltage

    Sheet3

    Vout/V

    Line Voltage/V

    Vout/V

    Output Voltage vs. Line Voltage

    Vs/V

    Line Voltage/V

    Vs/V

    Storage Capacitor Voltage vs. Line Voltage

    Chart2

    82.0512820513

    82.4465167307

    82.8918322296

    83.1946755408

    83.2777777778

    83.2591768632

    83.286908078

    83.2775919732

    82.9716193656

    82.8698553949

    82.9064587973

    82.5

    82.2616407982

    82.1151716501

    82.0044296788

    81.8584070796

    81.4917127072

    81.1570247934

    80.6150466776

    80.4383561644

    PF/%

    Line Voltage/V

    eff/%

    Sheet1

    Measured Data of Single Switch Converter with Fly Back Loop

    Load resistor: 5.2Ohm (Electronic Load Agilent N3305A)

    AC Source:HP 6841ADate: 04/23/01

    Vline/VPF/%Pline/WPout/WVout/VVs/Veff/%

    8597.3183.3150.427.97104.682.05

    9098.0182.3150.327.96108.782.45

    10098.9181.2150.227.95118.182.89

    11099.3180.3150.027.93127.983.19

    12099.3180.0149.927.92137.683.28

    13099.3179.8149.727.90147.683.26

    14099.5179.5149.527.88156.083.29

    15099.2179.4149.427.87163.483.28

    16099.1179.7149.127.85171.982.97

    17099.3179.8149.027.83182.282.87

    18098.8179.6148.927.82188.182.91

    19098.7180.0148.527.80197.082.50

    20098.7180.4148.427.79206.582.26

    21098.7180.6148.327.77216.082.12

    22097.8180.6148.127.76219.082.00

    23097.7180.8148.027.74224.981.86

    24097.5181.0147.527.71232.581.49

    25097.3181.5147.327.68241.081.16

    26097.2182.1146.827.66251.580.62

    27097.2182.5146.827.63261.180.44

    Sheet1

    PF/%

    Line Voltage/V

    PF/%

    Sheet2

    PF/%

    Line Voltage/V

    eff/%

    Sheet3

    Vout/V

    Line Voltage/V

    Vout/V

    Output Voltage vs. Line Voltage

    Vs/V

    Line Voltage/V

    Vs/V

    Storage Capacitor Voltage vs. Line Voltage

    Chart3

    104.6

    108.7

    118.1

    127.9

    137.6

    147.6

    156

    163.4

    171.9

    182.2

    188.1

    197

    206.5

    216

    219

    224.9

    232.5

    241

    251.5

    261.1

    Vs/V

    Line Voltage/V

    Vs/V

    Sheet1

    Measured Data of Single Switch Converter with Fly Back Loop

    Load resistor: 5.2Ohm (Electronic Load Agilent N3305A)

    AC Source:HP 6841ADate: 04/23/01

    Vline/VPF/%Pline/WPout/WVout/VVs/Veff/%

    8597.3183.3150.427.97104.682.05

    9098.0182.3150.327.96108.782.45

    10098.9181.2150.227.95118.182.89

    11099.3180.3150.027.93127.983.19

    12099.3180.0149.927.92137.683.28

    13099.3179.8149.727.90147.683.26

    14099.5179.5149.527.88156.083.29

    15099.2179.4149.427.87163.483.28

    16099.1179.7149.127.85171.982.97

    17099.3179.8149.027.83182.282.87

    18098.8179.6148.927.82188.182.91

    19098.7180.0148.527.80197.082.50

    20098.7180.4148.427.79206.582.26

    21098.7180.6148.327.77216.082.12

    22097.8180.6148.127.76219.082.00

    23097.7180.8148.027.74224.981.86

    24097.5181.0147.527.71232.581.49

    25097.3181.5147.327.68241.081.16

    26097.2182.1146.827.66251.580.62

    27097.2182.5146.827.63261.180.44

    Sheet1

    PF/%

    Line Voltage/V

    PF/%

    Sheet2

    PF/%

    Line Voltage/V

    eff/%

    Sheet3

    Vout/V

    Line Voltage/V

    Vout/V

    Output Voltage vs. Line Voltage

    Vs/V

    Line Voltage/V

    Vs/V

  • Special application Bi-Flyback ConverterInegrate Bifred and Flyboost topologiesTwo flyback transformers, single switchSingle DC bus capacitor

  • Soft switching application

  • Developed prototype

  • Input voltage: 220VOutput watts 150WInput voltage: 110VOutput watts 150WLine VoltageLine CurrentLine VoltageLine CurrentWaveforms

  • Waveforms for the main switchVdsId

  • Efficiency and Power Factor200KHz/[email protected]

    Chart1

    0.957

    0.963

    0.978

    0.988

    0.985

    0.984

    0.983

    0.98

    0.976

    0.973

    0.971

    0.971

    0.969

    0.965

    0.963

    0.961

    0.956

    0.953

    0.951

    0.95

    Input Voltage (V)

    Power Factor

    Sheet1

    850.957183.8149.920.81566

    900.963182.7149.920.8205801861

    1000.978181.4149.950.8266262404

    1100.988180.61500.8305647841

    1200.985180.7150.10.8306585501

    1300.984180.5150.10.8315789474

    1400.983180.1150.120.8335369239

    1500.98180150.20.8344444444

    1600.976180.3150.30.8336106489

    1700.973180.5150.30.8326869806

    1800.971181.2150.30.8294701987

    1900.971181.5150.30.8280991736

    2000.969181.8150.30.8267326733

    2100.965182.6150.50.8242059146

    2200.963183.1150.40.8214090661

    2300.961183.9150.470.818216422

    2400.956184.6150.50.815276273

    2500.953184.8150.60.8149350649

    2600.951185.3150.60.8127361036

    2650.95185.5150.60.8118598383

    Sheet1

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    Input Voltage (V)

    Power Factor

    Sheet2

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    Input Voltage (V)

    Power Factor

    Sheet3

  • Improved Results

    Chart6

    76.9

    79.5570698467

    82.3591923486

    83.1282952548

    83.6940836941

    83.984375

    84.1306884481

    84.3971631206

    84.6897253306

    84.3580914904

    84.2830009497

    84.1335162323

    84.2151675485

    83.6846543002

    83.927822073

    Output power (W)

    Efficiency (%)

    Sheet1

    23.331.6850.95731.624.376.9166

    46.758.7900.96358.746.779.5570698467176.8

    77.594.11000.97894.177.582.3591923486190.7

    94.6113.81100.988113.894.683.1282952548202.8

    116138.61200.985138.611683.6940836941215.3

    129153.61300.984153.612983.984375227.1

    144.2171.41400.983171.4144.284.1306884481239.2

    154.7183.31500.98183.3154.784.3971631206251.9

    166.5196.61600.976196.6166.584.6897253306264.1

    171.5203.31700.973203.3171.584.3580914904277.2

    177.5210.61800.971210.6177.584.2830009497290.2

    184218.71900.971218.718484.1335162323302.9

    191226.82000.969226.819184.2151675485319.4

    198.5237.22100.965237.2198.583.6846543002332.4

    200238.32200.963238.320083.927822073345.2

    Sheet1

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    0

    Output power (W)

    Efficiency (%)

    Sheet2

    Sheet3

  • Key Features Higher efficiency due to soft switching operation of the main switch.

    Low DC bus voltage make commercially available capacitor can be used as the energy storage part

    Higher efficiency due to direct energy transfer in Flyback mode

    Higher power density due to high frequency operation, which also benefit from soft switching

  • Powering Future Generation of Microprocessors and ICsLow-Voltage High-Current Fast-Transient On-Board Voltage Regulator Modules(VRMs)

  • Structure

  • The Main Power Supply Requirements(Challenges)1. High output current slew rate (> 50A/s).

    2. Low output voltage ripple and overshoot during transient (< 2% of the nominal output voltage).

    3. High efficiency

    4. High power density.

    5. High VRM input current slew rate (

  • Pentium 4 Voltage and Current Specs

  • Current and Voltage RoadmapYear1999200020012002200320042005Vmax1.81.81.51.51.51.21.2Vmin1.51.51.21.21.20.90.9W90100115130140150160Imin(A)5056778793125133Imax(A)606796108117167178

    Lately, there are news about even lower voltages and higher currents expectations in the future (APEC2001, March 2001)

  • Interleaving Technique for Multi-phase Converters

  • The Voltage-Mode Hysteretic Control

    Tracks the output voltage (ripple) and keeps it within the required limits.

    Near instantaneous response to load transients.

    No feedback loop compensation is needed.

    No limitations on the switches conduction time

    Circuit simplicityThe Interleave Technique

    High frequency output voltage ripple with lower switching frequency

    Ripple cancellation

    Current division between the phases

    Fast transient response which is limited by the feedback control loop

    Why Voltage-Mode Hysteretic Control and Interleave Technique?Effective &simple to apply+

  • Initial Experimental PrototypeWaveformsPreliminary ResultsPhase 1 Drive SignalPhase 2 Drive SignalPhase 1 Inductor CurrentPhase 2 Inductor CurrentTotal CurrentOutput VoltageInput Voltage =12VOutput Voltage =1.5VOutput Current=30ASwitching Frequency/Phase=400KHzOutput Ripple Frequency=800KHz

  • Initial Experimental ResultsTwo-Phase VRM ControlThree-Phase VRM ControlFour-Phase VRM Control

  • Transient Cancellation Control Method for Future Generation of MicroprocessorsThe idea of the transient cancellation control scheme is to create a deliberate undershoot before an expected overshoot and vice versa to cancel the expected large overshoot to keep the output voltage within the allowable output voltage deviation limit. Ideal Output-Voltage Waveforms at High-to-Low Load Transient with the Transient Cancellation ControllerIdeal Output-Voltage Waveforms at High-to-Low Load Transient without the Transient Cancellation Controller

  • Future Look on VRMs and their Control Methods

    To satisfy future strict powering requirements of microprocessors especially the tight allowable voltage deviation (20mV), may have to be one or more of the following:

    1) Proactive instead of reactive, i.e, to be able to take a response action before the load transients occur instead of after.

    2) Future VRM controllers may need to be able to learn the load behavior and/or apply advanced response techniques to reduce the VRM output voltage overshoots/undershoots and to have fast transient response.

    3) Methods such as fuzzy logic and neural networks may be applied to make the VRM controller smart.

    4) Advanced Topology techniques that have naturally the voltage deviation reduction (cancellation)

  • Generalized Analysis of Soft-Switching DC-DC Converters

  • Conventional DC-DC Converters(Hard-Switching)BuckBoostBuck-BoostCukZetaSepic

  • Switching-Cell Sharing

    All the Conventional DC-DC Converters shares the same switching-cell With different orientation of the cell in a specific converterThe Conventional DC-DC Switching-Cell

  • Analyzed Soft-Switching Cells

    (a)

    (b)

    (c)

    (d)

    (e)

    (f)

    (g)

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    _1013983271.vsd

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    (a) Conventional Cell, (b) ZVS-QRC Cell, (c) ZCS-QRC Cell, (d) ZVS-QSW CV Cell, (e) ZCS-QSW CC Cell, (f) ZVT-PWM Cell, and (g) ZCT-PWM Cell

  • Zero-Voltage-Switching Quasi-ResonantZVS-QRC Switching-CellZVS-QRC Cell Basic Switching-Waveforms

  • Zero-Voltage-Transition PWMZVT-PWM Switching-CellZCT-PWM Cell Basic Switching-Waveforms

  • ZVT-PWM FamilyZVT-PWM BuckZVT-PWM BoostZCT-PWM Buck-BoostZCT-PWM CukZVT-PWM ZetaZVT-PWM Sepic

  • The Generalized Transformation Table

    Single Generalized Transformation Table is complete and applies to all cells

    ,

    ,

    ,

    Buck

    1

    1-M

    -M

    Boost

    M

    1

    1-M

    Buck-Boost, Cuk, Zeta, and Sepic

    1+M

    1

    -M

    _1012178854.unknown

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    _1015332572.unknown

    _1012178876.unknown

    _1012178797.unknown

  • Generalized Gain EquationGeneralized gain ( ):By using the normalized parameters:

    _1014143808.unknown

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    _1006892111.unknown

  • Summary of the Generalized Analysis(Basic Equations Intervals and Gain)

    Chapter 8

    Summary and Conclusion

    CELL

    (

    (

    (

    (

    (

    (

    (

    Gain Equation

    Quasi Resonant

    Converters

    ZVS

    N/A

    N/A

    N/A

    ZCS

    N/A

    N/A

    N/A

    Quasi

    Square

    Wave

    ZVS CV

    N/A

    N/A

    N/A

    ZCS CC

    N/A

    N/A

    N/A

    Transition

    PWM

    ZVS

    ZCS

    N/A

    N/A

    Where:

    The time delay between turning OFF

    and

    .

    1

    1

    _1015956380.unknown

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  • Voltage Gain versus Duty Ratio

  • Final RemarksA generalized analysis method for well known families of soft-switching dc-dc converters was proposed.It was shown that a single Generalized Transformation Table for all the converter families exists.

    The simulation results verified the theoretical results.

    The analysis generalization leads to several advantages such as:(1) Gives more insight into the converter-cell operation.(2) Improves the computer-aided analysis and design.(3) Simplifies mathematical modeling.(4) The cell-to-cell comparison becomes easier.(5) Improvement is made easier by deriving a new generalized cell.

  • FUELCELLDC-DC STAGELCFILTERSPWMCONTROLPWMCONTROLFunctional Block DiagramPROTECTION

    DC-AC STAGEREADYSIGNAL

    VDC linkPHASE APHASE BEARTHVref

  • Block Diagram of the power stage

  • Design Specifications for 1.5kW prototypeOutput power rating 1.5 kW continuous, Split single-phase Output voltage 120 V/240 V nominalFrequency 60 Hz 0.1 Hz. Design input source type Fuel cell, photovoltaic or other qualified renewable energy sources. Nominal rating of 48 V dc.Overall efficiency Higher than 90% for resistive load.Total harmonic distortion Output voltage THD: less than 5% when supplying a standard nonlinear test loadVoltage Regulation +/- 6% from NL to FL. Frequency +/- 0.1 Hz

  • Troubleshooting!!!!!

  • Experimental Result (Output Voltage)

  • 2001 Future Energy ChallengeTM :Competition funded by the U.S. Department of Energy and the Department of Defense to design and build, at one half or less of the cost of todays equipment, a key low cost fuel cell component for converting direct current into alternating current in ten kilowatt or smaller fuel cells.Texas A&M UniversityVirginia Polytechnic Institute and State UniversityUniversity of Central FloridaUniversity of Wisconsin - MadisonDrexel UniversityUniversity of Illinois, ChicagoUS DoE and DoDFinalist

  • Improved sinusoidal output inverter topology solution:Complex Structure. High cost.Low Efficiency.Disadvantages

  • Characteristics of the High Frequency Link InverterNo low frequency component exists in the waveform transmitted by transformer. A compact high frequency transformer is allowed for the transmission.The operation frequency of the two switches in the secondary side of the transformer is low. Thus leads to low switching loss and high efficiency.Low distortion of the output waveform.Simple structure, lower loss and higher efficiency can be obtained.

  • Configuration of the proposed topology:No low frequency component exists in the waveform transmitted by transformer. A compact high frequency transformer is allowed for the transmission.The operation frequency of the two switches in the secondary side of the transformer is line frequency which leads to low switching loss and high efficiency.Low distortion of the output waveform.Features

  • Simulation Circuit: We used half bridge in the primary side to illustrate the principle in the simulation. The whole system consists of power stage and control circuit.

  • Simulation ResultThe Generation of the Modulating Signal: The modulating signal is generated by the comparison between the sampled signal and the reference wave.

  • Comparison of the Two Inverter TopologiesComplex system structure DC-AC-DC-Sinusoidal ACHigh voltage stress across the switches. All switches are operated at high frequency. High switching loss and low efficiency.Large size, high cost and difficult to design. Simple system structure DC-Sinusoidal ACLow voltage stress across the switches.Switches in the secondary side is operated at line frequency, switching loss drops greatly.Small size, low cost and easy to design.Low THD distortion at the output side.Inverter with Push-pull StructureNovel High Frequency Link Inverter

  • Dynamic Modeling of DC-DC Converters

  • Dynamic Modeling(a) Detailed circuit model; predicting device behavior, time consuming , convergence.(b) Switched circuit model; Predicting roughly system large signal behavior, steady- state waveform and transient, details lost, time consuming convergence problems.(c) Equivalent PWM switch model; Determination of steady-state operation pointOptimization of the control loopInvestigation of stability problemsPrediction of large signal transient behaviorEfficient computer simulation(1) Average switch model (Middlebrook)(2) Discrete time domain model(3) Three terminal PWM switch model (Vorperian)

  • Special Problems to Model PFC CircuitsSwitching power stageDigital modulatorError compensatorOutput Ac line input Control, dFeedback loopNo standard three-terminal network is available to single stage AC/DC converters, In most of cases, three terminals PWM model can not be used directly

  • DerivationUsing Circuit Analysis Technique while keeping Same functionality of each branch

  • Verification of the new model (DC)Output voltage vs. input voltageStorage capacitor voltage vs. input voltage

    Chart2

    38.3938.15

    42.6542.55

    46.9246.96

    51.1951.37

    55.4555.46

    59.7259.66

    D=0.35

    state-space averaging

    large-signal model

    Input voltage (V)

    Output voltage (V)

    Sheet1

    9038.3938.15

    10042.6542.55

    11046.9246.96

    12051.1951.37

    13055.4555.46

    14059.7259.66

    Sheet1

    00

    00

    00

    00

    00

    00

    D=0.35

    state-space averaging

    large-signal model

    Input voltage (V)

    Output voltage (V)

    Sheet2

    Sheet3

    Chart3

    149148

    166165

    182182

    199199

    215215

    232231

    D=0.35

    state-space averaging

    large-signal model

    Input voltage (V)

    Storage capacitor voltage (V)

    Sheet1

    90149148

    100166165

    110182182

    120199199

    130215215

    140232231

    Sheet1

    00

    00

    00

    00

    00

    00

    D=0.35

    state-space averaging

    large-signal model

    Input voltage (V)

    Storage capacitor voltage (V)

    Sheet2

    Sheet3

  • Verification of the new model (small-signal)frequency response between line to outputfrequency response between control to outputState-space averaging model vs. the new model (Vin: 110V, V0: 50V)

  • PWM and Average techniques to derive closed looptransfer functions Study decoupling circuit approach in non-three terminal converters Explore New averaging method to equivalent average circuitDynamic Modeling of DC/DC and PFC-AC/DC Converters

    Along with the development of power electronics, the harmonics problems become more and more noticeable and troublesome. So power factor correction has been a hot topic in power electronic community, at same time its important to practical industry application.. From these five aspects, I will present some new points, give a review to the current PFC approaches, introduce our work on this subject. And then summary the issue and possible solutions. Finally, we will discuss application feasibility.

    Totally, I need about 50 minutes to finish this presentation!

    First of all, I would like to introduce some basic concepts and terms. As you know, For linear load, power factor is defined as real power over apparent power. For nonlinear load, the definition is modified like this, because current waveform is distorted, so a additional factor has to be considered in this formula.

    That is, power factor is equal to distortion factor times displacement factor. The distortion factor kd and THD are defined by these equations. This equation shows the relationship between THD and Kd. Actually, most of power converters belong to a special case, that is, cos ZITA is nearly one, so we can simply calculate PF by THD like this.

    Here is a typical example for traditional AC/DC power supply. Generally speaking, the power factor is lower than o.67, and THD is higher than 110%. This means serious harmonic problem exist in converter system. In next following, we will review the current PFC approaches on these items

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******

    In single stage schemes, a special family is single stage single switch PFC converter its feature is>>>>>>>>>>

    Let us take look some example circuits of S4 PFC converters. I think these topologies are preferable collection for practical application in the future. The first four guys look similar, but in fact, they are very different in operation and performance. This (fifth) one is also my favor, because it has low and narrow capacitor voltage. The last one is simple, but its inherent advantages are anti-inrush and overcurrent protection.

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******In conventional AC/DC PFC converters, power is processed serially by PFC and DC/DC two power stages. So the overall efficiency is given by the product of two-stage efficiencies, i.e., Where and are the efficiencies of two stages respectively.In fact, for the purpose of achieving PFC and DC/DC voltage regulation, it is no necessary to process all the input power by both stages. Intuitively, partial input power can be forward directly to the load through one converter stage. Suppose is the ratio at which power is transferred to the output just through PFC stage. Then, the efficiency of the proposed structure can be expressed as: Obviously the overall efficiency can be improved effectively by minimizing the power fraction that been processed twice.

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******

    As for as converters, we have three basic PFC approaches,one is second is . The last one is******


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