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Hindawi Publishing Corporation Advances in Power Electronics Volume 2012, Article ID 176876, 11 pages doi:10.1155/2012/176876 Research Article Using Averaged Modeling for Capacitors Voltages Observer in NPC Inverter Bassem Omri, Kaic ¸ar Ammous, and Anis Ammous Power Electronics Group, Universit´ e de Sfax, ENIS-Sfax, BP. 1173, 3038 Sfax, Tunisia Correspondence should be addressed to Bassem Omri, omri [email protected] Received 17 May 2012; Accepted 12 November 2012 Academic Editor: C. M. Liaw Copyright © 2012 Bassem Omri et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. This paper developed an adaptive observer to estimate capacitors voltages of a three-level neutral-point-clamped (NPC) inverter. A robust estimated method using one parameter is proposed, which eliminates the voltages sensors. An averaged modeling of the inverter was used to develop the observer. This kind of modeling allows a good trade-obetween simulation cost and precision. Circuit model of the inverter (implemented in Simpower Matlab simulator) associated to the observer algorithm was used to validate the proposed algorithm. 1. Introduction Multilevel inverters can provide an eective alternative of high power applications, providing a high quality voltage, increasing eciency and robustness, and reducing interfer- ence electromagnetics [14]. There are three main topologies of multilevel inverters: diode-clamped inverter [2, 5, 6], fly- ing capacitor inverter [7, 8], and cascade multilevel inverter [6, 9]. Among the multilevel inverters, the most popular topology is the diode-clamped inverter which is called as a neutral-point-clamped (NPC) inverter in three levels. It is proposed by Nabae et al. [10]. This type of inverter avoids the complexity associated with the series connection of semiconductor switches or the bulky coupling transformer, produces low distortion harmonics, and has an average cost. However, in NPC inverter, the DC-link voltage is divided by capacitors, and each capacitor is composed of series connection construction. Therefore, if the voltage unbalanc- ing occurs between each capacitor, the line-to-line output voltage waveform has many harmonic components and the power devices in NPC inverter cannot guarantee the safe operation. So, one NPC inverter requirement is to produce a good control maintaining the optimal balance of capacitor voltages [1113]. Thus, regulation of these capacitors voltages requires information about such voltages. For that there are two possibilities either measuring or estimating such voltages. Regarding the first possibility, it presents several dis- advantages: besides the known diculties when measuring a high-voltage level, if the number of levels increases the number of capacitors increases in NPC inverter. Then it will be necessary to use multiple-voltage sensors to measure the capacitor voltages, which reduces the reliability. Furthermore, the use of the voltages sensors presents many diculties of establishment in front of the use of the current sensors. On the other hand, the second alternative uses software sensors, called observers, which replace the physical sensors (the voltage sensors). It is suitable to estimate the capacitors voltages through only the phase currents measurement. So, the observer is independent of the number of the level of NPC inverter. Unlike the traditional direct voltage sensing depends on the levels number. An observer is a data-processing algorithm to reconstruct the variable state system from the input, mathematical model, and output measurement of the real system. It is an attractive solution because it benefits from a mathematical model of the system. It is less expensive and more reliable because it is applied by a digital computer. Actually, the calculation of the digital signal processors (DSP) is the execution of such sophisticated and complex algorithms
Transcript

Hindawi Publishing CorporationAdvances in Power ElectronicsVolume 2012, Article ID 176876, 11 pagesdoi:10.1155/2012/176876

Research Article

Using Averaged Modeling for Capacitors Voltages Observer inNPC Inverter

Bassem Omri, Kaicar Ammous, and Anis Ammous

Power Electronics Group, Universite de Sfax, ENIS-Sfax, BP. 1173, 3038 Sfax, Tunisia

Correspondence should be addressed to Bassem Omri, omri [email protected]

Received 17 May 2012; Accepted 12 November 2012

Academic Editor: C. M. Liaw

Copyright © 2012 Bassem Omri et al. This is an open access article distributed under the Creative Commons Attribution License,which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

This paper developed an adaptive observer to estimate capacitors voltages of a three-level neutral-point-clamped (NPC) inverter.A robust estimated method using one parameter is proposed, which eliminates the voltages sensors. An averaged modeling of theinverter was used to develop the observer. This kind of modeling allows a good trade-off between simulation cost and precision.Circuit model of the inverter (implemented in Simpower Matlab simulator) associated to the observer algorithm was used tovalidate the proposed algorithm.

1. Introduction

Multilevel inverters can provide an effective alternative ofhigh power applications, providing a high quality voltage,increasing efficiency and robustness, and reducing interfer-ence electromagnetics [1–4]. There are three main topologiesof multilevel inverters: diode-clamped inverter [2, 5, 6], fly-ing capacitor inverter [7, 8], and cascade multilevel inverter[6, 9]. Among the multilevel inverters, the most populartopology is the diode-clamped inverter which is called as aneutral-point-clamped (NPC) inverter in three levels. It isproposed by Nabae et al. [10]. This type of inverter avoidsthe complexity associated with the series connection ofsemiconductor switches or the bulky coupling transformer,produces low distortion harmonics, and has an average cost.

However, in NPC inverter, the DC-link voltage is dividedby capacitors, and each capacitor is composed of seriesconnection construction. Therefore, if the voltage unbalanc-ing occurs between each capacitor, the line-to-line outputvoltage waveform has many harmonic components andthe power devices in NPC inverter cannot guarantee thesafe operation. So, one NPC inverter requirement is toproduce a good control maintaining the optimal balanceof capacitor voltages [11–13]. Thus, regulation of thesecapacitors voltages requires information about such voltages.

For that there are two possibilities either measuring orestimating such voltages.

Regarding the first possibility, it presents several dis-advantages: besides the known difficulties when measuringa high-voltage level, if the number of levels increases thenumber of capacitors increases in NPC inverter. Thenit will be necessary to use multiple-voltage sensors tomeasure the capacitor voltages, which reduces the reliability.Furthermore, the use of the voltages sensors presents manydifficulties of establishment in front of the use of the currentsensors. On the other hand, the second alternative usessoftware sensors, called observers, which replace the physicalsensors (the voltage sensors). It is suitable to estimatethe capacitors voltages through only the phase currentsmeasurement. So, the observer is independent of the numberof the level of NPC inverter. Unlike the traditional directvoltage sensing depends on the levels number.

An observer is a data-processing algorithm to reconstructthe variable state system from the input, mathematicalmodel, and output measurement of the real system. It is anattractive solution because it benefits from a mathematicalmodel of the system. It is less expensive and more reliablebecause it is applied by a digital computer. Actually, thecalculation of the digital signal processors (DSP) is theexecution of such sophisticated and complex algorithms

2 Advances in Power Electronics

E

C1

C2

S11 S21 S31

S32

S33

S34S24S14

S13

S12 S22

S23

DH

DLVs3

Vs1 Vs2

Load+−

IsbIsa

Ina

idc

Isc

Figure 1: A 3-level NPC converter topologies.

with the high-degree precision. Many works related to theobserver design for the nonlinear systems were published[14–16].

Recently, the authors [17] designed a robust observerbased on adaptive backstepping approach for three-levelNPC inverters. It is used for capacitor voltages estimation.This approach gave good results. However, the authorsused an instantaneous reference model of NPC inverter.Therefore, the simulation cost is significant. Moreover, theadaptive backstepping algorithm used many parameters(adaptation gains, design constant) to design the observer.The algorithm becomes so complex when the number oflevels increases.

This paper proposes an adaptive observer in order toestimate the voltages capacitors of 3-levels inverter NPC(Figure 1). The adapive algorithm is robust, simple toimplement, and uses one parameter called forgetting factor.An averaged reference model of three-level NPC inverter isused for simulation. This kind of modeling allows a goodtradeoff between simulation cost and precision.

This paper is organized as follows. In Section 2, thePWM control strategies are presented. An averaged referencemodel of three-level inverter NPC is given in Section 3.Section 4 shows the observer design for the NPC inverter.Finally, simulation results are given in order to illustratethe performance of the proposed observer to estimate NPCcapacitors voltages.

2. The PWM Control Strategies ofMultilevel Inverters

The proliferation of power electronic devices has led to ademand for more effective pulse width modulation strate-gies. The current waveform can be improved by increasingthe frequency of the carrier wave; this approach reducescopper losses at the expense of increased switching losses.To overcome the limitations of existing switching strategiesthe technique known as space vector pulse width modulation(SVPWM) is becoming widely used in industry [18, 19].

SVPWM is a highly efficient method of generatingthe six-pulsed signals for the inverter stage of the motordrive. Conventional switching techniques treat each phase

as a separately generated sinusoid that is displaced by 120degrees. However, a change in the voltage of one-half bridgedue to switching invariably influences the other two-phasevoltages [20]. SVPWM evaluates the switching schema asa whole, which results in better use of the DC bus andgenerates significantly less harmonic distortion than the sinetriangle method [20].

The SVPWM control of the 3-level NPC inverter consiststo control it in the (α,β) coordinates which can generate27 possible voltages vectors (Figure 2). They are divided in6 large vectors (PNN,PPN,NPN,NPP,NNP,PNP), 6 mediumvectors (PON,OPN,NPO,NOP,ONP,PNO), 12 small vec-tors (with the redundancy: (PPO,OON), (OPO,NON),(OPP,NOO), (OOP,NNO), (ONO,POP), (POO,ONN)) and3 zero vectors (OOO,NNN,PPP). When the power devices,Sk1 and Sk2, are connected to the positive DC-link railthe state is noted by “P.” In contrast, when the output isconnected to the negative DC-rail by turning both Sk3 andSk4 on, the state is called “N.” Moreover, the switching state isdefined as “O” when Sk2, and Sk3 both power devices, are on.

The objective of SVPWM technique is to approximatea reference space vector Vs somewhere within the hexagonof Figure 2 using a combination of the 27 switching vectors.Indeed, when the reference voltage is in one sector, severalcouples of vector are possible.

For example in Sector 1 (Figure 3), the Vs vector canbe divided on V1a,V12 or V1b,V12. We choose the secondsolution, since V1b is greater in amplitude than V1a. Ateach commutation period of the inverter, the vector Vs,projected on two adjacent vectors, ensures the calculation ofthe dwelling time.

Let T mod be a modulation period, T1b dwelling time ofthe first vector V1b,T12 dwelling time of the second vectorV12, and Tnul = T mod − T1b − T12 dwelling time of zerovectors. We define the duty cycles ρ1 and ρ2 related to timesT1b and T12, respectively, of the vectors V1b and V1a by:

ρ1 = T1

T mod, ρ2 = T12

T mod. (1)

For one modulation period T mod, the output voltage of theinverter is given by:

T modVS = (T1bV1b + T12V12 + T3VNull). (2)

Advances in Power Electronics 3

(PPN)(NPN)

(NPP)

(NNP) (PNP)

(OOO)(NNN)(PPP)

(OPO) (PPO)

(OON)

(POO)

(ONN)

(ONO)(POP)(OOP)

(NNO)

(NOO)

(OPP)

(NON)

(PNN)

(OPN)

(PON)

(PNO)

(ONP)

(NOP)

(NPO)

i = 1

i = 2

i = 3i = 4

i = 5

i = 6

i = 7

i = 8

i = 9 i = 10

i = 11

i = 12

Figure 2: Voltage space vectors in NPC inverter.

ρ2V12

ρ1V1b

Sector 1

V1a

Vs

V1b (PNN)

V12 (PON)

Figure 3: Sector 1.

And the dwelling time of each vector is given by

T1b = 2√

3T mod

E

(1

2√

2Vsα −

√3

2√

2Vsβ

),

T12 = 2√

2T mod

EVsβ.

Tnull = T mod − T12 − T1b.

(3)

For more details see [21].

3. The Nonideal Average Model

Based on the averaged representation of the PWM switch[22], Figure 4 shows the proposed averaged model of theone-leg three-level multilevel converters. Isa is the averagevalue of the load current over the switching period. Thismodel applies a controlled voltage source (Va1 andVa2) and acontrolled current source (Ia1 and Ia2). Each three-level con-verter leg has four controlled switches and six uncontrolledswitches. The four controlled switches are directly governed

Va1

Va2

Ia1

Ia2

Bridge A

E

IsaIna

Ina

Vna1

Figure 4: The proposed average model of the 3-level PWMconverter.

by external control signals. The uncontrolled switches areindirectly governed by the state of the controlled switchesand the circuit conditions.

The average values of the different voltage and currentsources of the proposed averaged model of the bridge (A) aregiven by [22].

Consider that T mod is the switching period of the activeswitch and ρ (ρ1, ρ2, ρ3) the duty cycle, which is the ratioof the on-time of the active couple switches ((Si1, Si2), (Si2,Si3), or (Si3, Si4)) by the switching period T mod , respectively(Figure 5).

Vd and Vds represent respectively, the voltage across thediode and the MOSFET in on-state. These values can bededuced from the devices static characteristics I(V):

ρi = Ton i

Tpwm; ρMi = Toff i

Tpwm,

ρM = ρM1 + ρM2 + ρM3.

(4)

When only output current behavior is considered, a simpli-fied representation of the averaged model (Figure 6) can beused, where

〈Ina〉 = (Ina1 + Ia2 − Ia1),

〈Va〉 = (Va1 +Va2),

〈Ia〉 = 〈Ia2〉.(5)

The averaged values of the voltage source Va and the currentsource Ia of the bridge (A) are given as follows.

If the current Isa is positive,

〈Va〉 = 2Vdsρ1 + (E + 2Vd)ρ3

+(E

2+Vd +Vds

)ρ2 + (E + 2Vd)ρM ,

〈Ia〉 = −Isaρ3,

〈Ina〉 = Isaρ2.

(6)

4 Advances in Power Electronics

Vs1

Toff1 Ton1 Toff2 Ton3 Toff3 Ton2

−2Vd

Tmod

t

t

t

−Isa

E − 2VdsE/2−Vd −Vds

Command

Figure 5: Command signals of the controlled devices in the case ofIsa > 0.

E

Va

Ia

Bridge A

Isa

Ina Vsa

Figure 6: A simplified representation of averaged model.

If the current Isa is negative,

〈Va〉 = − 2Vdρ1 + (E − 2Vds)ρ3

+(E

2−Vd −Vds

)ρ2 + (2Vd)ρM ,

(7)

〈Va〉 = − 2Vdρ1 + (E − 2Vds)ρ3

+(E

2−Vd −Vds

)ρ2 + (2Vd)ρM ,

(8)

〈Ia〉 = Isaρ3. (9)

In order to demonstrate the accuracy of the proposedaveraged model, a circuit model of the inverter implementedin Simpower Matlab simulator, using the circuit representedin Figure 1 is used. For the simulation in this section and

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

0

5

10

15

Time (s)

Cu

rren

t (A

)

−15

−10

−5

Figure 7: The output current obtained with the non-ideal averagedmodel and the circuit model after filtering (3-levels converter).

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

00.20.40.60.8

Time (s)

Cu

rren

t er

ror

(A)

−0.8−0.6−0.4−0.2

Figure 8: The current error.

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1197

198

199

200

201

202

203

204

Time (s)

Cap

acit

ors

volt

agesVC

1an

dVC

2(V

)

VC1 (nonideal average model)

VC2 (nonideal average model) VC2 (Simpower Matlab)

VC1 (Simpower Matlab)

Figure 9: Evolution of the capacitors voltages C1 and C2 (usingSimpower Matlab and the averaged model).

Section 5, we use 2 GHz Core2 Duo processor and 3 GBRAM.

The comparison between the current waveforms(Figure 7) obtained by the Simpower simulator and thecurrent given by the proposed model shows the goodaccuracy of the averaged model behavior for converterelectric analysis. The current error between the two types’models is given in Figure 8.

Figure 9 shows the capacitors voltages (C1 and C2)waveforms obtained by the model Simpower simulatorand the averaged model. The simulation results given bythe proposed averaged model are in good agreement withSimpower simulations.

It is evident that multilevel converter analysis using finemodels gives accurate results, but these simulations cost isunaffordable. When long time range simulation is needed,the proposed averaged model can be used, and the obtainedresults show the accuracy of the proposed model (Table 1).

Advances in Power Electronics 5

Table 1: CPU running time (s) necessary to simulate a period(0.02 s).

Type model Running time (s)

Nonideal averaged model 10

Circuit model (Simpower Matlab) 90

So, we used this model like a reference model in the observerdesign.

4. Observer Design of Capacitors Voltages

The DC side of the three-level NPC inverter (Figure 1) has aDC source E and two connections capacitors C1 and C2. Theswitching variable γk represents the state of the multilevelinverter active switches, Sk j , k ∈ {1, 2, 3}, j ∈ {1, 2, 3, 4}.The three states of the binary switching γk can be defined as

γk =

⎧⎪⎪⎨⎪⎪⎩

1 (Sk1 = 1∧ Sk2 = 1)∧ (Sk3 = 0∧ Sk4 = 0)

0 (Sk1 = 0∧ Sk2 = 1)∧ (Sk3 = 1∧ Sk4 = 0)

−1 (Sk1 = 0∧ Sk2 = 0)∧ (Sk3 = 1∧ Sk4 = 1).(10)

Applying the Kirchhoff laws to the three-level inverter circuit(Figure 1) and doing some mathematical manipulations, thedynamic equations of the AC currents, Isa, Isb, and Isc, andthe capacitor voltages, VC1 and VC2, are defined as functionsof the circuit parameters and switching variables γk:

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

dIsadtdIsbdt

dIscdt

dVC1

dtdVC2

dt

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

=

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0 0ψ11

L

ψ12

L

0 −RL

0ψ21

L

ψ22

L

0 0 −RL

ψ31

L

ψ31

L

−Γ11

C1−Γ12

C1−Γ13

C10 0

−Γ21

C2−Γ22

C2−Γ23

C20 0

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

×

⎡⎢⎢⎢⎢⎢⎣

IsaIsbIscVC1

VC2

⎤⎥⎥⎥⎥⎥⎦ +

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎣

0001C11C2

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎦× idc,

(11)

Γ1k = γk(γk + 1

)2

, Γ2k = γk(−γk + 1

)2

,

ψki = 13

⎛⎝2Γik −

3∑j=1, j /= k

Γik

⎞⎠.

(12)

In order to obtain a simplified model which contains lessequations, we change the switching sequences in the (α,β)coordinates:

X123 = [T]Xαβ, (13)

where T is the Concordia transformation:

T =√

2√3

⎛⎜⎜⎜⎜⎜⎜⎜⎝

1 0

−12

√3

2

−12−√

32

⎞⎟⎟⎟⎟⎟⎟⎟⎠. (14)

Applying (11) to (8), the new model is represented in (α,β)coordinates by

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

dIαdtdIβdt

dVC1

dt

dVC2

dt

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

=

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0Γ1α

L

Γ2α

L

0 −RL

Γ1β

L

Γ2β

L

−Γ1α

C1−Γ1β

C10 0

−Γ2α

C2−Γ2β

C20 0

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

×

⎡⎢⎢⎢⎣

IαIβVC1

VC2

⎤⎥⎥⎥⎦ +

⎡⎢⎢⎢⎢⎢⎢⎢⎣

001C11C2

⎤⎥⎥⎥⎥⎥⎥⎥⎦× idc,

(15)

where

Γiα =√

2√3

(Γi1 − Γi2

2− Γi3

2

), Γiβ = 1√

2(Γi2 − Γi3).

(16)

This model can be written as

X = A(S)X +H(S,X),

y = CX ,(17)

where X = (Iα Iβ VC1 VC2)T , C = (1 1 0 0), H(S,X) =[00

1/C11/C2

].

A(S) =

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0Γ1α

L

Γ2α

L

0 −RL

Γ1β

L

Γ2β

L

−Γ1α

C1−Γ1β

C10 0

−Γ2α

C2−Γ2β

C20 0

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

. (18)

For different configurations, the capacitors are not alwaystraversed by the load current. The current can pass by one ortwo capacitors as it cannot traverse any capacitor if the top

6 Advances in Power Electronics

switchers of each leg are all closed or all open. Thus, someconfigurations give observability problem of the studiedsystem. This can be proven by the test of rank, whenever, atleast, a capacitor is traversed by the load current:

Θ = rang

⎛⎜⎜⎜⎜⎜⎜⎝

⎡⎢⎢⎢⎢⎢⎢⎣

C

CA

CA2

CA3

⎤⎥⎥⎥⎥⎥⎥⎦

⎞⎟⎟⎟⎟⎟⎟⎠= 3 ≺ 4. (19)

It is clear that Θ is not of full rank; thus the system isnot observable. So, to design the observer, a convenientrepresentation of the model must be given.

To overcome this difficulty, the idea is to consider twointerconnected affine models and to construct the newobserver based on those models.

Now, consider that the system (15) can be represented asa set of the interconnected subsystems as follows:

Σ1 :

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

dIαdt

dIβdt

dVC1

dt

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦=

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0Γ1α

L

0 −RL

Γ1β

L

−Γ1α

C1−Γ1β

C10

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

⎡⎢⎣

IαIβVC1

⎤⎥⎦

+

⎡⎢⎢⎢⎢⎢⎢⎣

Γ2α

L

Γ2β

L

0

⎤⎥⎥⎥⎥⎥⎥⎦VC2 +

⎡⎢⎢⎣

001C1

⎤⎥⎥⎦× idc,

(20)

Σ2 :

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

dIαdt

dIβdt

dVC2

dt

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦=

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0Γ2α

L

0 −RL

Γ2β

L

−Γ2α

C2−Γ2β

C20

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

⎡⎢⎣

IαIβVC2

⎤⎥⎦

+

⎡⎢⎢⎢⎢⎢⎢⎢⎣

Γ1α

L

Γ1β

L

0

⎤⎥⎥⎥⎥⎥⎥⎥⎦VC1 +

⎡⎢⎢⎣

001C2

⎤⎥⎥⎦× idc.

(21)

Each subsystem can be written as

Σ j

⎧⎨⎩χ j = Aj(Sk)χj + Γi

(Sk, χj

),

y = C jχ j , j = 1, 2 k = 1, 2, 3 i = 1, 2 /= j,(22)

where χj = (Iα Iβ VC j)T represents the state of the jth

subsystem, Sk are the instantaneous inputs applied to thesystem, and y is the measurable output, and

Aj(Sk) =

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

−RL

0Γ jαL

0 −RL

Γ jβL

−Γ jαC j

−Γ jβC j

0

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

,

Γi(Sk, χj

)=

⎡⎢⎢⎢⎢⎢⎢⎣

ΓiαL

ΓiβL

0

⎤⎥⎥⎥⎥⎥⎥⎦VCi +

⎡⎢⎢⎢⎣

001C j

⎤⎥⎥⎥⎦× idc,

(23)

j = 1, 2, k = 1, 2, 3, i = 1, 2 /= j, (24)

and C = (1 1 0).The function Γi(Sk, χj) is the interconnection function.

It depends on the control Sk and the state vector of eachsubsystem Σ j .

From the preceding composition (22), the followingsystem:

ϕj

{Zj = Aj(Sk)Zj + Γi(Sk)− P−1

j C j(y − y

),

Pj = −θjPj − AT(Sk)Pj − PjA(Sk) + C jCTj ,

(25)

is an observer for the system (16) for j = 1, 2, where P−1j C j

is the observer gain which depends on the solution of theRiccati equation (25) for each subsystem Σ j . The parameterθj must be a positive constant and sufficiently greater suchthat for any positive symmetric matrix Pj(0), the followingcondition is verified [23]:

∀θ ≥ θ0 ∃γ � 0, δ � 0, t0 � 0 : ∀t ≥ t0,

γI ≤ P(0) ≤ δI.(26)

The parameter θj determines the convergence rate of theobserver. The authors [23] proposed guidelines for thetuning of the parameters of the adaptive observer.

Note that this observer is the deterministic version ofthe Kalman filter for state affine systems. It is clear that thesystem observability depends on the applied inputs. Thenthe convergence of this observer can be proved assuming thatthe inputs S j are regularly persistent (see Appendix A); it is aclass of admissible inputs that allows to observe the system(for more details, see [19]). This guarantees the works ofobserver, and the observer gain is well defined, that is, thematrix Pj is nonsingular.

Now, a further result based on regular persistence isintroduced.

Lemma 1. Assume that the input S j is regularly persistent forsystem (22) and consider the following Lyapunov differentialequation:

P j = −θjPj − ATj (Sk)Pj − PjAj(Sk) + C jCTj . (27)

Advances in Power Electronics 7

With Pj � 0, then, ∃θj0 � 0 such that for any symmetric posi-tive definite matrix Pj(0), ∃θj � θj0, ∃αj , βj , t0 � 0:∀t � t0,

∀t � t0, αjI ≺ Pj(t) ≺ βjI , (28)

where I is the identity matrix.

The proof of this lemma follows the same steps ofTheorem 3.2 in [24].

The system will be represented by a set of interconnectedsubsystems (Figure 10):

Σ

⎧⎪⎪⎨⎪⎪⎩χ1 = A1(Sk)χ1 + Γ2

(Sk, χj

)χ2 = A2(Sk)χ2 + Γ1

(Sk, χj

).

(29)

The idea of this paper is to construct an observer for all thesystem Σ from the separate observers of the subsystem Σ j .

If ϕj is an exponential observer for Σ j , then the followinginterconnected system:

ϕ

⎧⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎩

χ1 = A1(Sk)χ1 + Γ1

(Sk, χj

)+ P−1

1 CT1

(y − y

)χ2 = A2(Sk)χ2 + Γ2

(Sk, χj

)+ P−1

2 CT2

(y − y

)P1 = −θ1P1 − AT1 (Sk)P1 − P1A1(Sk) + C1C

T1

P2 = −θ2P2 − AT2 (Sk)P2 − P2A2(Sk) + C2CT2 .

(30)

is an observer for the interconnected system Σ.Each observer subsystem ϕj is defined by (25).

Remark 2. The proposed observer functions in the case ifthe inputs controls are regularly persistent (see Appendix A),which is equivalent to that all subsystem ϕj is observable.

Now, we give the sufficient conditions which ensure theconvergence of the interconnected observer ϕ. For that, weintroduce the following assumptions.

Assumption 1. Assume that the input S j is a regularlypersistent input for subsystem Σ j and admits an exponentialobserver ϕj for j = 1, 2. If an input is regularly persistent,it excites sufficiently the system to obtain informationnecessary to constructing the not measured variables usingthe designed observer (see Appendix A). In this case, anobserver of the form ϕ can be designed and the estimationerror will be bounded.

Assumption 2. The term Γ j(Sk, χi) does not destroy theobservability property of subsystem ϕj under the actionof the regularly persistent input S j . Moreover, Γ j(Sk, χi) isLipchitz with respect to χi and uniformly with respect to S jfor j = 1, 2. This condition is verified because these functionsare linear.

Then the following result can be established.

Lemma 3. Consider the interconnected system Σ and the twoAssumptions 1 and 2 are verified. Then the system ϕ (30) is anobserver for the system Σ (29).

The proof of the lemma is given in Appendix B.

Real systemControl

Observer subsystem 1

ϕ1

Observer subsystem 2ϕ2

Y

Z1

Z2

Figure 10: Interconnected observer diagram.

5. Simulation Results

In this section, a detailed simulation was carried out tovalidate the proposed interconnected observer. The generalblock diagram is shown in Figure 11. In this study the3-level NPC inverter block was replaced by the averagedmodel of the inverter to develop the observer. The blockof the interconnected observer is given by (30). In orderto show the accuracy of the observer a fine model (circuitmodel) of the inverter (implemented in Matlab Simpower)was used to estimate the capacitors voltages. The estimatedcapacitors voltages of the two models are compared to thereal capacitors voltages. We define the real capacitor voltageby the capacitor voltage given by the voltages sensors of thecircuit model implemented in Simpower Matlab.

The different behavior of the interconnected observerwas performed. The capacitors values are C1 = C2 = 1000μF.The NPC Inverter is connected at three equilibrium phaseswhere each phase composed by an inductor L = 10 mHanda resistor R = 20Ω. To estimate the NPC capacitor voltagesaccording to (25) the observer parameter gain θj = 15000for j = 1, 2 is used. SVPWM was used to control themultilevel inverter described in Section 2. The switchingfrequency was fixed at 10 kHz. Simulations were carried outusing matlab/simulink. Matlab simulator is an importanttool where different system models (electrical, mechanical,thermal, etc.) can be developed. In fact, Matlab simulatorenables averaged model representation.

Figures 12 and 13 show the comparison between theestimated capacitors voltages C1 and C2 (using nonidealaverage model and circuit model) and the real capacitorvoltage.

Figures 14 and 15 show the estimated errors for theestimated capacitors voltagesVC1 andVC2. The error for eachmodel is calculated by (VCi-real)− (VCi-estimated).

In order to study the observer behavior, we changed theload of the first leg (L = 10 mH, R = 20Ω) to (L = 10 mH,R = 40Ω) at t = 0.1 s (Figures 16 and 17). In other terms,

8 Advances in Power Electronics

Three-level NPC inverter

ConcordiaInterconnected observer

Control (SVPWM)

Load

idc

R,L

IaIbIc

VC2 VC1

Figure 11: Block diagram of three-level NPC inverter and intercon-nected observer.

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.20

50

100

150

200

250

Time (s)

Rea

l an

d es

tim

ated

cap

acit

ors

volt

agesVC

1(V

)

VC1-estimated circuit

VC1-estimated average

VC1-estimated average: VC1 estimated using average modelVC1-estimated average: VC1 estimated using circuit model

VC1-real

Figure 12: Real and estimated capacitors voltages VC1 (V) usingnonideal average model and circuit model (Simpower Matlab).

Rea

l an

d es

tim

ated

cap

acit

ors

volt

agesVC

2(V

)

0 0.02 0.04 0.06 0.08 0.1

Time (s)

0.12 0.14 0.16 0.18 0.20

50

100

150

200

250

VC2-estimated circuit

VC2-estimated average

VC2-estimated average: VC2 estimated using average model

VC2-estimated average: VC2 estimated using circuit model

VC2-real

Figure 13: Real and estimated capacitors voltages VC2 (V) usingnonideal average model and circuit model (Simpower Matlab).

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

0

50

100

150

200

250

Time (s)

Estimated error using circuit model

Estimated error using average model−50Est

imat

ed e

rror

vol

tage

VC

2(V

)

Figure 14: Estimation errors for VC1 (V) using nonideal averagemodel and circuit model (Simpower Matlab).

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

0

50

100

150

200

250

Time (s)

Est

imat

ed e

rror

vol

tage

Estimated error using average model

Estimated error using circuit model

VC

2(V

)

−50

Figure 15: Estimation errors for VC2 (V) using nonideal averagemodel and circuit model (Simpower Matlab).

00.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.20

50

100

150

200

250

300

Time (s)

Rea

l an

d es

tim

ated

cap

acit

or

Disturbance instant

Real capacitor voltage VC1

Estimated capacitor voltage VC1

volt

agesVC

1(V

)

Figure 16: Real and estimated capacitors voltages VC1 (V) usingnonideal average model with disturbance load.

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.20

50

100

150

200

250

300

Times (s)

Rea

l an

d es

tim

ated

cap

acit

or

Disturbance instant

Real capacitor voltage VC2

Estimated capacitor voltage VC2

volt

agesVC

2(V

)

Figure 17: Real and estimated capacitors voltages VC2 (V) usingnonideal average model with disturbance load.

we have not got equilibrium three phases. Then, Figures 18and 19 show at t = 0.1 s the change of the load of the first leg(L = 10 mH, R = 20Ω) to (L = 10 mH, R = 40Ω) and att = 0.15 s we return to the initial load.

Simulations results show the usefulness of this design. Inany condition, the observer is able to follow the real capacitorvoltages accurately. Moreover, the good agreement betweenestimated capacitors voltages obtained by the proposed aver-aged model and the circuit model from Simpower Matlab isillustrated. We notice that simulation time with fine model(circuit model implemented in Simpower Matlab) is eighttimes (Table 1) greater than the simulation with the averagedmodel. This is an important reason to use averaged modelingespecially in complex converters architecture. Converterstates observer and control becomes, more and more easy.

Advances in Power Electronics 9

0 0.05 0.1 0.15 0.2 0.25 0.30

50

100

150

200

250

300

Time (s)

Rea

l an

d es

tim

ated

cap

acit

or

Estimated capacitorvoltage

Real capacitor voltage

Disturbance instant Disturbance instant eliminationvolt

agesVC

1(V

)

Figure 18: Real and estimated capacitors voltages VC1 (V) usingnonideal average model with disturbance load and its elimination.

0 0.05 0.1 0.15 0.2 0.25 0.30

50

100

150

200

250

300

Time (s)

Rea

l an

d es

tim

ated

cap

acit

ors

Estimated capacitorvoltage

Real capacitor voltage

Disturbance instant eliminationDisturbance instantvolt

agesVC

2(V

)

Figure 19: Real and estimated capacitors voltages VC2 (V) usingnonideal average model with disturbance load and its elimination.

6. Conclusion

The control and monitoring of the capacitors voltages inmultilevel NPC converter are essential. Measuring voltagesbecomes expensive and impractical because of the highvoltages and power levels handled in such applications. Thusthe advantage of using an observation technique becomesevident.

This paper proposed an adaptive observer to estimatethe capacitor voltages in NPC inverter. This observer canreconstruct the capacitor voltages accurately from the non-ideal average model inputs and replace the needed capacitorvoltage sensors. Simulation results show the good precisionof the proposed average model. It can be used for the NPCconverters analysis instead of fastidious simulations in circuittype simulators where simulations cost is unaffordable. Theobtained results are acceptable, and let us conclude that theobserver is well suited for purposes control of the capacitorvoltages in multilevel NPC inverter.

Appendices

A. Observability Definitions

We introduce some definitions related with the inputsapplied to the system. Consider a state-affine controlledsystem of the form

Σ

{x = A(u)x + B(u),

y = Cx,(A.1)

where x ∈ Rn, u ∈ Rm, y ∈ Rp with A : Rm → M(n,m), B :Rm → M(n, 1) continuous, and C ∈ M(p,n), where M(k, l)denotes the space of k × l matrices with coefficients in Rk(resp., l) are the number of rows (resp., columns). From nowon, we will assume that B(u) = 0 without loss of generality.

Notation. let ϕu(τ, t) denotes the transition matrix of

d

dτϕu(τ, t) = A(u(τ))x + ϕu(τ, t),

ϕu(τ, t) = I ,

(A.2)

with the classical relation ϕu(t1, t2)ϕu(t2, t3) = ϕu(t1, t3)

We then define the following:

(i) The observability gramian

Γ(t,T ,u) =∫ t+T

tϕTu (τ, t)CTCϕu(τ, t)dτ. (A.3)

(ii) The universality index

γ(t,T ,u) = mini

(λi(Γ(t,T ,u))), (A.4)

where λi(M) stands for the eigenvalues of a given matrix M.The input functions are assumed to be measurable and suchthat A(u) is bounded on the set of admissible inputs of R+.

Now, we give definitions of regular persistence of input u.

Definition 4 (regular Persistence). A measurable boundedinput u is said to be regularly persistent for the state-affinesystem (Σ) if there exists T � 0, α � 0, t0 � 0 such thatγ(t,T ,u) � 0 for every t ≥ t0.

B. Regular Persistence

This proof is based on the demonstration in [25].The dynamics of the estimation error εj = Zj − χj is

given by ε j = (A(S j) − P−1j CT

j C j)εj + ΔΓ j(S j , χj ,Zj), whereΔΓ j(S j , χj ,Zj) = Γ j(S j ,Zj)− Γ j(S j , χj) for j = 1, 2.

Now, let V = V1 + V2 be a Lyapunov function forthe interconnected system Σ, where V j(εj) = εTj Pjε j is aLyapunov function for each subsystem Σ j .

From the time derivative of V j(εj), it follows thatV j(εj) ≤ −θjV j(εj) + εTj PjΔΓ j(S j , χj ,Zj) for j = 1, 2.

Now, adding and subtracting the term ΔΓ j(S j , χj ,

Zj)TPjΔΓ j(S j , χj ,Zj) we have

V j

(εj)≤ − θjV j

(εj)

+ εTj PjΔΓ j(S j , χj ,Zj

)

± ΔΓ j(S j , χj ,Zj

)TPjΔΓ j

(S j , χj ,Zj

).

(B.1)

Next, regrouping the appropriate terms,

V j

(εj)≤ −

(θj − 1

)∥∥∥εj∥∥∥2

Pj−∥∥∥εj∥∥∥2

Pj+ 2εT

jPjΔΓ j

(S j , χj ,Zj

)

−∥∥∥ΔΓ j(S j , χj ,Zj

)∥∥∥2

Pj+∥∥∥ΔΓ j(S j , χj ,Zj

)∥∥∥2

Pj.

(B.2)

10 Advances in Power Electronics

From this inequality, we get V j(εj) ≤ −(θj − 1)‖εj‖2Pj

+

‖ΔΓ j(S j , χj ,Zj)‖2Pj

.

Now, from Assumption 2, we have ‖ΔΓ j(Sk, χj ,Zj)‖2Pk≤

(λl‖εl‖2Pj )l∈{1,2} /= j .

Then, we find V j(εj) ≤ −(θj − 1)‖εj‖2Pj

+

(λl‖εl‖2Pj )l∈{1,2} /= j .

And replacing this expression in V = V1 + V2 it followsthat:

V(ε) ≤2∑j=1

(−(θj − 1

)∥∥∥εj∥∥∥2

Pj+(λl‖εl‖2

Pj

)l∈{1,2} /= j

). (B.3)

Take into account that the inputs are regularly persistent,and then from Lemma 1 the matrix Pj is bounded. Using thelemma on equivalence of norms, that is, there exists a positiveconstant μl such that

‖εl‖2Pj ≤ μl‖εl‖2

Pl . (B.4)

Then, we get

V(ε) ≤2∑j=1

(−(θj − 1

)∥∥∥εj∥∥∥2

Pj+(λl‖εl‖2

Pl

)l∈{1,2} /= j

). (B.5)

or

V j

(εj)≤ −

2∑j=1

((θj − 1

)− μlλl

)∥∥∥εj∥∥∥2

Pj. (B.6)

Finally, we have

V(εj)≤ V(ε(t))e−γ(t−t0). (B.7)

For γ = min(γ1, γ2), where γj = (θj − 1) − μjλj , takingε = col(ε1, ε2), it is easy to see that

‖ε(t)‖ ≤ K‖ε(t0)‖e−γ(t−t0). (B.8)

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