Research ArticleStudy of Linearity and Power ConsumptionRequirements of CMOS Low Noise Amplifiers in Context ofLTE Systems and Beyond
Grzegorz Szczepkowski and Ronan Farrell
CTVR-The Telecommunication Research Centre Callan Institute National University of Ireland MaynoothMaynooth Country Kildare Ireland
Correspondence should be addressed to Ronan Farrell rfarrelleengnuimie
Received 5 December 2013 Accepted 22 January 2014 Published 4 March 2014
Academic Editors Y-S Hwang and G Snider
Copyright copy 2014 G Szczepkowski and R Farrell This is an open access article distributed under the Creative CommonsAttribution License which permits unrestricted use distribution and reproduction in any medium provided the original work isproperly cited
This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumptionin context of Long Term Evolution (LTE) systems and its future developments Using proposed figure of merit (FoM) to compare35 state-of-the-art LNA circuits published over the last decade the paper explores a dependence between amplifier performance(ie combined linearity noise figure and gain) and power consumption In order to satisfy stringent linearity specifications forLTE standard (and its likely successors) the paper predicts that LNA FoM increase in the range of +02 dBmW is expected andwill inevitably translate into a significant increase in power consumptionmdasha critical budget planning aspect for handheld devicesactive antenna arrays and base stations operating in small cells
1 Introduction
Long Term Evolution (LTE) is a next generation commu-nication standard developed by 3rd Generation PartnershipProject (3GPP) [1] allowing a high data rate transmissionover radio interface It represents a natural progressionfrom voice transmission systems as GSM through UMTS(with increased spectral efficiency for data transmission)to data transmission scheme where the majority of systemthroughput is used for high quality audiovisual streaminginternet access file sharing and gaming with peak downlinkbandwidths in excess of 100Mbps [2]
Such a dramatic increase in data throughput correspondsto proportional increase in either a bandwidth (BW) orsignal to noise ratio (SNR) or both at the same time Bothquantities cannot be made arbitrary high SNR is a functionof maximum transmitted power allowed for the systemdistance to the receiver and modulation scheme and theseparameters are usually optimised for the transmission BW iscontrolled by the availability of a radio spectrum allocated forthe system and to certain extent more bandwidth can be
assigned to increase channel capacity if needed (providingthat there is enough amount of unoccupied bandwidth left)Nowadays the number of various wideband radio systemscoexisting with LTE is significant and as a result the radiospectrum has become relatively congested For example3GPP specifies LTE frequency separation between frequency-division duplex (FDD) uplink and in the range of 45ndash400MHz or even smaller distance (for time-division duplex(TDD) transmission bands) [1]
From a radio receiver perspective in order to preventunwanted signals from reaching processing stages smallfrequency separation between bands imposes high selectivity(or signal rejection) Historically the most practical onehas been the use of high quality factor preselection filters(duplexers in transceivers) after the antenna however incontext of the wideband operation of LTE system thisapproach becomes less practical Since LTE transceiversoperate in UHF band 07ndash27GHz (note that the range is notcontinuous) it is impossible to design a single RF preselectionfilter that is simultaneously wideband and has high roll-off
Hindawi Publishing CorporationISRN ElectronicsVolume 2014 Article ID 391240 11 pageshttpdxdoiorg1011552014391240
2 ISRN Electronics
characteristics and its centre frequency can be tuned to anyband of interest
When high performance wideband filter is not availabletogether with a wanted signal radio receiver detects and triesto process many unwanted components of the spectrum inmost cases having an average power much larger than that ofthe signal of interest This would not present a serious prob-lem if the receiver was a completely a linear system (also notlimited by maximum power supply voltages and currents)having ability to process signal of any strength with constantperformance In practice however the receiver subcircuitsconsist of number of transistors and the relationship betweeninput and output is nonlinear
As a result all of the unwanted signals in the receivercross-modulate into wanted frequencies dramatically reduc-ing the effective SNR and transmission throughput Non-linearities also reduce gain of a wanted signal through twomechanisms known as compression and blocking reducingSNR of received signal even furtherThus in order tomitigateproblem of the destructive interference special care has to betaken to design a receiver system with high linearity espe-cially where a preselection filtering is far from ideal
This paper addresses the question of how high linearitylevels of LNA have to be to satisfy LTE requirements for givenSNR and what is a possible power penalty for achieving thisgoal providing a vital information on how much power hasto be budgeted for an RF receiver front-end design Linearityand power relationship is important not only for batteryoperating systems as handsets but also for base stations infemto- pico- andmetro-cells operating with reduced powerbudget andmultiple receivers To our knowledge a presentedstudy on LTE linearity performance in relation to variousCMOS LNA designs and its power budgets has not beenconducted before
This paper is organised as follows Section 2 introducesfundamental aspects of amplifier linearity together withthe corresponding metrics Section 3 describes three basiclinearization techniques used in many state-of-the-art LNAdesigns with special emphasis on power consumption Usingsystem specification from 3GPP the linearity requirementsfor LTE receiver are derived in Section 4 whereas Section 5discusses their impact on both standalone LNA circuit andRF front-end design Finally Section 6 introduces a figureof merit function that enables fair comparison betweendifferent published state-of-the-art CMOS LNA circuits Alsowe formulate a prediction of relative power supply levelsnecessary for future designs of LTE-compatible and beyondfor integrated RF LNAs
2 Amplifier Linearity Analysis
21 Taylor Series Description of Soft Nonlinearity Circuitsutilising transistors are characterised by a nonlinear relation-ship between their inputs and outputs The main source ofthis behaviour comes from the features of semiconductormaterials where electrical properties are strongly dependanton electrical potential energy In general transistors are usedas switches andor amplifiers (or more precisely transduc-ers providing some form of proportional transformation
between voltages and currents) When used as an amplifierMOS transistor can be characterised by a softnonlinearity [3]that is one can find a polynomial of a finite order sufficientlydescribing the nonlinearity within a limited range of inputsignal levels around certain bias point In the simplest ofcases Taylor series defines such a polynomial however whenreactive components (eg transistor capacitances) becomeimportant Volterra series approach is used instead [3] Asan example consider a simple low voltage LNA transconduc-tance amplifier in common source (CS) configuration biasedusing a NMOS current mirror depicted in Figure 1
Inductors 119871119863and 119871
119866have high impedance at frequency
of interest 119862119862capacitors provide AC coupling to a following
stage connected to the LNA Please note that for the followinglinearity analysis we assume that impedance matching noisefigure and bandwidth are not critical In practice all of theseconstraints have to be optimised simultaneously which leadsto a more complex relationship between parameters andcircuit architecture The output AC current of 119872
1flowing
through 119862119862can be described by the following polynomial
119894119900 (119905) =
infin
sum
119896=1
119892119896V119896in (119905) asymp
119873
sum
119896=1
119892119896V119896in (119905) (1)
where 119892119896is 119896th coefficient of the polynomial defined as
119892119896=
1
119896
120597119896119894out (1198810)
120597V119896 (2)
That is 119892119896represents 119896th derivative of 119894
119900(119905) in respect to the
input voltage for the device biased at certain DC point Notethat when the quiescent point of a soft nonlinearity changesthe coefficients described by (2) have to be recalculatedTypically the infinite series given by (1) is well approximatedby the first 3 to 5 elements as 119892
119896is inversely proportional to
factorial of 119896Polynomial description reveals the effects of intermod-
ulation gain compression and blocking taking place ina nonlinear amplifier Using trigonometric identities andassuming that input voltage consists of two signals operatingat different frequencies we can show (for nonzero 119892
2and 119892
3
coefficients)
Vin (119905) = 119860 sdot cos (1205961119905) + 119861 sdot cos (120596
2119905) (3)
1198922V2in (119905) prop 119892
2119860119861 sdot cos (120596
1119905 plusmn 1205962119905) (4)
1198923V3in (119905) prop
3
411989231198602119861 sdot cos (2120596
1119905 plusmn 1205962119905) (5)
ISRN Electronics 3
1198923V3in (119905) prop
3
411989231198601198612sdot cos (2120596
2119905 plusmn 1205961119905) (6)
The output current (1) consists of many different harmoniccomponents these given by (4) are the second order inter-modulation products IM2 whereas (5) and (6) are known asthe third order intermodulation products IM3 Note that themagnitudes of IM2 and IM3 are proportional to119860 and 119861 andthey increase much faster than the first order output termsgiven by
1198941199001 (119905) asymp (119892
1119860 +
3
411989231198603+3
211989231198601198612) times cos (120596
1119905) (7)
1198941199002 (119905) asymp (119892
1119861 +
3
411989231198613+3
211989231198611198602) times cos (120596
2119905) (8)
Equations (7) and (8) show that the transconductor outputat 1205961and 120596
2depends on amplitudes of both signals Inter-
estingly for 1198923lt0 the output current 119894
119900(119905) is reduced by large
amplitudes of wanted input signal (gain compression) and thestrong interference (known as blocking1198601198612 and 1198611198602 termsresp)
Formulas (4)ndash(8) are used as basic metrics for linearityanalysis known as input intercept points (IIP) [4 5] As men-tioned previously IM products amplitude increases fasterthan the amplitude of fundamental signal therefore it is pos-sible to find theoretical input amplitudes 119860 and 119861 for whichthe resulting IM products equalize with the fundamentalThe second order (IIP2) and third order (IIP3) interceptpoints are respectively defined as [4 5]
Typically values for IIP2 and IIP3 are much larger thanthe maximum voltages and currents allowed in the circuitThe intercept points are approximated by finding crossoverpoints of the tangent lines from measurements of IM2 IM3and fundamental response As far as a linearity of LNAis concerned the higher the IIP2 and IIP3 the better theperformance of the amplifier Note that RF literature andvendor datasheets typically express both intercept points interms of power referred to 50Ω And this standard notation isfollowed in this paper
22 IIP2 and IIP3 Analysis Example As an example considerlarge signal model of an UMC 130 nm NMOS RF transistor(119871 = 012 120583m 119882 = 09 120583m NF = 4 119872 = 1 and119881DD = 12V) operating in the LNA circuit from Figure 1The polynomial coefficients (2) were obtained using Eldo RFsimulator Using (9) we can calculate IIP2 and IIP3 asfunction of gate bias voltage 119881
119866for the amplifier in question
The results are depicted in Figure 2The presented curves show that there are three possible
bias points for improved linearity where IIP2 and IIP3 are attheir respective maximums
In
Out
IB
M2
LD
LG
CC
CC
M1
VG
VDDVDD
Figure 1 Simple low voltage transconductance LNA
0 02 04 06 08 1 12
0
10
20
30
40
50
IIP2IIP3
IIP
(dBm
)
VG (V)
minus10
Figure 2 IIP2 and IIP3 of the amplifier from Figure 1
0104mW IIP2 asymp 45 dBm and IIP3 asymp 30 dBmAt this point IM3 products are minimised as wellas a power consumption Transistor is biased where1198923
asymp 0 resulting in high IIP3 IM2 products arenot minimised but they are usually not a limitingfactor for a linearity performance of the receiver whenoriginated from LNA [4 5] However at this biaspoint small119892119898 value translates into reduced gain andfrom a noise perspective this has a negative impacton system SNR Since unity gain frequency 119891
119905of
the transistor is proportional to 119892119898 the maximumoperation frequency of the circuit is limited
(ii) 119881119866
asymp 1080mV ID = 187mA 119892119898 = 317mAVPDC = 224mW IIP2 asymp 45 dBm and IIP3 asymp 20 dBmAt this point IM2 products are minimised IM3 prod-ucts are relatively small as wellThe transconductance
4 ISRN Electronics
In Out
120573
minus
+
Figure 3 Feedback loop linearization concept
is at its maximum 26 times larger than in theprevious case improving both gain and 119891
119905 The cost
however is 21 times more power dissipated by thetransistor than before
(iii) 119881119866
asymp 700mV ID = 071mA 119892119898 = 286mAVPDC = 085mW IIP2 asymp 13 dBm and IIP3 asymp 13 dBmDepending on the system requirements (discussed indetail later in this paper) this point may representa design trade-off between power consumption andlinearity delivering 90 of maximum gain with morethan a 60 of power reduction in comparison to theprevious case
As mentioned before in practice the design of LNA hasto involve a simultaneous optimisation of noise impedancematching gain stability and linearity (as all of these cannotbe maximised at the same time) however the presentedmethodology can be used as a starting point for a linear LNAdesign with a limited power budget
3 Linearization Techniques
It is natural to expect that the relationship between powerconsumption and linearity of an LNA is much more complexthan highlighted in the previous section (in other words it isnot only the function of transistor bias point) In the contextof this work it is important to shedmore light on how linearityof an amplifier can be improved by various circuit techniquesthat among other design constraints significantly affect thepower consumption as well
31 Negative Feedback Figure 3 depicts well known negativefeedback (FB) circuit configuration FB samples a fraction ofthe output signal and transmits it back to the amplifier inputout of phase Gray et al [6] show that effects of soft nonlin-earity can be improved because both gain and its sensitivityon input signal are chiefly controlled by a transfer function offeedback loop block 120573 If 120573 can be made linear this translatesdirectly to improved linearity of the whole closed loopsystem
Zhang and Sanchez-Sinencio [7] show that if amplifiergain is equal to 119866 IIP2 is improved by as much as 1 +
119866120573 whereas increase in IIP3 is proportional to (1 + 119866120573)32
but only for 1198922
asymp 0 When the second order polynomialcoefficient is finite resulting IM2 products are fed back to anamplifier and intermodulate into IM3 quickly deterioratingtheoretical improvements in IIP3 The main advantage of FB
In Out
120572
+
Figure 4 Feed-forward loop linearization concept
In Out120575
iL
iL + iNL
iNL
Figure 5 Postdistortion linearization concept
method is the use of passive components that do not consumepower (majority of typical designs employs highly linear RLCcomponents as 120573) The main drawback is strong dependenceof circuit linearity on 119866120573 product that is generally known tovary significantly at RF frequencies especially in widebandapplications
32 Feed-Forward and Derivative Superposition Anotherapproach to improve LNA linearity is a feed-forward (FF)technique depicted in Figure 4 In this method input signalis connected to the inputs of nonlinear amplifier and aparallel block 120572 whereas the output signal is a difference ofcorresponding output signals from each of the blocks Theblock 120572 scales input signal by the factor of 120574 gt 1 passes thissignal through auxiliary amplifier with the same nonlinearityas the one of the LNA and then scales the response down by120574minus3 As a result after the final addition IM3 products from
both paths are ideally cancelled out [8 9] In practice due toprocess variations IM3 cancellation is limited requires twicethe power (due to an auxiliary amplifier) and increases noiseTheFFmethod relies heavily on constant andprecise value for120574which is hard to obtain in practice and input matching maybe problematic especially in wideband applications [7]
One of the modifications of FF approach known asderivative superposition (DS) uses nonlinearity 120572 with 3rdorder polynomial of the opposite sign to the one of the LNAthat is 119892
3120572= minus119892
3LNA [10 11] The main advantage of thismethod is that IM3 products are automatically out of phasewithout necessity of using 120574 scaling factor as in the standardFF approach In addition an auxiliary amplifier operates inweak inversion withminimal impact on the power consump-tion [10 11] The disadvantage is a limited range of relativelylow input amplitudes 120572 block can operate with [7]
33 Postdistortion Last method presented in Figure 5 isknown as postdistortion (PD) and involves the auxiliarynonlinearity 120575 supplied after the LNA [12] This block is
characterised by the same nonlinearity as LNA however withopposite sign effectively grounding IM products but passinglinear response to the output The most important advantageis that input matching of LNA is not affected as in the case ofFFmethodsmentioned previouslyThedrawback is increasedpower consumption as 120575 is usually biased in saturation forrobust distortion cancellation
The three fundamental linearization techniques refer-enced in this work show that in some cases nonlinearbehaviour of the amplifier can be improved without powerincrease (FB) whereas a further suppression of IM productsrequires more energy As a result in practice the predictionof power consumption required for certain linearity is a morecomplex process We will focus on this issue towards the endof this paper
4 LTE Linearity Requirements
41 3GPP LTE Specification and System Parameters Thelinearity requirements for LTE are not reported specificallyby 3GPP however after some elaboration they can be derivedfrom the intermodulation specifications 36101 and 36104[1] for both user equipment (UE) and base station (BS)receivers respectively In this paper we use the most recentversion of aforementioned LTE specification Revision 11March 2013 and we limit our calculations to UE as BS hasmore scenarios differing in performance (namelyWideAreaMedium Range Local Area and Home) However the pre-sented formulation can be successfully applied to any type ofBS if necessary In order to represent performance variationsin different propagation scenarios 3GPP considers referencecarriers with QPSK 16QAM and 64QAM modulations andfollowing bandwidths 14 3 5 10 15 and 20MHz In thiswork we present calculations for QPSK case for all band-widths and for a single LTE Band 2 (uplink UL centred 1960at MHz downlink DL at 1880MHz 60MHz bandwidth80MHz separation) [2] Finally as mentioned previously wewill focus only on IIP3 as assuming that the second order dis-tortion in LNA is not usually a limiting factor for the linearityof complete receiver
All system parameters necessary to calculate IIP3 arepresented in Table 1
(i) 119875REFSENS is a minimum average power applied toUE antenna ports (LTE assumes 2 Rx antennae fordiversity scheme) to achieve at least 95 ofmaximumthroughput
(ii) Thermal noise floor for given bandwidth at tempera-ture of 290K
(iii) 119877119909 Margin is a required increase inminimumaveragereceived signal power in the presence of blockers andinterferers over nominal 119875REFSENS value
(iv) 3GPP derives intermodulation requirements for twointerfering signals one is a continuous wave (CW)the other one is a modulated carrier with bandwidthranging in between 14 and 5MHz
42 In-Band IIP3 Specification In-band linearity require-ment defines receiver robustness against cross modulationproducts of other channels of the same band or any CWinterferer present within the band of interest According to36101 rev11 specification the receiver has to be able to detecta wanted signal in presence of two interferers with averagepower of minus46 dBm each CW interferer is placed at minusBW2 minus75MHz (low side) or BW2 + 75MHz (high side) from thecarrier frequency of the band of interest whereas the mod-ulated interferer is located at twice the frequency of the CWsignal For example considering high side interferers and BWof a wanted signal of 10MHz the CW interferer is located at125MHz from the carrier whereas 5MHz modulated inter-ferer is 25MHz above the carrier It is easy to show that oneof their IM3 products at 2119891CW-119891IM is centred around thecarrier as well
119891IM3 = 2 (119891119888+ 125MHz) minus (119891
119888+ 25MHz) = 119891
119888 (10)
Assuming that the intermodulation products are allowedto increase noise floor from Table 1 by Rx Margin of 6 dB(assuming channel bandwidth of 10MHz) resulting in max-imum noise floor of minus98 dBm Since thermal noise and IM3products are not correlated we can calculate the maximumpower of intermodulation components
119875IM3 = 10log10(10minus9810
minus 10minus10410
) = minus9926 dBm (11)
As the interferer bandwidth is 5MHz for the considered caseIM3 product occupies exactly half of the signal BWThus (11)has to be corrected by the ratio of two quantities which nowrepresents an equivalent average IM level for 10MHz wantedsignal [13]
119875IM3 = minus9926 minus 10log10(10MHz5MHz
) = minus10224 dBm (12)
Finally IIP3 can be estimated taking power of interferers andcalculated power of the third order intermodulation product[13]
IIP3 = 05 (3119875INT minus 119875IM3) = +1788 dBm (13)
Table 2 presents the results of in-band IIP3 calculations forall the possible BW values Note that our calculations are 3-4 dB more stringent to the results of Sesia et al [13] wherethe authors used an average implementationmargin of 25 dBin their calculation but did not provide any explanationbehind this choice Thus we assumed that in practice moreimplementation margin may be necessary for example dueto process variations
6 ISRN Electronics
Table 2 Calculated IIP3 for LTE assuming two minus46 dBm interferers(in-band) and minus31 dBm interference (out-of-band)
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
characteristics and its centre frequency can be tuned to anyband of interest
When high performance wideband filter is not availabletogether with a wanted signal radio receiver detects and triesto process many unwanted components of the spectrum inmost cases having an average power much larger than that ofthe signal of interest This would not present a serious prob-lem if the receiver was a completely a linear system (also notlimited by maximum power supply voltages and currents)having ability to process signal of any strength with constantperformance In practice however the receiver subcircuitsconsist of number of transistors and the relationship betweeninput and output is nonlinear
As a result all of the unwanted signals in the receivercross-modulate into wanted frequencies dramatically reduc-ing the effective SNR and transmission throughput Non-linearities also reduce gain of a wanted signal through twomechanisms known as compression and blocking reducingSNR of received signal even furtherThus in order tomitigateproblem of the destructive interference special care has to betaken to design a receiver system with high linearity espe-cially where a preselection filtering is far from ideal
This paper addresses the question of how high linearitylevels of LNA have to be to satisfy LTE requirements for givenSNR and what is a possible power penalty for achieving thisgoal providing a vital information on how much power hasto be budgeted for an RF receiver front-end design Linearityand power relationship is important not only for batteryoperating systems as handsets but also for base stations infemto- pico- andmetro-cells operating with reduced powerbudget andmultiple receivers To our knowledge a presentedstudy on LTE linearity performance in relation to variousCMOS LNA designs and its power budgets has not beenconducted before
This paper is organised as follows Section 2 introducesfundamental aspects of amplifier linearity together withthe corresponding metrics Section 3 describes three basiclinearization techniques used in many state-of-the-art LNAdesigns with special emphasis on power consumption Usingsystem specification from 3GPP the linearity requirementsfor LTE receiver are derived in Section 4 whereas Section 5discusses their impact on both standalone LNA circuit andRF front-end design Finally Section 6 introduces a figureof merit function that enables fair comparison betweendifferent published state-of-the-art CMOS LNA circuits Alsowe formulate a prediction of relative power supply levelsnecessary for future designs of LTE-compatible and beyondfor integrated RF LNAs
2 Amplifier Linearity Analysis
21 Taylor Series Description of Soft Nonlinearity Circuitsutilising transistors are characterised by a nonlinear relation-ship between their inputs and outputs The main source ofthis behaviour comes from the features of semiconductormaterials where electrical properties are strongly dependanton electrical potential energy In general transistors are usedas switches andor amplifiers (or more precisely transduc-ers providing some form of proportional transformation
between voltages and currents) When used as an amplifierMOS transistor can be characterised by a softnonlinearity [3]that is one can find a polynomial of a finite order sufficientlydescribing the nonlinearity within a limited range of inputsignal levels around certain bias point In the simplest ofcases Taylor series defines such a polynomial however whenreactive components (eg transistor capacitances) becomeimportant Volterra series approach is used instead [3] Asan example consider a simple low voltage LNA transconduc-tance amplifier in common source (CS) configuration biasedusing a NMOS current mirror depicted in Figure 1
Inductors 119871119863and 119871
119866have high impedance at frequency
of interest 119862119862capacitors provide AC coupling to a following
stage connected to the LNA Please note that for the followinglinearity analysis we assume that impedance matching noisefigure and bandwidth are not critical In practice all of theseconstraints have to be optimised simultaneously which leadsto a more complex relationship between parameters andcircuit architecture The output AC current of 119872
1flowing
through 119862119862can be described by the following polynomial
119894119900 (119905) =
infin
sum
119896=1
119892119896V119896in (119905) asymp
119873
sum
119896=1
119892119896V119896in (119905) (1)
where 119892119896is 119896th coefficient of the polynomial defined as
119892119896=
1
119896
120597119896119894out (1198810)
120597V119896 (2)
That is 119892119896represents 119896th derivative of 119894
119900(119905) in respect to the
input voltage for the device biased at certain DC point Notethat when the quiescent point of a soft nonlinearity changesthe coefficients described by (2) have to be recalculatedTypically the infinite series given by (1) is well approximatedby the first 3 to 5 elements as 119892
119896is inversely proportional to
factorial of 119896Polynomial description reveals the effects of intermod-
ulation gain compression and blocking taking place ina nonlinear amplifier Using trigonometric identities andassuming that input voltage consists of two signals operatingat different frequencies we can show (for nonzero 119892
2and 119892
3
coefficients)
Vin (119905) = 119860 sdot cos (1205961119905) + 119861 sdot cos (120596
2119905) (3)
1198922V2in (119905) prop 119892
2119860119861 sdot cos (120596
1119905 plusmn 1205962119905) (4)
1198923V3in (119905) prop
3
411989231198602119861 sdot cos (2120596
1119905 plusmn 1205962119905) (5)
ISRN Electronics 3
1198923V3in (119905) prop
3
411989231198601198612sdot cos (2120596
2119905 plusmn 1205961119905) (6)
The output current (1) consists of many different harmoniccomponents these given by (4) are the second order inter-modulation products IM2 whereas (5) and (6) are known asthe third order intermodulation products IM3 Note that themagnitudes of IM2 and IM3 are proportional to119860 and 119861 andthey increase much faster than the first order output termsgiven by
1198941199001 (119905) asymp (119892
1119860 +
3
411989231198603+3
211989231198601198612) times cos (120596
1119905) (7)
1198941199002 (119905) asymp (119892
1119861 +
3
411989231198613+3
211989231198611198602) times cos (120596
2119905) (8)
Equations (7) and (8) show that the transconductor outputat 1205961and 120596
2depends on amplitudes of both signals Inter-
estingly for 1198923lt0 the output current 119894
119900(119905) is reduced by large
amplitudes of wanted input signal (gain compression) and thestrong interference (known as blocking1198601198612 and 1198611198602 termsresp)
Formulas (4)ndash(8) are used as basic metrics for linearityanalysis known as input intercept points (IIP) [4 5] As men-tioned previously IM products amplitude increases fasterthan the amplitude of fundamental signal therefore it is pos-sible to find theoretical input amplitudes 119860 and 119861 for whichthe resulting IM products equalize with the fundamentalThe second order (IIP2) and third order (IIP3) interceptpoints are respectively defined as [4 5]
Typically values for IIP2 and IIP3 are much larger thanthe maximum voltages and currents allowed in the circuitThe intercept points are approximated by finding crossoverpoints of the tangent lines from measurements of IM2 IM3and fundamental response As far as a linearity of LNAis concerned the higher the IIP2 and IIP3 the better theperformance of the amplifier Note that RF literature andvendor datasheets typically express both intercept points interms of power referred to 50Ω And this standard notation isfollowed in this paper
22 IIP2 and IIP3 Analysis Example As an example considerlarge signal model of an UMC 130 nm NMOS RF transistor(119871 = 012 120583m 119882 = 09 120583m NF = 4 119872 = 1 and119881DD = 12V) operating in the LNA circuit from Figure 1The polynomial coefficients (2) were obtained using Eldo RFsimulator Using (9) we can calculate IIP2 and IIP3 asfunction of gate bias voltage 119881
119866for the amplifier in question
The results are depicted in Figure 2The presented curves show that there are three possible
bias points for improved linearity where IIP2 and IIP3 are attheir respective maximums
In
Out
IB
M2
LD
LG
CC
CC
M1
VG
VDDVDD
Figure 1 Simple low voltage transconductance LNA
0 02 04 06 08 1 12
0
10
20
30
40
50
IIP2IIP3
IIP
(dBm
)
VG (V)
minus10
Figure 2 IIP2 and IIP3 of the amplifier from Figure 1
0104mW IIP2 asymp 45 dBm and IIP3 asymp 30 dBmAt this point IM3 products are minimised as wellas a power consumption Transistor is biased where1198923
asymp 0 resulting in high IIP3 IM2 products arenot minimised but they are usually not a limitingfactor for a linearity performance of the receiver whenoriginated from LNA [4 5] However at this biaspoint small119892119898 value translates into reduced gain andfrom a noise perspective this has a negative impacton system SNR Since unity gain frequency 119891
119905of
the transistor is proportional to 119892119898 the maximumoperation frequency of the circuit is limited
(ii) 119881119866
asymp 1080mV ID = 187mA 119892119898 = 317mAVPDC = 224mW IIP2 asymp 45 dBm and IIP3 asymp 20 dBmAt this point IM2 products are minimised IM3 prod-ucts are relatively small as wellThe transconductance
4 ISRN Electronics
In Out
120573
minus
+
Figure 3 Feedback loop linearization concept
is at its maximum 26 times larger than in theprevious case improving both gain and 119891
119905 The cost
however is 21 times more power dissipated by thetransistor than before
(iii) 119881119866
asymp 700mV ID = 071mA 119892119898 = 286mAVPDC = 085mW IIP2 asymp 13 dBm and IIP3 asymp 13 dBmDepending on the system requirements (discussed indetail later in this paper) this point may representa design trade-off between power consumption andlinearity delivering 90 of maximum gain with morethan a 60 of power reduction in comparison to theprevious case
As mentioned before in practice the design of LNA hasto involve a simultaneous optimisation of noise impedancematching gain stability and linearity (as all of these cannotbe maximised at the same time) however the presentedmethodology can be used as a starting point for a linear LNAdesign with a limited power budget
3 Linearization Techniques
It is natural to expect that the relationship between powerconsumption and linearity of an LNA is much more complexthan highlighted in the previous section (in other words it isnot only the function of transistor bias point) In the contextof this work it is important to shedmore light on how linearityof an amplifier can be improved by various circuit techniquesthat among other design constraints significantly affect thepower consumption as well
31 Negative Feedback Figure 3 depicts well known negativefeedback (FB) circuit configuration FB samples a fraction ofthe output signal and transmits it back to the amplifier inputout of phase Gray et al [6] show that effects of soft nonlin-earity can be improved because both gain and its sensitivityon input signal are chiefly controlled by a transfer function offeedback loop block 120573 If 120573 can be made linear this translatesdirectly to improved linearity of the whole closed loopsystem
Zhang and Sanchez-Sinencio [7] show that if amplifiergain is equal to 119866 IIP2 is improved by as much as 1 +
119866120573 whereas increase in IIP3 is proportional to (1 + 119866120573)32
but only for 1198922
asymp 0 When the second order polynomialcoefficient is finite resulting IM2 products are fed back to anamplifier and intermodulate into IM3 quickly deterioratingtheoretical improvements in IIP3 The main advantage of FB
In Out
120572
+
Figure 4 Feed-forward loop linearization concept
In Out120575
iL
iL + iNL
iNL
Figure 5 Postdistortion linearization concept
method is the use of passive components that do not consumepower (majority of typical designs employs highly linear RLCcomponents as 120573) The main drawback is strong dependenceof circuit linearity on 119866120573 product that is generally known tovary significantly at RF frequencies especially in widebandapplications
32 Feed-Forward and Derivative Superposition Anotherapproach to improve LNA linearity is a feed-forward (FF)technique depicted in Figure 4 In this method input signalis connected to the inputs of nonlinear amplifier and aparallel block 120572 whereas the output signal is a difference ofcorresponding output signals from each of the blocks Theblock 120572 scales input signal by the factor of 120574 gt 1 passes thissignal through auxiliary amplifier with the same nonlinearityas the one of the LNA and then scales the response down by120574minus3 As a result after the final addition IM3 products from
both paths are ideally cancelled out [8 9] In practice due toprocess variations IM3 cancellation is limited requires twicethe power (due to an auxiliary amplifier) and increases noiseTheFFmethod relies heavily on constant andprecise value for120574which is hard to obtain in practice and input matching maybe problematic especially in wideband applications [7]
One of the modifications of FF approach known asderivative superposition (DS) uses nonlinearity 120572 with 3rdorder polynomial of the opposite sign to the one of the LNAthat is 119892
3120572= minus119892
3LNA [10 11] The main advantage of thismethod is that IM3 products are automatically out of phasewithout necessity of using 120574 scaling factor as in the standardFF approach In addition an auxiliary amplifier operates inweak inversion withminimal impact on the power consump-tion [10 11] The disadvantage is a limited range of relativelylow input amplitudes 120572 block can operate with [7]
33 Postdistortion Last method presented in Figure 5 isknown as postdistortion (PD) and involves the auxiliarynonlinearity 120575 supplied after the LNA [12] This block is
characterised by the same nonlinearity as LNA however withopposite sign effectively grounding IM products but passinglinear response to the output The most important advantageis that input matching of LNA is not affected as in the case ofFFmethodsmentioned previouslyThedrawback is increasedpower consumption as 120575 is usually biased in saturation forrobust distortion cancellation
The three fundamental linearization techniques refer-enced in this work show that in some cases nonlinearbehaviour of the amplifier can be improved without powerincrease (FB) whereas a further suppression of IM productsrequires more energy As a result in practice the predictionof power consumption required for certain linearity is a morecomplex process We will focus on this issue towards the endof this paper
4 LTE Linearity Requirements
41 3GPP LTE Specification and System Parameters Thelinearity requirements for LTE are not reported specificallyby 3GPP however after some elaboration they can be derivedfrom the intermodulation specifications 36101 and 36104[1] for both user equipment (UE) and base station (BS)receivers respectively In this paper we use the most recentversion of aforementioned LTE specification Revision 11March 2013 and we limit our calculations to UE as BS hasmore scenarios differing in performance (namelyWideAreaMedium Range Local Area and Home) However the pre-sented formulation can be successfully applied to any type ofBS if necessary In order to represent performance variationsin different propagation scenarios 3GPP considers referencecarriers with QPSK 16QAM and 64QAM modulations andfollowing bandwidths 14 3 5 10 15 and 20MHz In thiswork we present calculations for QPSK case for all band-widths and for a single LTE Band 2 (uplink UL centred 1960at MHz downlink DL at 1880MHz 60MHz bandwidth80MHz separation) [2] Finally as mentioned previously wewill focus only on IIP3 as assuming that the second order dis-tortion in LNA is not usually a limiting factor for the linearityof complete receiver
All system parameters necessary to calculate IIP3 arepresented in Table 1
(i) 119875REFSENS is a minimum average power applied toUE antenna ports (LTE assumes 2 Rx antennae fordiversity scheme) to achieve at least 95 ofmaximumthroughput
(ii) Thermal noise floor for given bandwidth at tempera-ture of 290K
(iii) 119877119909 Margin is a required increase inminimumaveragereceived signal power in the presence of blockers andinterferers over nominal 119875REFSENS value
(iv) 3GPP derives intermodulation requirements for twointerfering signals one is a continuous wave (CW)the other one is a modulated carrier with bandwidthranging in between 14 and 5MHz
42 In-Band IIP3 Specification In-band linearity require-ment defines receiver robustness against cross modulationproducts of other channels of the same band or any CWinterferer present within the band of interest According to36101 rev11 specification the receiver has to be able to detecta wanted signal in presence of two interferers with averagepower of minus46 dBm each CW interferer is placed at minusBW2 minus75MHz (low side) or BW2 + 75MHz (high side) from thecarrier frequency of the band of interest whereas the mod-ulated interferer is located at twice the frequency of the CWsignal For example considering high side interferers and BWof a wanted signal of 10MHz the CW interferer is located at125MHz from the carrier whereas 5MHz modulated inter-ferer is 25MHz above the carrier It is easy to show that oneof their IM3 products at 2119891CW-119891IM is centred around thecarrier as well
119891IM3 = 2 (119891119888+ 125MHz) minus (119891
119888+ 25MHz) = 119891
119888 (10)
Assuming that the intermodulation products are allowedto increase noise floor from Table 1 by Rx Margin of 6 dB(assuming channel bandwidth of 10MHz) resulting in max-imum noise floor of minus98 dBm Since thermal noise and IM3products are not correlated we can calculate the maximumpower of intermodulation components
119875IM3 = 10log10(10minus9810
minus 10minus10410
) = minus9926 dBm (11)
As the interferer bandwidth is 5MHz for the considered caseIM3 product occupies exactly half of the signal BWThus (11)has to be corrected by the ratio of two quantities which nowrepresents an equivalent average IM level for 10MHz wantedsignal [13]
119875IM3 = minus9926 minus 10log10(10MHz5MHz
) = minus10224 dBm (12)
Finally IIP3 can be estimated taking power of interferers andcalculated power of the third order intermodulation product[13]
IIP3 = 05 (3119875INT minus 119875IM3) = +1788 dBm (13)
Table 2 presents the results of in-band IIP3 calculations forall the possible BW values Note that our calculations are 3-4 dB more stringent to the results of Sesia et al [13] wherethe authors used an average implementationmargin of 25 dBin their calculation but did not provide any explanationbehind this choice Thus we assumed that in practice moreimplementation margin may be necessary for example dueto process variations
6 ISRN Electronics
Table 2 Calculated IIP3 for LTE assuming two minus46 dBm interferers(in-band) and minus31 dBm interference (out-of-band)
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
The output current (1) consists of many different harmoniccomponents these given by (4) are the second order inter-modulation products IM2 whereas (5) and (6) are known asthe third order intermodulation products IM3 Note that themagnitudes of IM2 and IM3 are proportional to119860 and 119861 andthey increase much faster than the first order output termsgiven by
1198941199001 (119905) asymp (119892
1119860 +
3
411989231198603+3
211989231198601198612) times cos (120596
1119905) (7)
1198941199002 (119905) asymp (119892
1119861 +
3
411989231198613+3
211989231198611198602) times cos (120596
2119905) (8)
Equations (7) and (8) show that the transconductor outputat 1205961and 120596
2depends on amplitudes of both signals Inter-
estingly for 1198923lt0 the output current 119894
119900(119905) is reduced by large
amplitudes of wanted input signal (gain compression) and thestrong interference (known as blocking1198601198612 and 1198611198602 termsresp)
Formulas (4)ndash(8) are used as basic metrics for linearityanalysis known as input intercept points (IIP) [4 5] As men-tioned previously IM products amplitude increases fasterthan the amplitude of fundamental signal therefore it is pos-sible to find theoretical input amplitudes 119860 and 119861 for whichthe resulting IM products equalize with the fundamentalThe second order (IIP2) and third order (IIP3) interceptpoints are respectively defined as [4 5]
Typically values for IIP2 and IIP3 are much larger thanthe maximum voltages and currents allowed in the circuitThe intercept points are approximated by finding crossoverpoints of the tangent lines from measurements of IM2 IM3and fundamental response As far as a linearity of LNAis concerned the higher the IIP2 and IIP3 the better theperformance of the amplifier Note that RF literature andvendor datasheets typically express both intercept points interms of power referred to 50Ω And this standard notation isfollowed in this paper
22 IIP2 and IIP3 Analysis Example As an example considerlarge signal model of an UMC 130 nm NMOS RF transistor(119871 = 012 120583m 119882 = 09 120583m NF = 4 119872 = 1 and119881DD = 12V) operating in the LNA circuit from Figure 1The polynomial coefficients (2) were obtained using Eldo RFsimulator Using (9) we can calculate IIP2 and IIP3 asfunction of gate bias voltage 119881
119866for the amplifier in question
The results are depicted in Figure 2The presented curves show that there are three possible
bias points for improved linearity where IIP2 and IIP3 are attheir respective maximums
In
Out
IB
M2
LD
LG
CC
CC
M1
VG
VDDVDD
Figure 1 Simple low voltage transconductance LNA
0 02 04 06 08 1 12
0
10
20
30
40
50
IIP2IIP3
IIP
(dBm
)
VG (V)
minus10
Figure 2 IIP2 and IIP3 of the amplifier from Figure 1
0104mW IIP2 asymp 45 dBm and IIP3 asymp 30 dBmAt this point IM3 products are minimised as wellas a power consumption Transistor is biased where1198923
asymp 0 resulting in high IIP3 IM2 products arenot minimised but they are usually not a limitingfactor for a linearity performance of the receiver whenoriginated from LNA [4 5] However at this biaspoint small119892119898 value translates into reduced gain andfrom a noise perspective this has a negative impacton system SNR Since unity gain frequency 119891
119905of
the transistor is proportional to 119892119898 the maximumoperation frequency of the circuit is limited
(ii) 119881119866
asymp 1080mV ID = 187mA 119892119898 = 317mAVPDC = 224mW IIP2 asymp 45 dBm and IIP3 asymp 20 dBmAt this point IM2 products are minimised IM3 prod-ucts are relatively small as wellThe transconductance
4 ISRN Electronics
In Out
120573
minus
+
Figure 3 Feedback loop linearization concept
is at its maximum 26 times larger than in theprevious case improving both gain and 119891
119905 The cost
however is 21 times more power dissipated by thetransistor than before
(iii) 119881119866
asymp 700mV ID = 071mA 119892119898 = 286mAVPDC = 085mW IIP2 asymp 13 dBm and IIP3 asymp 13 dBmDepending on the system requirements (discussed indetail later in this paper) this point may representa design trade-off between power consumption andlinearity delivering 90 of maximum gain with morethan a 60 of power reduction in comparison to theprevious case
As mentioned before in practice the design of LNA hasto involve a simultaneous optimisation of noise impedancematching gain stability and linearity (as all of these cannotbe maximised at the same time) however the presentedmethodology can be used as a starting point for a linear LNAdesign with a limited power budget
3 Linearization Techniques
It is natural to expect that the relationship between powerconsumption and linearity of an LNA is much more complexthan highlighted in the previous section (in other words it isnot only the function of transistor bias point) In the contextof this work it is important to shedmore light on how linearityof an amplifier can be improved by various circuit techniquesthat among other design constraints significantly affect thepower consumption as well
31 Negative Feedback Figure 3 depicts well known negativefeedback (FB) circuit configuration FB samples a fraction ofthe output signal and transmits it back to the amplifier inputout of phase Gray et al [6] show that effects of soft nonlin-earity can be improved because both gain and its sensitivityon input signal are chiefly controlled by a transfer function offeedback loop block 120573 If 120573 can be made linear this translatesdirectly to improved linearity of the whole closed loopsystem
Zhang and Sanchez-Sinencio [7] show that if amplifiergain is equal to 119866 IIP2 is improved by as much as 1 +
119866120573 whereas increase in IIP3 is proportional to (1 + 119866120573)32
but only for 1198922
asymp 0 When the second order polynomialcoefficient is finite resulting IM2 products are fed back to anamplifier and intermodulate into IM3 quickly deterioratingtheoretical improvements in IIP3 The main advantage of FB
In Out
120572
+
Figure 4 Feed-forward loop linearization concept
In Out120575
iL
iL + iNL
iNL
Figure 5 Postdistortion linearization concept
method is the use of passive components that do not consumepower (majority of typical designs employs highly linear RLCcomponents as 120573) The main drawback is strong dependenceof circuit linearity on 119866120573 product that is generally known tovary significantly at RF frequencies especially in widebandapplications
32 Feed-Forward and Derivative Superposition Anotherapproach to improve LNA linearity is a feed-forward (FF)technique depicted in Figure 4 In this method input signalis connected to the inputs of nonlinear amplifier and aparallel block 120572 whereas the output signal is a difference ofcorresponding output signals from each of the blocks Theblock 120572 scales input signal by the factor of 120574 gt 1 passes thissignal through auxiliary amplifier with the same nonlinearityas the one of the LNA and then scales the response down by120574minus3 As a result after the final addition IM3 products from
both paths are ideally cancelled out [8 9] In practice due toprocess variations IM3 cancellation is limited requires twicethe power (due to an auxiliary amplifier) and increases noiseTheFFmethod relies heavily on constant andprecise value for120574which is hard to obtain in practice and input matching maybe problematic especially in wideband applications [7]
One of the modifications of FF approach known asderivative superposition (DS) uses nonlinearity 120572 with 3rdorder polynomial of the opposite sign to the one of the LNAthat is 119892
3120572= minus119892
3LNA [10 11] The main advantage of thismethod is that IM3 products are automatically out of phasewithout necessity of using 120574 scaling factor as in the standardFF approach In addition an auxiliary amplifier operates inweak inversion withminimal impact on the power consump-tion [10 11] The disadvantage is a limited range of relativelylow input amplitudes 120572 block can operate with [7]
33 Postdistortion Last method presented in Figure 5 isknown as postdistortion (PD) and involves the auxiliarynonlinearity 120575 supplied after the LNA [12] This block is
characterised by the same nonlinearity as LNA however withopposite sign effectively grounding IM products but passinglinear response to the output The most important advantageis that input matching of LNA is not affected as in the case ofFFmethodsmentioned previouslyThedrawback is increasedpower consumption as 120575 is usually biased in saturation forrobust distortion cancellation
The three fundamental linearization techniques refer-enced in this work show that in some cases nonlinearbehaviour of the amplifier can be improved without powerincrease (FB) whereas a further suppression of IM productsrequires more energy As a result in practice the predictionof power consumption required for certain linearity is a morecomplex process We will focus on this issue towards the endof this paper
4 LTE Linearity Requirements
41 3GPP LTE Specification and System Parameters Thelinearity requirements for LTE are not reported specificallyby 3GPP however after some elaboration they can be derivedfrom the intermodulation specifications 36101 and 36104[1] for both user equipment (UE) and base station (BS)receivers respectively In this paper we use the most recentversion of aforementioned LTE specification Revision 11March 2013 and we limit our calculations to UE as BS hasmore scenarios differing in performance (namelyWideAreaMedium Range Local Area and Home) However the pre-sented formulation can be successfully applied to any type ofBS if necessary In order to represent performance variationsin different propagation scenarios 3GPP considers referencecarriers with QPSK 16QAM and 64QAM modulations andfollowing bandwidths 14 3 5 10 15 and 20MHz In thiswork we present calculations for QPSK case for all band-widths and for a single LTE Band 2 (uplink UL centred 1960at MHz downlink DL at 1880MHz 60MHz bandwidth80MHz separation) [2] Finally as mentioned previously wewill focus only on IIP3 as assuming that the second order dis-tortion in LNA is not usually a limiting factor for the linearityof complete receiver
All system parameters necessary to calculate IIP3 arepresented in Table 1
(i) 119875REFSENS is a minimum average power applied toUE antenna ports (LTE assumes 2 Rx antennae fordiversity scheme) to achieve at least 95 ofmaximumthroughput
(ii) Thermal noise floor for given bandwidth at tempera-ture of 290K
(iii) 119877119909 Margin is a required increase inminimumaveragereceived signal power in the presence of blockers andinterferers over nominal 119875REFSENS value
(iv) 3GPP derives intermodulation requirements for twointerfering signals one is a continuous wave (CW)the other one is a modulated carrier with bandwidthranging in between 14 and 5MHz
42 In-Band IIP3 Specification In-band linearity require-ment defines receiver robustness against cross modulationproducts of other channels of the same band or any CWinterferer present within the band of interest According to36101 rev11 specification the receiver has to be able to detecta wanted signal in presence of two interferers with averagepower of minus46 dBm each CW interferer is placed at minusBW2 minus75MHz (low side) or BW2 + 75MHz (high side) from thecarrier frequency of the band of interest whereas the mod-ulated interferer is located at twice the frequency of the CWsignal For example considering high side interferers and BWof a wanted signal of 10MHz the CW interferer is located at125MHz from the carrier whereas 5MHz modulated inter-ferer is 25MHz above the carrier It is easy to show that oneof their IM3 products at 2119891CW-119891IM is centred around thecarrier as well
119891IM3 = 2 (119891119888+ 125MHz) minus (119891
119888+ 25MHz) = 119891
119888 (10)
Assuming that the intermodulation products are allowedto increase noise floor from Table 1 by Rx Margin of 6 dB(assuming channel bandwidth of 10MHz) resulting in max-imum noise floor of minus98 dBm Since thermal noise and IM3products are not correlated we can calculate the maximumpower of intermodulation components
119875IM3 = 10log10(10minus9810
minus 10minus10410
) = minus9926 dBm (11)
As the interferer bandwidth is 5MHz for the considered caseIM3 product occupies exactly half of the signal BWThus (11)has to be corrected by the ratio of two quantities which nowrepresents an equivalent average IM level for 10MHz wantedsignal [13]
119875IM3 = minus9926 minus 10log10(10MHz5MHz
) = minus10224 dBm (12)
Finally IIP3 can be estimated taking power of interferers andcalculated power of the third order intermodulation product[13]
IIP3 = 05 (3119875INT minus 119875IM3) = +1788 dBm (13)
Table 2 presents the results of in-band IIP3 calculations forall the possible BW values Note that our calculations are 3-4 dB more stringent to the results of Sesia et al [13] wherethe authors used an average implementationmargin of 25 dBin their calculation but did not provide any explanationbehind this choice Thus we assumed that in practice moreimplementation margin may be necessary for example dueto process variations
6 ISRN Electronics
Table 2 Calculated IIP3 for LTE assuming two minus46 dBm interferers(in-band) and minus31 dBm interference (out-of-band)
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
is at its maximum 26 times larger than in theprevious case improving both gain and 119891
119905 The cost
however is 21 times more power dissipated by thetransistor than before
(iii) 119881119866
asymp 700mV ID = 071mA 119892119898 = 286mAVPDC = 085mW IIP2 asymp 13 dBm and IIP3 asymp 13 dBmDepending on the system requirements (discussed indetail later in this paper) this point may representa design trade-off between power consumption andlinearity delivering 90 of maximum gain with morethan a 60 of power reduction in comparison to theprevious case
As mentioned before in practice the design of LNA hasto involve a simultaneous optimisation of noise impedancematching gain stability and linearity (as all of these cannotbe maximised at the same time) however the presentedmethodology can be used as a starting point for a linear LNAdesign with a limited power budget
3 Linearization Techniques
It is natural to expect that the relationship between powerconsumption and linearity of an LNA is much more complexthan highlighted in the previous section (in other words it isnot only the function of transistor bias point) In the contextof this work it is important to shedmore light on how linearityof an amplifier can be improved by various circuit techniquesthat among other design constraints significantly affect thepower consumption as well
31 Negative Feedback Figure 3 depicts well known negativefeedback (FB) circuit configuration FB samples a fraction ofthe output signal and transmits it back to the amplifier inputout of phase Gray et al [6] show that effects of soft nonlin-earity can be improved because both gain and its sensitivityon input signal are chiefly controlled by a transfer function offeedback loop block 120573 If 120573 can be made linear this translatesdirectly to improved linearity of the whole closed loopsystem
Zhang and Sanchez-Sinencio [7] show that if amplifiergain is equal to 119866 IIP2 is improved by as much as 1 +
119866120573 whereas increase in IIP3 is proportional to (1 + 119866120573)32
but only for 1198922
asymp 0 When the second order polynomialcoefficient is finite resulting IM2 products are fed back to anamplifier and intermodulate into IM3 quickly deterioratingtheoretical improvements in IIP3 The main advantage of FB
In Out
120572
+
Figure 4 Feed-forward loop linearization concept
In Out120575
iL
iL + iNL
iNL
Figure 5 Postdistortion linearization concept
method is the use of passive components that do not consumepower (majority of typical designs employs highly linear RLCcomponents as 120573) The main drawback is strong dependenceof circuit linearity on 119866120573 product that is generally known tovary significantly at RF frequencies especially in widebandapplications
32 Feed-Forward and Derivative Superposition Anotherapproach to improve LNA linearity is a feed-forward (FF)technique depicted in Figure 4 In this method input signalis connected to the inputs of nonlinear amplifier and aparallel block 120572 whereas the output signal is a difference ofcorresponding output signals from each of the blocks Theblock 120572 scales input signal by the factor of 120574 gt 1 passes thissignal through auxiliary amplifier with the same nonlinearityas the one of the LNA and then scales the response down by120574minus3 As a result after the final addition IM3 products from
both paths are ideally cancelled out [8 9] In practice due toprocess variations IM3 cancellation is limited requires twicethe power (due to an auxiliary amplifier) and increases noiseTheFFmethod relies heavily on constant andprecise value for120574which is hard to obtain in practice and input matching maybe problematic especially in wideband applications [7]
One of the modifications of FF approach known asderivative superposition (DS) uses nonlinearity 120572 with 3rdorder polynomial of the opposite sign to the one of the LNAthat is 119892
3120572= minus119892
3LNA [10 11] The main advantage of thismethod is that IM3 products are automatically out of phasewithout necessity of using 120574 scaling factor as in the standardFF approach In addition an auxiliary amplifier operates inweak inversion withminimal impact on the power consump-tion [10 11] The disadvantage is a limited range of relativelylow input amplitudes 120572 block can operate with [7]
33 Postdistortion Last method presented in Figure 5 isknown as postdistortion (PD) and involves the auxiliarynonlinearity 120575 supplied after the LNA [12] This block is
characterised by the same nonlinearity as LNA however withopposite sign effectively grounding IM products but passinglinear response to the output The most important advantageis that input matching of LNA is not affected as in the case ofFFmethodsmentioned previouslyThedrawback is increasedpower consumption as 120575 is usually biased in saturation forrobust distortion cancellation
The three fundamental linearization techniques refer-enced in this work show that in some cases nonlinearbehaviour of the amplifier can be improved without powerincrease (FB) whereas a further suppression of IM productsrequires more energy As a result in practice the predictionof power consumption required for certain linearity is a morecomplex process We will focus on this issue towards the endof this paper
4 LTE Linearity Requirements
41 3GPP LTE Specification and System Parameters Thelinearity requirements for LTE are not reported specificallyby 3GPP however after some elaboration they can be derivedfrom the intermodulation specifications 36101 and 36104[1] for both user equipment (UE) and base station (BS)receivers respectively In this paper we use the most recentversion of aforementioned LTE specification Revision 11March 2013 and we limit our calculations to UE as BS hasmore scenarios differing in performance (namelyWideAreaMedium Range Local Area and Home) However the pre-sented formulation can be successfully applied to any type ofBS if necessary In order to represent performance variationsin different propagation scenarios 3GPP considers referencecarriers with QPSK 16QAM and 64QAM modulations andfollowing bandwidths 14 3 5 10 15 and 20MHz In thiswork we present calculations for QPSK case for all band-widths and for a single LTE Band 2 (uplink UL centred 1960at MHz downlink DL at 1880MHz 60MHz bandwidth80MHz separation) [2] Finally as mentioned previously wewill focus only on IIP3 as assuming that the second order dis-tortion in LNA is not usually a limiting factor for the linearityof complete receiver
All system parameters necessary to calculate IIP3 arepresented in Table 1
(i) 119875REFSENS is a minimum average power applied toUE antenna ports (LTE assumes 2 Rx antennae fordiversity scheme) to achieve at least 95 ofmaximumthroughput
(ii) Thermal noise floor for given bandwidth at tempera-ture of 290K
(iii) 119877119909 Margin is a required increase inminimumaveragereceived signal power in the presence of blockers andinterferers over nominal 119875REFSENS value
(iv) 3GPP derives intermodulation requirements for twointerfering signals one is a continuous wave (CW)the other one is a modulated carrier with bandwidthranging in between 14 and 5MHz
42 In-Band IIP3 Specification In-band linearity require-ment defines receiver robustness against cross modulationproducts of other channels of the same band or any CWinterferer present within the band of interest According to36101 rev11 specification the receiver has to be able to detecta wanted signal in presence of two interferers with averagepower of minus46 dBm each CW interferer is placed at minusBW2 minus75MHz (low side) or BW2 + 75MHz (high side) from thecarrier frequency of the band of interest whereas the mod-ulated interferer is located at twice the frequency of the CWsignal For example considering high side interferers and BWof a wanted signal of 10MHz the CW interferer is located at125MHz from the carrier whereas 5MHz modulated inter-ferer is 25MHz above the carrier It is easy to show that oneof their IM3 products at 2119891CW-119891IM is centred around thecarrier as well
119891IM3 = 2 (119891119888+ 125MHz) minus (119891
119888+ 25MHz) = 119891
119888 (10)
Assuming that the intermodulation products are allowedto increase noise floor from Table 1 by Rx Margin of 6 dB(assuming channel bandwidth of 10MHz) resulting in max-imum noise floor of minus98 dBm Since thermal noise and IM3products are not correlated we can calculate the maximumpower of intermodulation components
119875IM3 = 10log10(10minus9810
minus 10minus10410
) = minus9926 dBm (11)
As the interferer bandwidth is 5MHz for the considered caseIM3 product occupies exactly half of the signal BWThus (11)has to be corrected by the ratio of two quantities which nowrepresents an equivalent average IM level for 10MHz wantedsignal [13]
119875IM3 = minus9926 minus 10log10(10MHz5MHz
) = minus10224 dBm (12)
Finally IIP3 can be estimated taking power of interferers andcalculated power of the third order intermodulation product[13]
IIP3 = 05 (3119875INT minus 119875IM3) = +1788 dBm (13)
Table 2 presents the results of in-band IIP3 calculations forall the possible BW values Note that our calculations are 3-4 dB more stringent to the results of Sesia et al [13] wherethe authors used an average implementationmargin of 25 dBin their calculation but did not provide any explanationbehind this choice Thus we assumed that in practice moreimplementation margin may be necessary for example dueto process variations
6 ISRN Electronics
Table 2 Calculated IIP3 for LTE assuming two minus46 dBm interferers(in-band) and minus31 dBm interference (out-of-band)
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
characterised by the same nonlinearity as LNA however withopposite sign effectively grounding IM products but passinglinear response to the output The most important advantageis that input matching of LNA is not affected as in the case ofFFmethodsmentioned previouslyThedrawback is increasedpower consumption as 120575 is usually biased in saturation forrobust distortion cancellation
The three fundamental linearization techniques refer-enced in this work show that in some cases nonlinearbehaviour of the amplifier can be improved without powerincrease (FB) whereas a further suppression of IM productsrequires more energy As a result in practice the predictionof power consumption required for certain linearity is a morecomplex process We will focus on this issue towards the endof this paper
4 LTE Linearity Requirements
41 3GPP LTE Specification and System Parameters Thelinearity requirements for LTE are not reported specificallyby 3GPP however after some elaboration they can be derivedfrom the intermodulation specifications 36101 and 36104[1] for both user equipment (UE) and base station (BS)receivers respectively In this paper we use the most recentversion of aforementioned LTE specification Revision 11March 2013 and we limit our calculations to UE as BS hasmore scenarios differing in performance (namelyWideAreaMedium Range Local Area and Home) However the pre-sented formulation can be successfully applied to any type ofBS if necessary In order to represent performance variationsin different propagation scenarios 3GPP considers referencecarriers with QPSK 16QAM and 64QAM modulations andfollowing bandwidths 14 3 5 10 15 and 20MHz In thiswork we present calculations for QPSK case for all band-widths and for a single LTE Band 2 (uplink UL centred 1960at MHz downlink DL at 1880MHz 60MHz bandwidth80MHz separation) [2] Finally as mentioned previously wewill focus only on IIP3 as assuming that the second order dis-tortion in LNA is not usually a limiting factor for the linearityof complete receiver
All system parameters necessary to calculate IIP3 arepresented in Table 1
(i) 119875REFSENS is a minimum average power applied toUE antenna ports (LTE assumes 2 Rx antennae fordiversity scheme) to achieve at least 95 ofmaximumthroughput
(ii) Thermal noise floor for given bandwidth at tempera-ture of 290K
(iii) 119877119909 Margin is a required increase inminimumaveragereceived signal power in the presence of blockers andinterferers over nominal 119875REFSENS value
(iv) 3GPP derives intermodulation requirements for twointerfering signals one is a continuous wave (CW)the other one is a modulated carrier with bandwidthranging in between 14 and 5MHz
42 In-Band IIP3 Specification In-band linearity require-ment defines receiver robustness against cross modulationproducts of other channels of the same band or any CWinterferer present within the band of interest According to36101 rev11 specification the receiver has to be able to detecta wanted signal in presence of two interferers with averagepower of minus46 dBm each CW interferer is placed at minusBW2 minus75MHz (low side) or BW2 + 75MHz (high side) from thecarrier frequency of the band of interest whereas the mod-ulated interferer is located at twice the frequency of the CWsignal For example considering high side interferers and BWof a wanted signal of 10MHz the CW interferer is located at125MHz from the carrier whereas 5MHz modulated inter-ferer is 25MHz above the carrier It is easy to show that oneof their IM3 products at 2119891CW-119891IM is centred around thecarrier as well
119891IM3 = 2 (119891119888+ 125MHz) minus (119891
119888+ 25MHz) = 119891
119888 (10)
Assuming that the intermodulation products are allowedto increase noise floor from Table 1 by Rx Margin of 6 dB(assuming channel bandwidth of 10MHz) resulting in max-imum noise floor of minus98 dBm Since thermal noise and IM3products are not correlated we can calculate the maximumpower of intermodulation components
119875IM3 = 10log10(10minus9810
minus 10minus10410
) = minus9926 dBm (11)
As the interferer bandwidth is 5MHz for the considered caseIM3 product occupies exactly half of the signal BWThus (11)has to be corrected by the ratio of two quantities which nowrepresents an equivalent average IM level for 10MHz wantedsignal [13]
119875IM3 = minus9926 minus 10log10(10MHz5MHz
) = minus10224 dBm (12)
Finally IIP3 can be estimated taking power of interferers andcalculated power of the third order intermodulation product[13]
IIP3 = 05 (3119875INT minus 119875IM3) = +1788 dBm (13)
Table 2 presents the results of in-band IIP3 calculations forall the possible BW values Note that our calculations are 3-4 dB more stringent to the results of Sesia et al [13] wherethe authors used an average implementationmargin of 25 dBin their calculation but did not provide any explanationbehind this choice Thus we assumed that in practice moreimplementation margin may be necessary for example dueto process variations
6 ISRN Electronics
Table 2 Calculated IIP3 for LTE assuming two minus46 dBm interferers(in-band) and minus31 dBm interference (out-of-band)
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
43 Out-of-Band IIP3 Specification Due to a limited per-formance of receiver preselection filters and finite isolationof duplexer in radio transceiver strong signals from thetransmitter side are injected into the receiver and are mixedtogether with interferers into IM3 products as presented inFigure 6This is chiefly a problem for FDD system where thetransmitter and receiver are operating simultaneously Takingamaximumaverage power of LTE signal from the transmitteroutput of +24 dBm a typical duplexer isolation of 50 dBand 2 dB losses in the receive path [13] interferer as strongas minus28 dBm can reach the receiver If a strong CW signalfalls between Rx and Tx bands (namely at half the duplexdistance) IM3 products will fall into the band of interest Aspreviously IIP3 specification is reported directly by 3GPPhowever it can be derived fromout-of-band blocking require-ments [13 14] The maximum power of CW interfererdepends on its distance from the edge of a wanted band andis respectively (in reference to the upper limit) minus4 dBm from15MHz to 60MHz minus30 dBm from 60MHz to 85MHz andminus15 dBm above 85MHz offset [1] For Band 2 consideredin this paper the duplex separation is equal to 80MHzthus a minus44 dBm CW interferer at 40MHz offset from thereceived band cross-modulates with the transmitter leakageAs Band 2 has a relatively wide UL and DL bandwidths inrelation to the duplex distance (60MHz versus 80MHz) theresulting filtering of CWbetween bands will be limited As anexample consider a commercially available Band 2 duplexerfrom Avago Tech ACMD-7410 that provides approximately4 dB attenuation at CW frequency [15] Thus interfererof minus48 dBm has to be considered As both CW and theleakage signal power in relation to the receive band arestrong functions of duplexer transfer function Sesia et al[13] suggests using an average interference power to calculateIIP3 In the presented example the average power of the inter-ference from minus28 dBm leakage and minus48 dBm CW is equalto minus31 dBm Using (13) and assuming allowed power of IM3products from (11) and (12) the resulting out-of-band IIP3values are presented in Table 2
It can be seen that the out-of-band requirement is muchmore stringent than in the case of in-band calculation(minus17 dBm against +5 dBm) In the case of the former aduplexer specification determines the linear performance ofthe receiver (this is most likely why 3GPP does not defineIIP3) In the case of stronger interferers and limited filtering
IM3Rx
CW
Tx
120596Rx 120596CW 120596Tx
Figure 6 Out-of-band IM3 due to a finite Rx filter roll-off
In OutLNA
GLNA GMix GIF
IIP3LNA IIP3Mix IIP3IF
IF
Figure 7 LNA mixer and IF amplifier cascade
inwideband applications this leads to further increase in out-of-band IIP3 levels
5 Linearity Amplifier versus LTE Front-End
In order to show how system level linearity translates to IIPrequirements of LNA let us consider a simplified model ofcascaded RF heterodyne front-end depicted in Figure 7 Thesystem consists of an LNA followed by a mixer and inter-mediate frequency (IF) amplifier Each block is described bythe power gain as well as IIP3 We assume that all blocksare impedance matched which in practice is valid only for alimited range of frequencies For clarity any interstage filterswere omitted assuming that at frequency of interest theyintroduce negligible insertion loss and their respective IIP3levels are relatively high
Well known approximation of 3 stage cascade fromFigure 7 is given by [4 5]
1
IIP3totasymp
1
IIP3LNA+
119866LNAIIP3MIX
+119866LNA119866MIXIIP3IFA
(14)
where 119866 represents power gain and IIP3 is power referredto a characteristic impedance common for all the blocksAlthough simple (14) allows us to analyse how LNA affectsthe performance of the cascade The rule of thumb is thatthe linearity of the cascade is defined by the last stage (IFamplifier in Figure 3) as its IIP3 is scaled down by the totalgain of previous stages This is generally true assuming thatlinearity of LNA and mixer are not limiting factors In prac-tice however in order to provide wide bandwidth constantgain and low noise figure linearity of the LNA cannot bedesigned arbitrarily high In addition in order to reducefront-end power consumption and improve noise figure andlinearity a passivemixer with negative conversion gain can beused Thus the more detailed analysis is necessary As anexample consider a typical IF amplifier with power gain of
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
20 dB and IIP3 in the range of 25 to 30 dBm [16] Assuming aconstant gain of the LNA and passive mixer equal to 15 dBand minus6 dB respectively we can show that the total IIP3 ofthe cascade from (14) is strongly dependent on both interceptpoint levels of LNA and mixer
Figure 8 depicts the results of total IIP3 calculation as afunction of LNA linearity for the parametric sweep of mixerthird order intercept point Dashed line represents a +5 dBmIIP3 target corresponding to LTE out-of-band specificationcalculated in Section 4
It can be seen that for low values of LNA IIP3 ≪ 0 dBmthe amplifier limits the linearity of the cascade The curvesstart to diverge strongly where LNA IIP3 reaches 0 dBmAt this point the mixer intercept point is reduced by theLNA gain and becomes the dominant factor Finally a highlylinear LNA has no effect on the total IIP3 of the cascadenow controlled fully by the intermodulation performanceof the mixer Thus in order to achieve out-of-band IIP3performance of the LTE system it is critical to use both highlylinear mixer and LNA combinations Providing that typicalRF passive mixers in discrete implementations achieve IIP3in the range of 25 to 35 dBm [16] a rough estimation ofintercept point for LNA operating in LTE receiver yields+5 dBm In practice we should expect limited performancedue to impedance mismatches nonuniform gain changingwith frequency and nonideal duplexer transfer function It istherefore safe to assume that IIP3 of +10 dBm ismore realistictarget for LTE wideband low noise amplifier
6 LNA Power Consumption in Context of LTE
This section presents the results of performance comparisonof 35 different CMOS wideband LNA circuits published inrecent years (Table 3 on a following page) [17ndash49] To allowfair comparison every circuit is characterised by power gain
0 10 20 30 40 50
0
5
10
15
20
IIP3
(dBm
)
Power consumption (mW)
IIP3Trend
minus20
minus15
minus10
minus5
Figure 9 Comparison of LNAs IIP3 versus power
(119866 dB) noise figure (NF dB) minimum and maximumfrequency of operation (119891min and119891max resp MHz) fractionalbandwidth (FBW) IIP3 (dBm) and DC power (119875DC mW)Note that some of the published circuits use a voltage gainin place of power gain In order to follow system level designstandards we translated gain of all LNAs into power domainIt is assumed that the DC power consumption is referred toLNA core as many of the authors do not report it explicitlyFractional bandwidth follows a standard RF definition ofa ratio of difference between 119891max and 119891min to the centrefrequency between the two In cases where 119866 and NF werevarying over the band of interest the best of the reportedvalues was chosen
In order to show that the relationship between linearityof RF LNA and DC power is not straightforward considerthe results of IIP3 comparison depicted in Figure 9 Dotscorrespond to the third order intercept points from Table 3whereas the solid line represents a linear trend calculatedon the dataset It can be seen that IIP3 is weakly dependenton power consumption (+006 dBmW) Counterintuitive atfirst this behaviour is expected As indicated previously inSection 2 power increase can help to reduce intermodulationeffects in simple LNAs however it may not necessarily yieldthe best noise impedance matching and stability perfor-mance For example in comparison with other circuits twoLNAs with the highest linearity have either relatively lowfractional bandwidth [27] or high noise figure [38] Notethat among the reported state-of-the-art CMOS LNAs onlythe two described topologies meet IIP3 requirement fromSection 3
In order to include effects of gain noise and linearityfigure of merit (FoM) function has to be used Usually theDC power consumption contributes to total FoM however
8 ISRN Electronics
Table 3 Performance comparison of wideband CMOS LNA circuits
Reference Year Linear method CMOS Gain NF 119891min 119891max FBW IIP3 119875DC FoM(nm) (dB) (dB) (MHz) (MHz) () (dBm) (mW) (dBm)
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
in order to analyse the performance of LNA as a function ofthe power we calculate FoM (without power) in dBm
FoM = 119866 + IIP3 + 10log10(FBW) minusNF (15)
Note that all of the elements in (15) contribute equally tothe total FoM thus a high performance LNA is characterisedby minimum noise wide tuning range high gain and IIP3resulting in proportionally high FoM values
Figure 10 depicts the results of FoM calculation Asbefore dots represent the data points from Table 3 whereassolid line is a linear trend The average FoM is equal to268 dBm with average power consumption of 183mW Itcan be seen that higher FoM requires more DC powerwhich confirms our assumption that optimised wideband
LNA consumes more energy Note that this relationship isnot strong as the slope of a trend line is approximately+019 dBmW In order to increase FoM of CMOS LNAby 3 dB a corresponding increase in power of 16mW isnecessary Assuming IIP3 of +10 dBm as a target for LTE LNA(derived in Section 4) together with an average power gain of15 dB for RF LNA [16] a fractional tuning range of 120 (07ndash27GHz LTE band) and NF of 5 dB (a fair assumption fortotal NF of 9 dB for the wideband UE LTE receiver) a targetFoM of 41 dBm is obtained
Therefore the corresponding FoM increase of +142 dBover the average results in a proportional change in DCpower by +75mW the expected increase in FoM is equalto +142 dB which corresponds to the required increase in
ISRN Electronics 9
0 10 20 30 40 500
10
20
30
40
50
FoM
with
out p
ower
(dBm
)
Power consumption (mW)
FoM wo powerTrend
Figure 10 Comparison of LNAs FoM versus power
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
power of +75mW Note that four of the reported LNAs[23 27 32 38] meet the FoM requirement however either abandwidth is smaller IIP3 is inadequate or noise is too highfor an LTE system (note that the authors usually present thebest performance rather than the average over bandwidth)A validity of the presented discussion can be confirmed bya comparison to the state-of-the-art commercial LNA chipADL5521 from Analog Devices [16] Although realised inGaAn pHemt technology (higher 119891
119905and lower noise than
CMOS) its performance follows the trend of FoM presentedin this paper The reported parameters are (averaged) NF =
1 dB 119866 = 15 dB IIP3 = 21 dBm and FBW = 1636 andcalculated FoM is equal to 57 dBm that is +302 dB abovethe CMOS average presented in this paper According to ourprediction the LNA core should consume +159mW morethan the CMOS average resulting in a total of 177mW Thereported value for ADL5521 is 300mW from 5V supplyhowever the core power consumption is not disclosed (someof the reported power is used by active replica bias) Thus itcan be seen that in practice high performance LTE LNAs arepower hungry circuits as shown in this paper
7 Conclusion
The presented results show that in general LNA linearityas a standalone parameter is indirectly dependent on powerIn theory for a certain IIP3 performance LNA circuit canbe designed without the penalty of increase in power asindicated by Figure 8 However taking into account the restof design constraints as noise figure gain and bandwidthmore power has to be delivered to the amplifier and henceincreasing LNA linearity levels will inevitably translate intohigher power consumption This is especially crucial forthe wideband systems (LTE and beyond) where inadequate
filtering leads to more stringent intermodulation specifica-tions that in turn present a significant impact on the powerconsumption of the whole receiver
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
Acknowledgment
This material is based upon works supported by the ScienceFoundation Ireland underGrant no 10CEI1853The authorsgratefully acknowledge this support
References
[1] ldquo3GPP Specificationsrdquo 2013 httpwww3gpporg[2] H Holma and A Toskala LTE for UMTS OFDMA and SC-
FDMA Based Radio Access Wiley Chichester UK 2009[3] P Wambacq and W Sansen Distortion Analysis of Analog
Integrated Circuits Kluwer Academic Publisher Boston MassUSA 1998
[4] B Razavi RF Microelectronics Prentice Hall Englewood CliffsNJ USA 1998
[5] T LeeTheDesign of CMOSRadio-Frequency Integrated CircuitsCambridge University Press Cambridge UK 2004
[6] P R Gray P Hurst S Lewis and R G Meyer Analysis andDesign of Analog Integrated CircuitsWiley NewYork NY USA4th edition 2001
[7] H Zhang and E Sanchez-Sinencio ldquoLinearization techniquesfor CMOS low noise amplifiers a tutorialrdquo IEEE Transactionson Circuits and Systems I vol 58 no 1 pp 22ndash36 2011
[8] Y Ding and R Harjani ldquoA +18 dBm IIP3 LNA in 035 120583mCMOSrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference pp 162ndash443 February 2001
[9] E Keehr and A Hajimiri ldquoEqualization of IM3 products inwideband direct-conversion receiversrdquo in Proceedings of theIEEE International Solid State Circuits Conference (ISSCCrsquo08)pp 199ndash607 February 2008
[10] Y-S Youn J-H Chang K-J Koh Y-J Lee and H-K YuldquoA 2GHz 16 dBm IIP3 low noise amplifier in 025 120583m CMOStechnologyrdquo in Proceedings of the IEEE International Solid StateCircuits Conference (ISSCCrsquo03) pp 439ndash507 February 2003
[11] H M Geddada J W Park and J Silva-Martinez ldquoRobustderivative superposition method for linearising broadbandLNAsrdquo Electronics Letters vol 45 no 9 pp 435ndash436 2009
[12] T-S Kim and B-S Kim ldquoPost-linearization of cascode CMOSlow noise amplifier using folded PMOS IMD sinkerrdquo IEEEMicrowave and Wireless Components Letters vol 16 no 4 pp182ndash184 2006
[13] S Sesia M Baker and I Toufik LTE The UMTS Long TermEvolution FromTheory to PracticeWiley Chichester UK 2009
[14] C W Liu and M Damgaard ldquoIP2 and IP3 nonlinearity specifi-cations for 3GWCDMA receiversrdquoHigh Frequency Electronicspp 16ndash29 June 2009
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
[17] F Bruccoleri E A M Klumperink and B Nauta ldquoWide-bandCMOS low-noise amplifier exploiting thermal noise cancelingrdquoIEEE Journal of Solid-State Circuits vol 39 no 2 pp 275ndash2822004
[18] C-F Liao and S-I Liu ldquoA broadband noise-canceling CMOSLNA for 31-106GHz UWB receiverrdquo in Proceedings of theIEEE Conference on Custom Integrated Circuits pp 160ndash163September 2005
[19] S Chehrazi A Mirzaei R Bagheri and A A Abidi ldquoA 65GHzwideband CMOS low noise amplifier for multi-band userdquoin Proceedings of the IEEE Conference on Custom IntegratedCircuits pp 796ndash799 September 2005
[20] R Gharpurey ldquoA broadband low-noise front-end amplifier forUltraWideband in 013-120583mCMOSrdquo IEEE Journal of Solid-StateCircuits vol 40 no 9 pp 1983ndash1986 2005
[21] S B TWang AMNiknejad and RW Brodersen ldquoA sub-mW960-MHz ultra-wideband CMOS LNArdquo in Proceedings of theIEEE Radio Frequency Integrated Circuits Symposium (RFICrsquo05)pp 35ndash38 June 2005
[22] T W Kim and B Kim ldquoA 13-dB IIP3 improved low-powerCMOS RF programmable gain amplifier using differentialcircuit transconductance linearization for various terrestrialmobile D-TV applicationsrdquo IEEE Journal of Solid-State Circuitsvol 41 no 4 pp 945ndash953 2006
[23] J-H C Zhan and S S Taylor ldquoA 5GHz resistive-feedbackCMOS LNA for low-cost multi-standard applicationsrdquo in Pro-ceedings of the IEEE International Solid-State Circuits Conference(ISSCCrsquo06) pp 191ndash200 February 2006
[24] B G Perumana J-H C Zhan S S Taylor and J Laskar ldquoA05-6GHz improved linearity resistive feedback 90-nm CMOSLNArdquo in Proceedings of the IEEE Asian Solid-State CircuitsConference (ASSCCrsquo06) pp 263ndash266 November 2006
[25] R Bagheri A Mirzaei S Chehrazi et al ldquoAn 800-MHz-6-GHzsoftware-defined wireless receiver in 90-nm CMOSrdquo IEEEJournal of Solid-State Circuits vol 41 no 12 pp 2860ndash28752006
[26] M Vidojkovic M Sanduleanu J Van Der Tang P Baltus andA Van Roermund ldquoA 12 V inductorless broadband LNA in90 nm CMOS LPrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 53ndash56 June 2007
[27] W-H Chen G Liu B Zdravko and A M Niknejad ldquoA highlylinear broadband CMOS LNA employing noise and distortioncancellationrdquo in Proceedings of the IEEE Radio FrequencyIntegrated Circuits Symposium (RFICrsquo07) pp 61ndash64 June 2007
[28] M T Reiha and J R Long ldquoA 12 v reactive-feedback 31-106GHz low-noise amplifier in 013120583m CMOSrdquo IEEE Journalof Solid-State Circuits vol 42 no 5 pp 1023ndash1032 2007
[29] R Ramzan S Andersson J Dabrowski and C Svensson ldquoA14V 25mW inductorless wideband LNA in 013 120583mCMOSrdquo inProceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[30] J Borremans P Wambacq and D Linten ldquoAn ESD-protectedDC-to-6GHz 97mW LNA in 90nm digital CMOSrdquo in Pro-ceedings of the 54th IEEE International Solid-State CircuitsConference (ISSCCrsquo07) pp 417ndash613 February 2007
[31] S C Blaakmeer E A M Klumperink B Nauta and D M WLeenaerts ldquoAn inductorless wideband balun-LNA in 65 nmCMOS with balanced outputrdquo in Proceedings of the 33rd Euro-pean Solid-State Circuits Conference (ESSCIRCrsquo07) pp 364ndash367September 2007
[32] S-S Song D-G Im H-T Kim and K Lee ldquoA highly linearwideband CMOS low-noise amplifier based on current ampli-fication for digital TV tuner applicationsrdquo IEEE Microwave andWireless Components Letters vol 18 no 2 pp 118ndash120 2008
[33] J Borremans P Wambacq C Soens Y Rolain and M KuijkldquoLow-area active-feedback low-noise amplifier design in scaleddigital CMOSrdquo IEEE Journal of Solid-State Circuits vol 43 no11 pp 2422ndash2433 2008
[34] T Chang J Chen L Rigge and J Lin ldquoA packaged and ESD-protected inductorless 01-8GHz wideband CMOS LNArdquo IEEEMicrowave and Wireless Components Letters vol 18 no 6 pp416ndash418 2008
[35] S Woo W Kim C-H Lee K Lim and J Laskar ldquoA 36mWdifferential common-gate CMOS LNA with positive-negativefeedbackrdquo in Proceedings of the IEEE International Solid-StateCircuits Conference (ISSCCrsquo09) pp 218ndash219 February 2009
[36] M El-Nozahi E Sanchez-Sinencio and K Entesari ldquoA CMOSlow-noise amplifier with reconfigurable input matching net-workrdquo IEEE Transactions on MicrowaveTheory and Techniquesvol 57 no 5 pp 1054ndash1062 2009
[37] D Im I Nam H-T Kim and K Lee ldquoA wideband CMOS Lownoise amplifier employing noise and IM2 distortion cancella-tion for a digital TV tunerrdquo IEEE Journal of Solid-State Circuitsvol 44 no 3 pp 686ndash698 2009
[38] W-H ChenDesigns of broadband highly linear CMOS LNAs formultiradio multimode applications [PhD thesis] University ofCalifornia Berkley Calif USA 2010
[39] S K Hampel O Schmitz M Tiebout and I Rolfes ldquoInductor-less 1-105 GHz wideband LNA for multistandard applicationsrdquoin Proceedings of the IEEE Asian Solid-State Circuits Conference(A-SSCCrsquo09) pp 269ndash272 November 2009
[40] J Kim S Hoyos and J Silva-Martinez ldquoWideband common-gate CMOS LNA employing dual negative feedback withsimultaneous noise gain and bandwidth optimizationrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no9 pp 2340ndash2351 2010
[41] D Im I Nam J-Y Choi B-K Kim andK Lee ldquoACMOS activefeedback wideband single-to-differential LNA using inductiveshunt-peaking for saw-less SDR receiversrdquo in Proceedings of the6th IEEE Asian Solid-State Circuits Conference (A-SSCCrsquo10) pp153ndash156 November 2010
[42] H Wang L Zhang and Z Yu ldquoA wideband inductorless LNAwith local feedback and noise cancelling for low-power low-voltage applicationsrdquo IEEE Transactions on Circuits and SystemsI vol 57 no 8 pp 1993ndash2005 2010
[43] D Im I Nam and K Lee ldquoA CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receiversrdquo IEEETransactions on Microwave Theory and Techniques vol 58 no12 pp 3566ndash3579 2010
[44] P-I Mak and R PMartins ldquoA 2 timesVDD-enabledmobile-TVRFfront-end with TV-GSM interoperability in 1-V 90-nm CMOSrdquoIEEE Transactions onMicrowaveTheory and Techniques vol 58no 7 pp 1664ndash1676 2010
[45] Y-H Yu Y-S Yang and Y-J E Chen ldquoA compact widebandCMOS low noise amplifier with gain flatness enhancementrdquoIEEE Journal of Solid-State Circuits vol 45 no 3 pp 502ndash5092010
[46] M El-Nozahi A A Helmy E Sanchez-Sinencio and KEntesari ldquoAn inductor-less noise-cancelling broadband lownoise amplifier with composite transistor pair in 90 nm CMOStechnologyrdquo IEEE Journal of Solid-State Circuits vol 46 no 5pp 1111ndash1122 2011
ISRN Electronics 11
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
[47] E A Sobhy A A Helmy S Hoyos K Entesari and E Sanchez-Sinencio ldquoA 28-mW Sub-2-dB noise-figure inductorless wide-band CMOS LNA employing multiple feedbackrdquo IEEE Trans-actions on MicrowaveTheory and Techniques vol 59 no 12 pp3154ndash3161 2011
[48] M Moezzi and M S Bakhtiar ldquoWideband LNA using activeinductor with multiple feed-forward noise reduction pathsrdquoIEEETransactions onMicrowaveTheory and Techniques vol 60no 4 pp 1069ndash1078 2012
[49] JW Park and B Razavi ldquoA harmonic-rejecting CMOS LNA forbroadband radiosrdquo IEEE Journal of Solid-State Circuits vol 48no 4 pp 1072ndash1084 2013
![BGU8051[BTS1001L] 900 MHz LNA improved IRL BGU8051 [BTS1001L], 900 MHz, LNA, BTS, ... Rev Date Description ... ultra-low noise and high linearity with the process stability](https://static.documents.pub/doc/80x56/5b2554c87f8b9a56678b5e80/bgu8051bts1001l-900-mhz-lna-improved-irl-bgu8051-bts1001l-900-mhz-lna-bts.jpg)
