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Presented By:Mamta
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OUTLINE
y Tu nneling Phenomenony Tu nneling Diode & R TDy Why III-V gro up elements, band str uc turey R TDHEMTy I-V Curves of R TD & HEMTy Struc ture of R THEMT,I-V chara cteristi cs of R THEMTy Design of XOR gate using FETsy Design of XOR gate using R THEMT y Performan ce Comparison
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Tunneling Phenomenon
3Ref : S. M. Sze, & Kwok K. Ng, Physics of Semicond uc tor Devi ces
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Tunneling through a barrier
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RTDs
y R TDs exhibit a negative differential resistan ce (NDR)region
y Ultra high s peed & u ltra high freq uency devicey Requ ires band edge dis contin u ity at the cond uc tion orvalence band to form a q uant um well & th us necessitates
heteroe p itaxy .y Qu anti zed states within the well
y Advantages:Higher s peed of o peration,Lower power dissi pation,Increased circu it integration density be cause they usually red uc e device count per circu it f unction
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R TD Contd
6Band Diagram of R TD I-V Characteristi cs of R TD
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W hy III-V Group Elementsy Mature te chnology for fabri cating nanostr uc tures
from these materialsy An extraordinary pu rity of these elements can be
achievedy Band gaps (in eV) for sele cted semi cond uc tors .
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Si Ge AlAs GaAs InAs
1.1 0.7 2.2 1.5 0.4
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H igh Electron Mobility Transistor( H EMT)
y HEMT is a FET incorporating a j unction
between two materialswith different band ga ps(i.e., a heteroj unction)
y Electron channel is well
confinedy Higher channel mobility
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H EMT Modelling
y
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AlGaAs/GaAs HEMT Model using Silvaco Tool
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H EMT Modelling Using Silvaco
10Id- Vd Curve Id- VgCu rve
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R TDH EMT Structurey Monolithi c integration of R TDs and HEM Ts is a
pra
cti
cal way to
constr
uct
ultrahigh-s
peed
cir
cuitsy The R TD/HEM T material str uc ture is e pitaxied using
mole cu lar beam e p itaxy MBE technology y fabricated s ucc essf u lly using wet chemi cal etching,
metal lift-off and air bridge inter conne ctiontechnology .
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RTD H EMT Structure
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R ef [4]
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R TD &H EMT I-V Characteristics
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R TDFET
R ef [4]
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R TDH EMT I-V Characteristics
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R ef[4]
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Six-Transistor XOR Design
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n 1= AB + A B
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F our-Transistor XOR Design
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H = AB + A B
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RTH EMT based XO R gate structure
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H IGH Logic : 1.1 -1.4V
LOW Logic : 0 0.3V
H IGH Logic : 59 90uA
LOW Logic : 0 40uA
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Comparison
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D esign Input Voltages& margin
Outputmargin
No. of Components
Performance
6 -Transistor
XOR
Gate
H igh Logic: 5V
Low Logic : 0V
Not
Mentioned
FET :6 Max Delay
3.98ns
4- TransistorXOR Gate
H igh Logic: 3.3VLow Logic : 0V
NotMentioned
FET : 4 Max Delay350ps
R TH EMT basedXOR Gate
H igh Logic:1.1 1.4 VLow Logic :0V 0.3 V
H igh Logic:59 90 uALow Logic :0 40uA
FET : 2
RTH EMT : 1
Max Delay11ps
Max Frequency: 90.90G Hz
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Conclusiony The two devi ces R TD and HEM T are feasible .y The res u lts indi cate that monolithi c integration of
R TDs and HEM Ts is a practical way to constr uc t u ltra-high s peed circu its.
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References[1]S.M. Sze & Kwok .Ng, Physics of Semiconductors,third edition.
[2] D.V. Morgan & Robin H . W illiam, Physics and Technology of heterojunction devices (Ch- 5).
[3] S M Lindsay, Introduction to nanoScience
[4] Mohammad Javad Sharifi and Davoud Bahrepour, A New XO R Structure Based on Resonant-Tunneling H igh Electron Mobility Transistor , VLSI Design, Volume 2009, Article ID 803974.
[5] Ql H aito, GUO W eilian, Li Yali, Zhang Xiongwen and Li Xiaobai, InP-Based RTD/H EMT MonolithicIntegration ,2010.
[6 ] Yan- Kuin Su,Jia- Rong Chang,yan-Ten Lu,Chuing-LiangLin,Kuo Ming W u,and Zheng-Xian W u , NovelAlInAsSb/InGaAs Double barrier resonant Tunnelling Diode with high Peak-to-Valley Current ratio atroom temperature , IEEE El ectron Devices Letters ,vol21,no 4, April 2000.
[7] H . Fukuyama, K. Mae zawa, M. Yamamoto, H . Oka z aki, and M. Muraguchi, Large-signal microwavecharacteristics of resonant- tunneling high electron mobility transistors, IEEE Transactions onEl ectron Devices , vol. 4 6 , no. 2, pp. 281 287,1999.
[8] M. Takakusaki, T. O zaki, K. Akamatsu, and M. Ohmori, Electrical properties of InAlAs/InGaAs H EMTstructures on InP substrates under the optimum thermal cleaning condition grown by MBE.
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