Risks and Opportunities of Pb-free Solder Terminals and ...

Risks and Opportunities of Pb-free Solder Terminals and Packaging for Processability at Elevated Temperatures

- - - RoHS & More

Dr.Friedrich-Wilhelm Wulfert

Freescale Halbleiter Deutschland GmbH EMEA Quality Technologies & Standards Schatzbogen 7, 81829 München, Germany

[email protected]: *49-(0)89-92103-470, fax: *49-(0)89-92103-610

Introduction The European Directives WEEE (1), RoHS (2) and ELV (3) challenge the whole industry into major effort for environmental improvement actions. In meeting the directives the semiconductor manufacturers will contribute their share to a sustainable world by adjusting their materials and processes in their production lines. Obligations are to deliver products compliant with legal regulations and to satisfy customers’ “green” expectations all along the value chain. Development and implementation have to take advantage of state-of-the-art materials and processes while carefully considering the related technical and commercial aspects. As Pb-free soldering processes require higher temperatures than the conventional SnPb soldering, tremendous work is put into components’ readiness for adequate processability during board soldering. This is expressed by an improved Resistance against Soldering Heat (RaSH) and superior Moisture Level Sensitivity (MSL) for real life Package Peak Temperatures (PPT). Environmental goals and robust packages of integrated circuits are achieved by development and introduction of new materials and processes. Environmentally Preferred Products (EPP) Legislation is banning the use of Pb, Cd, Hg, Cr-VI and polybrominated biphenyle (PBB) as well as diphenylether (PBDE) in production. Thus the semiconductor industry has to eliminate Pb from terminal solder finishes, Br (and pro-actively also Sb) from mold compounds and substrate boards where glycolether has to be removed out of the solder mask layer, too. New materials are being introduced to cope with the elevated board assembly process temperatures which are result of the higher melting temperatures of typical Pb-free solders of the SnAgCu family. Freescale Semiconductor, FSL (http://www.freescale.com/greenproducts) formerly named Motorola Inc.’s Semiconductor Products Sector (SPS) actively supports the need for environmentally safe products. Freescale Semiconductor has an Environmentally Preferred Product (EPP) program to help ensure to meet customer and legislative requirements. The Freescale Semiconductor EPP development program included:

• Review of current product portfolio for compliance to high-temperature soldering processes (PPT = 245°C–260°C) needed to facilitate the use of Pb (lead)-free solder. • Implementation of robust Pb-free plating finishes across multiple factories and subcontractors • Qualification of Pb-free solder balls for area array packages • Implementation of Pb-free solder balls for flip-chip packages • Evaluation of Br-free encapsulants and organic substrates • Incorporation of Pb-free terminations and high-temperature reflow capability into new product designs

Freescale Semiconductor GmbH, EMEA Quality 1/20 FWW, May 2006

mailto:[email protected]

http://www.freescale.com/greenproducts

Processability of Integrated Circuits The JEDEC/IPC Joint Standard J-STD-020 (4) is a free standard and –with “Pb-free” appearing on the horizon– it belongs to the most frequently visited and downloaded documents from http://www.jedec.org. This standard takes care of the reliable processing of moisture sensitive surface mount components and has to be followed to maintain package integrity of components during heat exposure of board soldering. The relevant temperature is measured at the top of the parts and is defined as Package Peak Temperature (PPT). This package temperature is often also named Peak Reflow Temperature (PRT) which –because of the ‘reflow’ in the technical term– can be (and has been) misleading to take the temperature in the solderjoint where the material reflow happens. It is important to note that the package temperature is the reference temperature for the parts’ Moisture Sensitivity Level (MSL) and it must not be confused with the solder joint reflow temperature. The MSL reflects the robustness of semiconductor components for board soldering and tells how long the parts are allowed to be exposed to a controlled environment before it is necessary to dry-bake them again before any soldering step. Absorption of water has to be kept at a tolerable level so that no ‚pop-corn’ effects compromise parts’ reliable performance later on. Table 1 is a partial list of J-STD-020C MSL guidelines of processing rules for correct storage and handling prior to soldering. The standard is important for double-sided reflow, i.e. for top- and bottom-side board assemblies where it is mandatory to prevent excess moisture take-up of the plastic components during storage before they will see a second exposure to soldering heat. This advice of best-practice is also applicable for any re-work, service and repair soldering step.

unlimited1 year

4 weeks168 hours72 hours48 hours24 hours

Time on Label(TOL)

NOYESYESYESYESYESYESYES

122a3455a6

F l o o r L i f eMoisture Sensitivity

Level (MSL)

</= 30°C/85%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH

Dry-PackingRequired Time Conditions

unlimited1 year

4 weeks168 hours72 hours48 hours24 hours

Time on Label(TOL)

NOYESYESYESYESYESYESYES

122a3455a6

F l o o r L i f eMoisture Sensitivity

Level (MSL)

</= 30°C/85%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH</= 30°C/60%RH

Dry-PackingRequired Time Conditions

Table 1: Moisture Sensitivity Levels per J-STD-020C As indicated above, the technical justification for the series of the J-STD-020 standard and its importance for the industry is based upon the inherent behaviour of components where plastics are used for encapsulation, glue, seal or underfill which all absorb more or less water at slower or faster speed. Existing voids and gaps fill with water, in addition the material properties change and the adhesion at interfaces is weakened. During soldering the different thermal expansion coefficients of the package materials result in thermo-mechanical stress that can exceed the adhesion and cohesion limits of the materials and their interfaces. These forces together with the pressure of superboiling water steam can result in delamination and cracks. In the best case scenario the failures occur directly after soldering and –for example– then are found to be due to lifted 1st or 2nd wire bonds or due to sheared bond wires. However and more annoying are latent or intermittent failures as result of the reduced package integrity. Delamination at the top of the chip surface or at the bottom of the leadframe can cause chip overheating as the thermal resistance is increased. Imperfect package integrity thus can lead to ingress of moisture and contamination which together can cause corrosive attack with all of its states from leakage to opens.


http://www.jedec.org/

There is a conflict of interest between good solder joint formation of hot and fast soldering versus maintenance of good package integrity by keeping the package temperature low and also by using slow temperature gradients. This basic problem is getting into the foreground again with required minimum solder joint temperatures of 235°C - 245°C for Pb-free SnAgCu solders which have liquidus between 217°C - 227°C. That is higher than the usual solder joint temperatures of nearly eutectic SnPb solders with 205°C - 220°C with the liquidus between 179°C - 183°C. Now it is paramount to take note of the fact that board assemblies use a mix of package types of different materials and dimensions which results in a spread of thermal mass and heat conduction on the boards. Uneven heat distribution plus oven and process tolerances are reflected by a temperature difference (delta-T) on the various boards ranging in size, component dimensions, materials, arrangement and density. Detailed investigations were performed to characterize the thermal conditions at components during reflow soldering where the process window is narrowed for Pb-free (5). Figure 1 shows the relevant temperatures and where to measure them for a reliable board production.

PPT 2PPT 1

SJT 1

Package Peak Temperature (PPT)as measured at the top package surface

Solder Joint Temperature (SJT)as measured in the solderjoint

SJT 2

PPT 2PPT 1

SJT 1



SJT 2

PPT 2PPT 1

SJT 1



SJT 2

Figure 1: Solder Joint Temperature and Package Peak Temperature have to be determined for critical components on the boards. In production the minimum SJT has to be reached and the maximum PPT must not be exceeded for any component on the printed circuit board during any soldering step. A rule-of-thumb says “small components get hotter than large parts”. However, looking into this with more detail one recognizes that the component temperature is more ruled by its materials’ effective thermal mass of leadframe or plastic volumes and also the thermal conduction of the components to the board is more important than simply the part’s outside dimensions. It is obvious that externally similar components can exhibit a totally different thermal behaviour when heatsinks are embedded and/or exposed to the outside when compared to standard surface mount devices. Table 2 gives an overview of the thermal conditions during SnPb and SnAgCu board soldering and underlines the difference between the typical temperatures at the solder joint and at the package level.

Table 2: Maximum Package Peak Temperatures and Minimum Solder Joint Temperatures during SnPb and SnAgCu board soldering.

225°C

SnAgCu based217°C-227°C

MaximumPackage PeakTemperature

SnPb based179°C- 183°C

MinimumSolder JointTemperature

Large, thick Packages

Small, thin Packages 240°C

205-220°C

205-220°C

245°C

250-260°C

235-245°C

235-245°C

Solder PasteLiquidus



225°C

SnAgCu based217°C-227°C


SnPb based179°C- 183°C


Large, thick Packages

Small, thin Packages 240°C

205-220°C

205-220°C

245°C

250-260°C

235-245°C

235-245°C

Solder PasteLiquidus




Table 3 outlines the changed thermal stress scenario on the package bodies during the conventional SnPb process compared to Pb-free soldering. The shown temperature classes base upon J-STD-020C and depend on package volumes and thicknesses giving guidelines for product classification which, however, should be verified in the real board production environment to prevent excess package temperatures can affect parts’ mechanical integrity.

SnPb Eutectic Process - Package Peak Temperature

Pb-free Process - Package Peak Temperature

SnPb Eutectic Process - Package Peak Temperature

Pb-free Process - Package Peak Temperature

Table 3: Package Peak Temperature (PPT) of surface mount devices. MSL/PPT is a product characteristic. Freescale Semiconductor is determining the Moisture Sensitivity Level of the components using the Package Peak Temperature Profile (Figure 2) as measured with a thermo couple at the package top surface. This profile builds on JEDEC/IPC J-STD-020C and reflects several customers’ requirements and their production processes which were evaluated for standardization.

Tem

pera

ture

(°C

)

Time (sec)

Ramp Rate to Peak3°C/sec maximum, target 2°C/sec,measured between 200°C to 220°C

Package Peak TemperatureTarget 245°C/250°C/260°C

minimum for MSL classification,maximum for board soldering

217°C

183°C

150°C

Ramp Rate to Preheat3°C/sec maximum, target 2°C/sec,

measured from 50°C to 140°C

Automotive:1) 40 sec min for all automotive products

a) < 1.6mm thick andb) < 2.5mm thick with volume < 350 mm3

2) 30 sec for all other automotive products

Time within 5°C of Peak20 to 40 sec minimum for all non-automotive products,

target 30 sec

Preheat Time 110 sec minimumPreheat Temperature 180°C to 200 °C

target 190°C

Ramp Rate to Cool6°C/sec maximum

Time >217°C90 sec minimum

25°C to Package Peak Temperature 300 sec minimum

Figure 2: Package Peak Temperature (PPT) profile for determination of components’ Moisture Sensitivity Level (MSL) and the parts’ processability per J-STD-020

and including customer board soldering requirements.

All Temperatures Taken @ Package Top!

Sketch not to Scale

Tem

pera

ture

(°C

)

Time (sec)

Ramp Rate to Peak3°C/sec maximum, target 2°C/sec,measured between 200°C to 220°C

Package Peak TemperatureTarget 245°C/250°C/260°C

minimum for MSL classification,maximum for board soldering

217°C

183°C

150°C

Ramp Rate to Preheat3°C/sec maximum, target 2°C/sec,

measured from 50°C to 140°C

Automotive:1) 40 sec min for all automotive products

a) < 1.6mm thick andb) < 2.5mm thick with volume < 350 mm3



target 30 secAutomotive:

1) 40 sec min for all automotive productsa) < 1.6mm thick andb) < 2.5mm thick with volume < 350 mm3



target 30 sec

Preheat Time 110 sec minimumPreheat Temperature 180°C to 200 °C

target 190°C

Ramp Rate to Cool6°C/sec maximum

Time >217°C90 sec minimum

All Temperatures Taken @ Package Top!25°C to Package Peak Temperature 300 sec minimum

Sketch not to Scale


Process and Product Development towards EPP There are 3 activities in the development process to reduce Pb from electronic components or systems and in parallel to account for related MSL/PPT needs:

- Activity 1 is the evaluation of moisture performance in applications of Pb-free solders requiring high temperature soldering for customer board assembly. Evaluations are performed on existing Pb-bearing components to validate moisture sensitivity levels at the higher reflow temperatures based on customer request.

- Activity 2 is the evaluation of Pb-free terminals and terminal plating finishes for components. Evaluations are performed on Pb-free components to validate reliability of Pb-free plating finishes for Peripheral Packages and Pb-free spheres for Area Array Packages. Pb-free packages must also be compliant to the new high temperature reflow moisture sensitivity levels (MSL) conditions.

- Activity 3 is the development of solutions to Pb reduction to the flip chip packages and to evaluate high temperature die attach soldering solutions for power packages that require high thermal conductivity heat sinks integral to the package.

Pb-free component terminals, EPP and MSL/PPT Future plating finishes on the external pins of the leadframe or the solder balls of integrated circuits will be Pb-free. The lead finish is dependent on product, assembly site and package type. In order to be classified as EPP and to comply with the RoHS directive, the component will have a Pb-free finish and will be high temperature reflow capable with a minimum processability of MSL3/245°C for “large” components respectively MSL3/260°C for “small” units. For component size classifications refer to J-STD-020 (latest version). Freescale Semiconductor developed matte tin (Sn) and tin bismuth (SnBi) as Sn-based and Pb-free plating finishes besides the already long existing and marketed option of nickel palladium (NiPd) or nickel palladium gold (NiPdAu) for its leadframe product portfolio. The solderability of Pb-free finishes is inferior to conventional SnPb, however, it satisfies standard requirements of wettability and also of nowadays board production (8). Freescale will focus on Matte Sn for electroplating of Cu leadframe devices. Still needed functions of Alloy42 leadframe parts require conversion to Cu leadframes (6) and customers are asked to review their existing and to express their future needs of such Alloy42 based legacy parts. In course of the necessary changes new mold compounds will be evaluated and introduced for appropriate MSL/PPT performance of the product. The goal of MSL1/260°C for parts’ processability will not always be possible for older generation components. Area array packages usually have Sn4.0Ag0.5Cu solder spheres (7) and will be manufactured with a processability goal of at least MSL3/245°C. Such ball grid arrays (BGAs) belong to the large component category in J-STD-020. The RoHS directive allows high-Pb solders greater than 85% and is based upon technical justification. This applies to high-Pb content solders for which there is no technological or cost effective solution. Flip-chip BGA will be available with Pb-free solder balls for external soldering, however, it will continue to have its high-Pb content internal bumps. Heat Sink Small Outline Packages (HSOP) or other thermally enhanced components with exposed heat sinks (TEQFP, TEQFN) for better power dissipation will continue to use high-Pb or even change to high-Pb solder die attach now, in order to establish a solder hierarchy from inside to outside, i.e. from internally high to externally lower liquidus temperatures or melting ranges of the solders. Modern mold compounds do not use Br- or Sb-formulars anymore for flame retardents since there are new advanced solutions. The new additives are of aromatic nature and help to stay compliant with existing safety and environmental regulations as reqired by RoHS and upcoming legislation to eliminate halogens. Latter ban is no legal requirement, yet. All new molding and additive materials have to be evaluated for effectiveness in accident and also their chemical stability during normal operation. No short-term or long-term reactions between package and chip materials are allowed in


production, assembly and use of the components in their field application. For improved package integrity there are additional cleaning steps in evaluation where plasma or UV-ozone are applied in assembly prior to wire bonding and/or molding. The intent is to create fresh and clean surfaces, to reduce the contamination level of foreign or residual elements at the interfaces where different materials are brought together and expected to adhere and connect for a reliable life. Thus the extrinsic thermo-mechanical stress during components’ use is addressed by an improved intrinsic robustness of the interfaces. Board Soldering with “Pb-free” Terminated Components During the change-over from conventional SnPb to the coming Pb-free board soldering not all components will be available with the required solder finish. There will be conventional SnPb parts on Pb-free boards and already converted Pb-free components will land on printed circuit boards which are still run through traditional SnPb soldering processes. Attention is required when soldering SnPb components under Pb-free conditions that the parts’ MSL/PPT is adequate. Dry-baking prior to soldering might be necessary. SnPb solders melt without problems in both air and nitrogen atmospheres of Pb-free solder ovens and at normal Pb-free temperatures. Pb-free leadframe parts can be put on boards with SnPb solders and no changes have to be done to the SnPb process. The SnPb solder finish or paste on the board and/or from the wave rule the solder system and are not influenced by the minute amount of Pb-free solder on the leads. Good solder joints form, the component reliability is unaffected when its MSL/PPT was followed during the board soldering and related handling. The situation is different when soldering Pb-free solder balls of BGAs on to boards with SnPb solder paste. Care has to be taken for a complete melt and mix of both solder reservoirs of paste bumps and balls where now the large volume of the solder balls determines the necessary temperatures and soldering kinetics. The paste volume disappears into the ball and both form the final joint. The process is well set when the “dual collapse” of the BGA towards the board can be observed, the BGA has to sink into the paste and further moves towards the board when the solder balls melt. Then enough time has to be given that the parts swim and center, the molten solders form a homogenous connection. Experience shows that solder joint temperatures of >225°C yield good and reliable solder joints between SnPb pastes and SnAgCu balls. That is higher than at the upper end of the normally established 205°C - 220°C in the joints of SnPb soldering. Figure 3 shows the conditional up- and downward compatibility and the crucial areas for special attention.

EPP with Matte Sn on Cu Leadframe is fully backward compatible !

SnPb TerminalComponent

Pb-free TerminalComponent

SnPb Solder BoardAttach Process

SnAgCu Pb-free SolderBoard Attach ProcessPb-free

Conventional

OK, components require robustnessfor higherpackage temperature compliance (MSL/PPT)

OK, must set up profile to be

Figure 3: Conditional up- and downward compatiblity of Pb-free in SnPb and vice versa.

>225°Cfor array package solderjoint temperature

Inhibit Bi and Pb „contamination“in HighTemperature applications!




SnAgCu Pb-free SolderBoard Attach Process

Conventional

Pb-freeInhibit Bi and Pb „contamination“in HighTemperature applications!

! ! !Attention

! ! !

EPP with Matte Sn on Cu Leadframe is fully backward compatible !




SnAgCu Pb-free SolderBoard Attach Process

Conventional

OK, components require robustnessfor higherpackage temperature compliance (MSL/PPT)OK, components require robustnessfor higherpackage temperature compliance (MSL/PPT)

OK, must set up profile to be for array package solderjoint temperatureOK, must set up profile to be for array package solderjoint temperature

Pb-free

>225°C>225°C





Conventional

! ! !Attention

! ! !SnAgCu Pb-free SolderBoard Attach ProcessPb-free



Soldering of the Pb-free terminal components will typically require extensive changes to the board assembly reflow profile. SnAgCu based solders have a melt temperature that is approximately 40°C higher than eutectic SnPb based solders. It is preferable that Pb-free parts be soldered with solder pastes employing fluxes formulated for the associated higher process temperatures. Open solder joints and incomplete formation of the BGA-to-board solder interconnects can be a result of too low solder joint temperatures (Figures 4a-b). The thermal flow from the heated package through the solder ball towards the solder paste reservoir and vice versa must not be hindered by local separation or flux interlayer build-up. In this context it is advised to take care in the right choice of temperature stable fluxes that fit the thermal profile of the board soldering process. Possible incompatibilities of flux materials have to be excluded. This is an area where solder material suppliers need to share their experience with the user community.

Figure 4a: Open solder joints and incomplete formation of the interconnect at 203°C.

Figure 4b: Complete wetting and good formation and mix of the SnPb paste and SnAgCu solder from board and BGA.at solder joint temperatures of 225°C. Shown solder joint cross-sections are made after extended temperature cycling exercises far beyond the acceptance criteria. Visible crack formation after >6000 temperature cycles is not of interest for this section where the focus is on the solder joint formation in the first place. When solder joints are well formed, then there is equivalence between SnPbAg-to-SnPb and SnCuAg-to-SnPb and SnCuAg-to-SnAgCu (see later section on solderjoint reliability) with a tendency for superior performance of Pb-free joints.


Careful inspection of solder joint cross-sections from interconnects that formed at different solder joint temperatures (Figure 5a-c) visualizes the progress of homogenisation with increasing temperatures.

203°C 210°C 225°C Figure 5a-c:: Increase of solder joint temperature leads to better mix and distribution of Pb from the SnPb paste into the originally Pb-free SnAgCu solder ball and the final homogenous solder interconnect. Package Warpage Large area packages are exposed to a thermo-mechanical phenomenon of package deformation known as “warpage”. It is a result of the more or less unbalanced construction and arrangement of material layers with not matching coefficients of thermal expansion (CTE). Directly after production the parts are not necessarily perfectly flat as built-in package stress finds relief in the described deformation. Thus the coplanarity of external leads can suffer from deformed packages. PBGAs substrates can lift the attached solder balls away from the solder plane on the board. This makes solder joint formation difficult or even prevents it totally (Figure 6a-d).

6a

6b 6c 6d

6a

6b 6c 6d Figure 6a-d: Package warpage causes insufficient solder joint formation. Heat transfer from the package and board into the solderjoint is hindered.


Package warpage is dynamic and changes with temperature, (Figure 7).

Package WarpageCriteria: 200µm or 8mils

Goal: 150µm or 6mils

0

65

130

195

T i m e

T e

m p

e r

a t u

r e

[°C

] Solderjoint Temperature213°C - 235°C

Measured MoiréPeak Reflow Temperature

up to 255CView is dead bug with solder balls removed. Temperature Profile shown is a reference

curve for illustration purposes only.

Sn36Pb2Ag Solder Paste is liquid at 179°C.Sn4.0Ag0.5Cu Solder paste is liquid at approx. 225C

Concave on customer board


Convex on customer board


260 Example shown:388 PBGA Nitto HC100X2EMC Package Flatness Baseline Performance to Pass Solderability

dz = -130um (5.12 mils)

Figure 7: During board soldering the deformation of the package and substrate („warpage“) changes with the temperature and reaches from a concave to a convex arrangement of the solder balls or vice versa.

It has to be pointed out that the printed circuit board also changes its curvature during soldering as same physics work there, too. Board stabilization measures are recommended to support a continuous contact for ongoing heat transfer between the package solder balls and the printed paste on the boards. The effort will pay in good solder joint formation and better board yields. Reliability of typical solder joints Temperature cycling addresses performance and robustness of board-level solder joints. Various combinations of packages with different solder finishes are reflow soldered using conventional SnPb or the new Pb-free processing. During the thermal cycling stress the ohmic resistance of daisy-chained solder interconnects is watched. Example Weibull graphs show gathered results for the 64LQFP and the 132PQFP (Figure 8a-b). The conclusion is that the lifetime of Matte Sn solder finish leadframe devices is at least as good as those with conventional SnPb plated leads no matter if soldered with SnPb or SnAgCu solder pastes on the printed circuit boards.

dz = 80um (3.14 mils)

dz = 100um (3.93 mils)dz = 100um (3.93 mils)


Package WarpageCriteria: 200µm or 8mils

Goal: 150µm or 6mils

0

65

130

195

T i m e

T e

m p

e r

a t u

r e

[°C

] Solderjoint Temperature213°C - 235°C

Measured MoiréPeak Reflow Temperature

up to 255CView is dead bug with solder balls removed. Temperature Profile shown is a reference

curve for illustration purposes only.

Sn36Pb2Ag Solder Paste is liquid at 179°C.Sn4.0Ag0.5Cu Solder paste is liquid at approx. 225C



Convex on customer board


260

dz = -130um (5.12 mils)

Example shown:388 PBGA Nitto HC100X2EMC Package Flatness Baseline Performance to Pass Solderability

Example shown:388 PBGA Nitto HC100X2EMC Package Flatness Baseline Performance to Pass Solderability

dz = 80um (3.14 mils)

dz = 100um (3.93 mils)dz = 100um (3.93 mils)



Number of Temperature Cycles -40°C/125°C

%

Packages

Failed


%

Packages

Failed

Peripheral Device: Board Level Solder Joint Reliability, 64LQFP

Sn – SnAgCu 4has no fails

as of 13407 cycles,dashed line represents worst case estimation.

Finish - Solder

Figure 8a: Board-Level Solder Joint Reliability of 64LQFP

Figure 8b: Board-Level Solder Joint Reliability of 132PQFP

Peripheral Device: Board Level Solder Joint Reliability, 132PQFP

Both combinations,Sn finish in SnPb solder

andSn finish in SnAgCu solder

perform equal to or better than

SnPb finish in SnPb solder.

Board assembly with SnPbsolder paste was performedat the standard SnPb profile.

Finish - Solder

2) Backwardcompatible220°C reflow

3) Forwardcompatiblehigh-temp reflow

4) Pb-free, high-temp reflow

1) Current220°C reflow

Sn - SnAgCu 4SnPb - SnAgCu 3

Sn - SnPb 1

SnPb - SnPb 2


as of 6961 cycles,dashed line representsworst case estimation.

Peripheral Device: Board Level Solder Joint Reliability, 132PQFP


andSn finish in SnAgCu solder

perform equal to or better than

SnPb finish in SnPb solder.

Board assembly with SnPbsolder paste was performedat the standard SnPb profile.

Finish - Solder






Sn - SnPb 1

SnPb - SnPb 2

Finish - Solder






SnPb - SnAgCu 3

Sn - SnPb 1Sn - SnPb 1

SnPb - SnPb 2SnPb - SnPb 2


as of 6961 cycles,dashed line representsworst case estimation.


Sn - SnPb 2

3) Forwardcompatible240°C reflow

4) Pb-free, 240°C reflow



SnPb - SnPb 1


andSn finish in SnAgCu solderperform equal to or better

than SnPb finish in SnPb solder.

Board assembly with SnPbsolder paste was performed at

the standard SnPb profile.


%

Packages

Failed

Peripheral Device: Board Level Solder Joint Reliability, 64LQFP


%

Packages

Failed

Finish - Solder


as of 13407 cycles,dashed line represents worst case estimation.


Sn - SnPb 2





SnPb - SnPb 1Finish - Solder


Sn - SnPb 2




Sn - SnAgCu 4SnPb - SnAgCu 3Sn - SnPb 2SnPb - SnPb 1


andSn finish in SnAgCu solderperform equal to or better

than SnPb finish in SnPb solder.



SnPb - SnPb 1


Same equivalence as identified for peripheral packages and all solder material and process combinations is found also for the soldering of area array packages. Acceptance citeria of >2000 temperature cycles are fulfilled for such ball grid arrays (Figure 9a-b) as well.

Area Array Device: Board Level Solder Joint Reliability, PBGA388

Ball - Solder




Figure 9a: Board-Level Solderjoint Reliability of PBGA388

Figure 9b: Board-Level Solderjoint Reliability of TBGA480


SnPbAg - SnPb 1

SnAgCu - SnPb 2

SnPbAg - SnAgCu 3

SnAgCu - SnAgCu 4

Both combinations,SnAgCu ball in SnPb solder

andSnAgCu ball in SnAgCu solder

perform equal to or betterthan SnPbAg finish in SnPb solder.



Area Array Device: Board Level Solder Joint Reliability, PBGA388

Ball - Solder




SnAgCu - SnPb 2

SnPbAg - SnAgCu 3


SnPbAg - SnPb 1

SnAgCu - SnAgCu 4

Ball - Solder




SnAgCu - SnPb 2

SnPbAg - SnAgCu 3


SnPbAg - SnPb 1

SnAgCu - SnAgCu 4






Ball - Solder





SnPbAg - SnPb 1

SnAgCu - SnPb 2

SnPbAg - SnAgCu 3

Area Array Device:

SnAgCu - SnAgCu 4

Board Level solder Joint Reliability, TBGA480






Ball - Solder




SnAgCu - SnPb 2

SnPbAg - SnAgCu 3


SnPbAg - SnPb 1

SnAgCu - SnAgCu 4

Ball - Solder




SnAgCu - SnPb 2

SnPbAg - SnAgCu 3


SnPbAg - SnPb 1

Area Array Device: Board Level solder Joint Reliability, TBGA480






SnAgCu - SnAgCu 4


Whisker Growth and Mitigation Spontaneous Sn whisker growth (11 - 13) from plated Sn based solder finishes (Figures 10a-b) is considered a risk by the aircraft and space industry (14, 15) in the first place but needs carefull review and investigations also for other critical applications. There is a strong indication that mechanical stress is the main reason for the extrusion of these crystalline needles or other formations on Sn surfaces. Copper/tin intermetallics along Sn grain boundaries and originating from the diffused Cu of the leadframe base material are suspect to be responsible for the stress that drives whiskers (9, 13) from surface grains. The situation is different for Alloy42 leadframe material where the thermal mismatch between the steel and the Sn solder plating is identified to promote whisker growth (16, 17) from stressed grains in the solder finish.

Figure 10a: Figure 10b: Whisker on a Sn surface. Whisker grown from SnPb surface. The mechanisms for Sn whisker growth are not fully understood, yet. Figure 11 shows a fishbone diagram detailing key influencing factors for the formation of Sn whiskers. A combination of environment, materials, methods and equipment interact. Our investigations found whiskers on all Sn-based solder finishes and sooner or later all surfaces of Sn, SnBi, SnCu and also SnPb plated finishes exhibited more or less whiskers (10).

> 10 µm

Figure 11: Influencing factors for whisker growth and mitigation

red = promotes whisker growthgreen = prevents whisker growth

1 - 8 µm

Organic Brightening

(>2%) AlloyingPlating thickness

Plating grain size

Ni Underplating

Tin WhiskerPrevention


Environment

EquipmentMethods

Materials

Base metal

Plating Process

Temperature

High current density plating baths

HumidityIntermetallic formation (Cu6Sn5)

Surface oxidationExternal mechanical stress

Physical imperfections caused in assemblyAnnealing

> 150ºC50º - 70ºC

< 1 µm< 0.5 µm

CuBrass, Zn

Hot DipElectroplating

red = promotes whisker growth

> 10 µm

green = prevents whisker growth

1 - 8 µm

Organic Brightening


Plating grain size

Ni Underplating



Environment

EquipmentMethods

Materials

Base metal

Plating Process

Temperature





> 150ºC50º - 70ºC

< 1 µm< 0.5 µm

CuBrass, Zn

Hot DipElectroplating

> 10 µm


Plating grain size1 - 8 µm

Organic Brightening

Ni Underplating



Environment

EquipmentMethods

Materials

Base metal

Plating Process

Temperature





> 150ºC50º - 70ºC

< 1 µm< 0.5 µm

CuBrass, Zn

ElectroplatingHot Dip


Storage in 60°C/95%RH created whiskers on SnCu after only 3 weeks, it took about 7 weeks for SnPb and 13 weeks for Sn and SnBi. The shortest whiskers were found on SnPb, followed by Sn, SnBi. SnCu grew the longest whiskers. SnPb shows the least amount of whiskers, there are more on SnBi, SnCu and most whiskers are on plated Sn. Figure 12 summarizes the results of a comprehensive 60°C/95RH whisker study using QFP components.

Figure 12: Incubation time, maximum length and number of whiskers found on a variety of plated solder finishes during a 60°C/95RH storage. NEMI (National Electronics Manufacturing Institute Inc, USA), SOLDERTEC (Tin Technology Ltd., Europa) und JEITA (Japan Electronics and Information Technology Association, Japan) formed a team to run a program (18-21) to study the nature of Sn whiskers, their growth mechanisms and to develop and propose possible prevention and test measures. Ni or Ag barrier layers seem to be effective diffusion barriers and buffer between the plated Sn and the leadframe base materials. JEDEC published a document in May 2005 how to measure whisker growth (22). Infineon, STMicroelectronics, Philips and Freescale Semiconductor form E4 (Environmental 4) and share their expertise and results for joint progress in the field of EPP (23, 24). An evenly grown SnCu intermetallic during a one hour anneal @ 150°C after plating acts as diffusion barrier and mitigates the Sn whisker growth especially during storage of unsoldered Cu leadframe components. Reflow soldered Matte Sn over Cu leadframe parts exhibit a very low level of whiskering. NEMI proposed whisker tests of -55°C/85°C air-to-air temperature cycling or extended storage at ambient or in 60°C/93%RH did not show whiskers lengths above 25µm. Influence of reflow and trim & form of the Matte Sn finished leads was investigated concerning whisker growth, too (25-27). Among others the above mentioned whisker mitigation methods and whisker tests strategies are being further evaluated and developed. Manufacturers are invited to join the mentioned working groups to shed more light into the possible impact of whisker growth for the electronic industry and in support of successful use of Matte Sn as a viable and reliable Pb-free plated solder finish.


RoHS Compliant Product Availability The customer demand for volume shipment of “Pb-free” or “Green” (all these buzz words should be better termed “RoHS compliant”) products is now growing. It is also understood meanwhile that Pb-free terminations are just one sub-element in the RoHS requirements. Of same importance as the material ban in RoHS are the consequences for the components’ processability at the higher “Pb-free” temperatures for “Pb-free” board assemblies. Besides SnPb-solderable NiPdAu parts, Freescale Semiconductor repectively MOTOROLA SPS have been shipping at higher temperatures Pb-free solderable products since 2001, based on specific customer requests. Products’ processability is specified by their MSL/PPT and is getting more and more into the foreground of project planning and on top of usually discussed development topics. Table 4 is showing the manufacturing readiness by package family. For sample or product availability please contact a Freescale sales office or the Freescale Technical Information Center via http://www.freescale.com. Daisy-chain PBGAs are well suited to evaluate the process capability of board assembly lines also with respect to optimize the line with respect to minimum solder joint temperature and maximum package peak temperature of the components on the boards.

Q2 05SOIC

Q3 05PDIP

Q4 05Dedicated Automotive

Q4 05QFN

Q2 05Power QFN

Q2 05QFP

Q2 05TBGA

Q2 05PLCC

Q1 05SSOP

Q1 05TSSOP

Q1 05PBGA

Q1 05MAP BGA

RoHS Compliant

EPP Package Family

Description

Q2 05SOIC

Q3 05PDIP

Q4 05Dedicated Automotive

Q4 05QFN

Q2 05Power QFN

Q2 05QFP

Q2 05TBGA

Q2 05PLCC

Q1 05SSOP

Q1 05TSSOP

Q1 05PBGA

Q1 05MAP BGA

RoHS Compliant

EPP Package Family

Description

Table 4: Package family compliance readiness dates are estimates, they represent dominant sites and package sizes. Individual product availability can be earlier or later and depends on market and customer needs. All customers are requested to determine and report their needs for SnPb and Pb-free components after careful review of their production capabilities and needs for their customer applications in their market(s) which may be under RoHS or not. This will allow for proper production planning up and down the value chain. Product Part Numbers and Conversion So far, conversions took place only on a customer request basis. All conversion of existing SnPb finish products to Pb-free products are announced by our standard Product Change Notification system. Collected data and experience of our Matte Sn and whisker mitigation bake solution for leadframe based products now justifies to change from the pull-mode to a push-mode. Strong basis for this decision is the proven backward compatibility of Matte Sn plating for SnPb board soldering. On the other hand for BGA parts, we do not recommend mixed assembly of SnCuAg, i.e. Pb-free balled area array packages, i.e. BGA components have to be handled on a product-by-product basis and thus need intensive exchange to establish alignment with the customer project needs.


http://www.freescale.com/

Freescale’s Environmentally Preferred Products (EPP) satisfy both the material restrictions of RoHS and the required Resistance against Soldering Heat: EPP = RoHS + RaSH . EPP will receive new part numbers (Table 5) for proper traceability and clear distinction between EPP and the former products which were already “RoHS-5 compliant”. “RoHS-5” or “RoHS 5 of 6” means that 5 of the “dirty six” substances meet the legislations for the homogeneous materials, i.e. Hg, Cd, Cr-VI, PBB, PBDE maximum concentrations are per RoHS but Pb is still present beyond RoHS limits or allowed by exemptions.

Package Suffix Description Package Suffix DescriptionAA Pb-free 44 to 100 pin QFP EP Pb-free QFN & MLF (Exposed Pad)AB Pb-free 112 to 288 pin QFP ET Pb-free RF (POWER Chips)AC Pb-free 16 to 44 pin LQFP EU Pb-free MAC PAACAE Pb-free 48 to 64 pin LQFP EV Pb-free MFP (SOEIAJ)AF Pb-free 68 to 100 pin LQFP FC Pb-free QFN & MLF (Regular)AG Pb-free 108 to 144 pin LQFP FE Pb-free CerQuadsAH Pb-free 80 to 100 pin TQFP VK Pb-free MAPBGA <=1.3mm (THINMAP) < .7mm PitchAI Pb-free FQFP VL Pb-free MAPBGA <=1.3mm (THINMAP) > .7mm PitchAJ Pb-free CQFP VM Pb-free MAPBGA 1.6mm > .7mm PitchEC Pb-free 22 to 64 pin PDIP VN Pb-free MAPBGA 1.6mm < .7mm PitchED Pb-free 6 to 20 pin PDIP VO Pb-free MAPBGA 1.36mm < .7mm PitchEE Pb-free PSDIP VP Pb-free MAPBGA 1.36mm > .7mm PitchEF Pb-free 8 to 16 pin SOIC VR Pb-free PBGAEG Pb-free 16 to 28 pin SOIC WIDE VS Pb-free CBGAEH Pb-free 132 pin PQFP VT Pb-free FC-PBGAEI Pb-free PLCC VU Pb-free PGAEJ Pb-free 8 to 24 pin TSSOP VV Pb-free TBGAEK Pb-free 32 to 54 pin SOIC WIDE VW Pb-free HSOPEL Pb-free 26 to 56 pin TSSOP VX Pb-free SMTEN Pb-free 8 to 24 pin SSOP old xx +E Pb-free 8/16 Bit ProductEO Pb-free 26 to 56 pin SSOP old xx +N Pb-free RF Division Product

Table 5: New two-letter package identifiers tell if products are from the FSL EPP portfolio It has to be emphasized again that RoHS compliance alone does not establish the components’ processability at elevated temperatures for “Pb-free” board assembly. The complex situation of the development towards “Green Products” (Note: The plastic components remain black in colour!) is visualized in Figure 13. Besides the technical consequence of better RaSH for RoHS compliant components it considers another environmental aspect which is the so far not legally required elimination of halogens.

+ =Pb-Free

<or> Exempt

Halogen-Free <Optional>RaSH**

RoHS5 of 6*

RoHS

EPP+ =Pb-Free

<or> Exempt


RoHS5 of 6*

Pb-Free<or> Exempt


RoHS5 of 6*

RoHS

EPPEPP

Figure 13: Roadmap and set of requirements towards “Green Products”

of Freescale’s EPP portfolio.

Freescale offer a portal on its web site http://www.freescale.com to access standard product information including EPP related details.



Using the product search function in the upper left corner on the mentioned web site, customers can find the actual product status and availability (Fig 14a, b).

Figure 14a: Partial view of the results when entering 908az60 as search criteria on the web site

http://www.freescale.com and outlining the part number and availability of conventional and RoHS compliant products.

for MC908AZ60CFU

for MC908AZ60CFUE

for MC908AZ60CFU

for MC908AZ60CFUE

Figure 14b: More details can be found when switching to the next page by means of view. All relevant product information is summarized, definitions are provided same as Product Content Report and the 2nd Level Interconnect material, i.e. the the product termination finish when selecting the underlined items.



The Freescale conversion policy and strategy towards RoHS is shown in Figure 15 and builds on the following for Freescale’s growing EPP portfolio: 0. Our existing semiconductor portfolio meets RoHS requirements for cadmium, mercury, hexavalent chromium or polybrominated biphenyl (PBB) and polybrominated diphenyl ether (PBDE) flame retardants. 1. Freescale has RoHS compliant alternatives for its entire semiconductor portfolio, except for those slated for product discontinuance or for use in RoHS exempt applications. These alternative products are high-temperature attach qualified, which means the products are capable of high-temperature, lead (Pb) free assembly. 2. Freescale is presently shipping many RoHS compliant, high-temperature attach qualified, products and will be prepared to ship all of its RoHS compliant alternatives in advance of the RoHS July 1, 2006 compliance deadline. 3. After January 2006, Freescale plans all new product introductions to be RoHS compliant, high-temperature attach qualified. 4. Freescale is migrating leadframe production to standard high temperature attach qualified material sets. Last shipment dates have been announced for non-RoHS compliant standard products. Non-RoHS compliant custom products may be supported upon request. 5. Freescale is migrating BGA production to a standard high temperature attach qualified material set supporting both SnAgCu and SnPb spheres. Existing non-RoHS compliant BGA products will be supported throughout the conversion.

Existing RoHS non-compliant products will be supported throughout the transition, using the GPCN process to announce last shipment dates.

To support backward compatibility, Freescale continues to offer existing BGA products with both RoHS (SnAgCu) and non-RoHS (SnPb) packages.

New products introduced with high temperature material sets will include non-RoHS (SnPb) sphere options.

Initial Device Migration (GPCN) issued in Dec 2005:30 June 2006 – Last order31 December 2006 – Last shipment

Existing products not compliant to RoHS will be supported throughout the transition, using the GPCN process to announce last shipment dates.

Products Not Compliant To RoHS

Packages are qualified and available today to meet RoHS high temperature attached qualified production requirements.

New product introductions have high temperature attach qualified material sets and have RoHS (SnAgCu) sphere options.


New product introductions are RoHS compliant & high temperature attach qualified material sets.

RoHS Compliant Products

BGA (Ball Grid Array) Packages

Leadframe Packages

Existing RoHS non-compliant products will be supported throughout the transition, using the GPCN process to announce last shipment dates.

To support backward compatibility, Freescale continues to offer existing BGA products with both RoHS (SnAgCu) and non-RoHS (SnPb) packages.

New products introduced with high temperature material sets will include non-RoHS (SnPb) sphere options.

Initial Device Migration (GPCN) issued in Dec 2005:30 June 2006 – Last order31 December 2006 – Last shipment

Existing products not compliant to RoHS will be supported throughout the transition, using the GPCN process to announce last shipment dates.

Products Not Compliant To RoHS


New product introductions have high temperature attach qualified material sets and have RoHS (SnAgCu) sphere options.


New product introductions are RoHS compliant & high temperature attach qualified material sets.

RoHS Compliant Products

BGA (Ball Grid Array) Packages

Leadframe Packages

Figure 15: EPP conversion of Leadframe and BGA Packages


Summary The conversion to Pb-free demands special effort on the manufacturer and user side of integrated circuits. Technical solutions are made available where matte Sn plus bake was chosen as the mainstream Pb-free solder finish for leadframe devices besides the already introduced NiPd(Au). Ball Grid Array packages receive SnAgCu solder balls. Sufficient to good solderability is given for all Pb-free terminations in conventional SnPb and SnAgCu board solders. Matte Sn finished leadframe components are backward compatible, i.e. are well suited for both SnPb and Pb-free board assemblies. Due to the conditional compatibility of BGAs we do not recommend mixed SnPb/Pb-free board attach for area array packages. It is paramount to always follow the MSL/PPT processability rules per J-STD-020C. Introduction of new mold compounds or other new materials for lead frames or die attach and related process changes and improvements are often necessary to comply with requirements for halogen- and Sb-free products and the necessary Robustness against Soldering Heat (RaSH) for “Pb-free” board soldering conditions. The “Pb-free” directive results in more changes besides Pb-free component terminations and thus yields the necessary package robustness for the elevated process temperatures of “Pb-free” assemblies. Biphenyle epoxy resins with metal-hydrates and metal-oxides or multi-aromates as flame retardents have a good chance to replace present plastic materials with conventional Br- or Sb-based flame retardents. Board-Level reliability with Pb-free terminations proves fully acceptable or even better when compared to traditional solder joints. Application specific investigations are encouraged to collect further supporting data. All along the value chain, customers and suppliers have to keep each other informed about their needs and plans for future non-RoHS or RoHS compliant production. Related roadmaps and expectations have to be communicated for possible alignment at the earliest point in time so that product use and conversion can go hand-in-hand without interruptions for running applications but also in the development phase of new projects. Joint effort and shared learnings will result in successful product and business for all parties involved together.


Literature 1) Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE) 2) Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (RoHS) 3) Commission Decision of 27 June 2002 amending Annex II of Directive 2000/53/EC of the European Parliament and of the Council on end-of-life vehicles (ELV) 4) IPC/JEDEC J-STD-020C: “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices”, July 2004 5) Klein, Ch. et al (2003): “Qualification Temperature Profile of Electronic Devices for Lead-free Reflow Soldering”, ZVEI Workshop “Lead-free Production in Automotive Business”, Frankfurt, Oct.23, 2003. 6) Wulfert, F.W. et al (2002): “Assessment of Pb-free Finishes for Leadframe Packaging”, Electronics Circuits World Convention, ECWC 9, Cologne Trade Fair, Germany, October 2002 7) Wulfert, F.W. et al (2002): “Development of Pb (lead) and Halogen Free Plastic Ball Grid Array, PBGA, Components”, Electronics Circuits World Convention, ECWC 9, Cologne Trade Fair, Germany, October 2002 8) IEC 60068-2-58 Environmental testing – Part 2-58: “Test methods for solderability, resistance for dissolution of metallization and to soldering heat of surface mounting devices (SMD)”, 2nd. Edition 1999-2001 9) Dittes, M. (2002): “Lead-free Post-Mold Plating for Semiconductor Devices”, Electronics Circuits World Convention, ECWC 9, Cologne Trade Fair, Germany, October 2002 10) Vo, N. et al (2001): “Pb-free Plating for Peripheral Leadframe Packages”, Second International Symposium on Environmentally Conscious Design and Inverse Manufacturing Proceedings, Tokyo, Japan, Dec. 11-15, 2001 11) Lee, B. et al (1998): “Spontaneous Growth Mechanism of Tin Whiskers”, Acta Materiologica, Vol. 46, No. 10, 1998, pp. 3701-3714 12) http://www.nemi.org/projects/ese/tin_whisker.html , http://www.jedec.org/download/search/22a121.pdf , 13) Zhang, Y. et al : "Understanding Whisker Phenomenon — Driving Force for the Whisker Formation", APEX 2002, San Diego, CA. 14) http://nepp.nasa.gov./whisker 15) http://www.space.com/businesstechnology/mexican_satellite_000830.html 16) Dittes, M. et al (2003): “Tin Whisker Formation – Results, Test Methods and Countermeasures”, ECTC 2003, New Orleans, May 29, 2003


http://www.nemi.org/projects/ese/tin_whisker.html

http://www.jedec.org/download/search/22a121.pdf

http://nepp.nasa.gov./whisker

http://www.space.com/businesstechnology/mexican_satellite_000830.html

17) Dittes, M. et al (2003): “The Effect of Temperature Cycling on Tin Whisker Formation”, IPC/JEDEC 4th International Conference on Leadfree Electronic Assemblies and Components Proceedings, Frankfurt/Germany, October 21-22, 2003 18) "NEMI Sn Whisker Project," Tin Whisker Joint Meeting: NEMI, JEITA & ITRI, May 2003, Tokyo, Japan, ftp://nemi.org/webdownload/newsroom/Presentations/JEITA_paper.pdf 19) ftp://nemi.org/webdownload/newsroom/Presentations/JEITA_presentation.pdf 20) Galyon, G.T.: “Annotated Tin Whisker Bibliography and Anthology, NEMI, March 2004, ftp://nemi.org/webdownload/newsroom/TW_biblio-July03.pdf 21) iNEMI Tin Whisker User Group: “Recommendations on Lead-Free Finishes for Components Used in High-Reliability Products Version 3, Updated May 2005, http://thor.inemi.org/webdownload/projects/ese/tin_whiskers/User_Group_mitigation_May05.pdf 22) JEDEC Standard JESD22A121: “Measuring Whisker Growth on Tin and Tin Alloy Surface Finishes, http://www.jedec.org/download/search/22a121.pdf 23) Dittes, M. et al (2004): “A Two Step Approach for the Release of Lead Free Component Finishes with Respect to Whisker Risk”, IPC and JEDEC 7th International Conference on Lead Free Electronic Components and Assemblies, Frankfurt, Germany, Oct.21-22, 2004 24) P.Oberndorff et al (2005): “Whisker Formation on Matte Sn Influenced by High Humidity, 55th Electronic Components and Technology Conference, May 31. – June 3, 2005 25) Su, P. (2004): “Effects of 260°C Reflow on Sn Whisker Growth”, NEMI Tin Whisker Workshop @ ECTC 2004, Las Vegas, June 2004 26) Su, P. et al (2005): “Effects of Reflow on the Microstructure and Whisker Growth Propensity of Sn Finish”, 55th ECTC, Orlando, May/June 2005 27) Ding, M. (2005): Effects of Trim and Form on the Microstructure and Whisker Growth Propensity of Sn Finish”, 55th ECTC, Orlando, May/June, 2005


ftp://nemi.org/webdownload/newsroom/Presentations/JEITA_paper.pdf

ftp://nemi.org/webdownload/newsroom/Presentations/JEITA_presentation.pdf

ftp://nemi.org/webdownload/newsroom/TW_biblio-July03.pdf

http://thor.inemi.org/webdownload/projects/ese/tin_whiskers/User_Group_mitigation_May05.pdf

http://www.jedec.org/download/search/22a121.pdf

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