S-Pisces is an advanced 2D device simulator for silicon based technologies that incorporates both drift-diffusion and energy balance transport equations. A large selection of physical models are available which include surface/bulk mobility, recombination, impact ion- ization and tunneling models. Typical applications include MOS, bipolar, and BiCMOS technologies. The capabilities of all the physical models have been extended to deep submicron devices, SOI devices, and non-volatile memory structures. All measurable electrical parameters can be calculated. For MOS technologies these include gate and drain characteristics, subthreshold leakage, substrate currents, and punchthrough voltage. For bipolar technologies Gummel plots and saturation curves can be predicted. Other important characteristics that can be calculated include breakdown behavior, kink and snapback effects, CMOS latchup, guarding breakdown voltage, low-temperature and high-temperature operation, AC parameters, and intrinsic switching times. Simulated snapback in the breakdown curve caused by the parasitic bipolar. Substrate current in a MOSFET calcu- lated using the Energy Balance and clas- sical drift-diffusion models. Gate C-V plot for a MOS capacitor. Both the high and low frequency responses are demonstrated. Simulated I D -V D and I D -V GS data. These characteristics may be loaded into Utmost to extract the equivalent BSIM3 or BSIM4 Spice models. Electron temperature distribution in a 0.3µm MOSFET. Impact ionization rate is based on the carrier temperature. The LDD MOSFET structure simulated in the process simulator Athena and the final structure imported directly into Atlas. The electric field contours superimposed on the plot. S-Pisces 2D Silicon Device Simulator Complete MOS Characterization
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S-Pisces is an advanced 2D device simulator for silicon based technologies that incorporates both drift-diffusion and energy balance transport equations. A large selection of physical models are available which include surface/bulk mobility, recombination, impact ion-ization and tunneling models. Typical applications include MOS, bipolar, and BiCMOS technologies. The capabilities of all the physical models have been extended to deep submicron devices, SOI devices, and non-volatile memory structures.
All measurable electrical parameters can be calculated. For MOS technologies these include gate and drain characteristics, subthreshold leakage, substrate currents, and punchthrough voltage. For bipolar technologies Gummel plots and saturation curves can be predicted. Other important characteristics that can be calculated include breakdown behavior, kink and snapback effects, CMOS latchup, guarding breakdown voltage, low-temperature and high-temperature operation, AC parameters, and intrinsic switching times.
Simulated snapback in the breakdown curve caused by the parasitic bipolar.
Substrate current in a MOSFET calcu-lated using the Energy Balance and clas-sical drift-diffusion models.
Gate C-V plot for a MOS capacitor. Both the high and low frequency responses are demonstrated.
Simulated ID-VD and ID-VGS data. These characteristics may be loaded into Utmost to extract the equivalent BSIM3 or BSIM4 Spice models.
Electron temperature distribution in a 0.3µm MOSFET. Impact ionization rate is based on the carrier temperature.
The LDD MOSFET structure simulated in the process simulator Athena and the final structure imported directly into Atlas. The electric field contours superimposed on the plot.
S-Pisces2D Silicon Device Simulator
S-Pisces is an advanced 2D device simulator for silicon based technologies that incorporates both drift-diffusion and energy balance
Complete MOS Characterization
S-Pisces simulates all aspects of bipolar device performance. DC characteristics such as Gummel plots and Ic vs. VCE are all easy to simulate. Transient calculation of intrinsic switching speeds and fT vs. Ic are performed using the time domain mode of S-Pisces.
Simulated Gummel plot (IC and IB vs VB) and the current gain vs IC.
A bipolar transistor simulated in Athena and imported into Atlas. Voltages were applied to the collector and base contacts to turn the transistor on. The figure illustrates the electron concentration contours and current flow vectors, when the device is operating.
S-, H-, Y-, Z- and ABCD- parameter analyses are supported. The figure above shows a Smith chart with the S11 and S22 parameters plotted on it. TonyPlot displays S-parameters using Smith charts and polar plots.
Characteristics of AC performance to arbitrary high fre-quencies is possible. The figure above shows the cutoff frequency (fT) as a function of collector current. Current gain and other RF figures of merit can also be plotted against frequency.
Intrinsic switching speed of a bipolar transistor by per-forming a transient analysis where the base voltage gets pulsed on.
Simulated IC-VCE characteristics.
Complete Bipolar Characterization
The two figures above show a comparison of electron concentration in the off and on states in a power DMOS device. The left hand figure is for the off state with the gate voltage set to zero. The right hand figure is with a gate voltage well above threshold. The inversion layer can be clearly seen at the surface of the channel.
Enhancements to S-Pisces enable rapid and robust simulation of SOI transistors. Advanced numerical techniques are employed to enable fast calculation of all SOI characteristics including the kink effect. The figure above shows the impact ionization rate and current flowlines in a thin layer SOI transistor.
The figure to the right shows the ID-VD charac-teristics of the above device which illustrates both the kink effect and breakdown.
As an example of a hybrid device, an insulated gate bipolar transistor (IGBT), is shown above. Potential in the on-state and current flowlines are shown. An equal amount of current density flows between each pair of lines. The current flows from the emitter close to the surface, under the gate, and down into the collector contact on the backside.
S-Pisces includes models to support simulation of EPROMs, EEPROMs and FLASH EEPROM cells. Hot carrier injection and Fowler-Nordheim tunneling are used to charge and discharge the floating gate. The figure (above) illustrates potentials and ionization rate in a FLASH EEPROM cell prior to programming. The complex geometry is imported automatically from Athena. EEPROM device design curves are shown in the figures to the right. These show programming time vs. drain volt-age, erasing time vs. gate oxide thickness and a programming ID/VDS curve showing punchthrough.
Advanced Device Structures
Mobility reduction for high-k materials due to remote Coulomb scattering and remote phonon scattering.
Breakdown voltages of power devices are improved using multiple guard ring structures. S-Pisces simulates the floating regions and allows the optimiza-tion of the numbers and spacings of guard rings. The figure above shows a structure with two guard rings which act to spread out the potential contours, thereby reducing the electric field and increasing the breakdown voltage.Using cylindrical symmetry, 3-D guard ring structures can be modeled. Another common technique to increase breakdown voltages is the use of floating field plates. These can be simulated in S-Pisces using models similar to EPROM floating gates.
Technical Specifi cationsS-Pisces calculate DC, AC and time-domain solutions for general nonplanar 2-D silicon based device structures. The device structures may be specified by the user, or from the output of a process simulator such as Athena. S-Pisces incor-porates both drift-diffusion and energy-balance transport models, and provides many advanced mobility models. S-Pisces includes models for Shockley-Read-Hall and Auger recombination, band-gap narrowing, impact ionization, band-to-band tunneling, Fowler-Nordheim tunneling, non-local tunneling, hot carrier injection, Ohmic and Schottky contacts, and floating gates.
Comparison of in-plane and perpendicular electron mobilities in strained silicon on SiGe.
