SAM4E-EK User Guide 42067A−SAM4E−01/2013
2
Table of Contents
1. Introduction .......................................................................................... 3 1.1 Scope ............................................................................................................... 3 1.2 User guide ......................................................................................................... 3 1.3 References and applicable documents ............................................................. 3
2. Kit Contents ......................................................................................... 4 2.1 Deliverables ...................................................................................................... 4 2.2 Electrostatic warning ......................................................................................... 5
3. Power up .............................................................................................. 6 3.1 Power up the board ........................................................................................... 6 3.2 Source code and technical support ................................................................... 6
4. Board Description ................................................................................ 7 4.1 Board overview ................................................................................................. 7 4.2 Features list ...................................................................................................... 8 4.3 Function blocks ................................................................................................. 9
4.3.1 Processor ............................................................................................ 9 4.3.2 Memory ............................................................................................. 9 4.3.3 Clock circuitry ................................................................................... 10 4.3.4 Reset circuitry ................................................................................... 10 4.3.5 Power supply and management ....................................................... 11 4.3.6 UART ........................................................................................... 12 4.3.7 USART ........................................................................................... 12 4.3.8 RS485 ........................................................................................... 13 4.3.9 Ethernet MAC 10/100 (EMAC) .......................................................... 13 4.3.10 CAN ........................................................................................... 14 4.3.11 Display interface ............................................................................... 14
4.3.11.1 LCD module .................................................................... 14 4.3.11.2 Backlight control .............................................................. 15
4.3.12 Touch screen interface ..................................................................... 16 4.3.13 JTAC/ICE .......................................................................................... 16 4.3.14 Audio Interface .................................................................................. 17 4.3.15 USB device ....................................................................................... 17 4.3.16 Analog interface ................................................................................ 18
4.3.16.1 Analog reference ............................................................. 18 4.3.16.2 Analog input .................................................................... 18 4.3.16.3 Analog output .................................................................. 19
4.3.17 QTouch elements ............................................................................. 20 4.3.18 LEDs ........................................................................................... 20 4.3.19 SD/MMC card ................................................................................... 21 4.3.20 ZigBee ........................................................................................... 21 4.3.21 PIO expansion .................................................................................. 21
5. Configuration ...................................................................................... 23 5.1 PIO usage ....................................................................................................... 23 5.2 Jumpers .......................................................................................................... 26
6. Schematics ........................................................................................ 27
7. Revision History ................................................................................. 36
SAM4E-EK User Guide 42067A−SAM4E−01/2013
3
1. Introduction
1.1 Scope This user guide introduces the SAM4E-EK Evaluation Kit (SAM4E-EK) and describes its development and debugging capabilities.
Figure 1-1. Atmel SAM4E-EK board.
1.2 User guide This guide gives details on how the Atmel® SAM4E-EK has been designed. It is made up of six chapters:
• Chapter 1 includes references, applicable documents, acronyms and abbreviations
• Chapter 2 describes the kit contents, its main features
• Chapter 3 provides instructions to power up the SAM4E-EK and describes how to use it
• Chapter 4 describes the hardware resources including default jumper and switch settings and the schematics
• Chapter 5 provides all the board schematics
• Chapter 6 provides troubleshooting instructions
1.3 References and applicable documents
Table 1-1. References and applicable documents.
Reference Title Comment
Lit. no.: 11157 SAM4E datasheet www.atmel.com
SAM4E-EK User Guide 42067A−SAM4E−01/2013
4
2. Kit Contents
2.1 Deliverables The Atmel SAM4E-EK toolkit contains the following items:
• An Atmel SAM4E-EK board
• Power supply
• Universal input AC/DC power supply with US, Europe and UK plug adapters
• One USB cable
• One serial RS232 cable
• One Ethernet cross cable
• A welcome letter
Figure 2-1. Unpacked SAM4E-EK.
Unpack and inspect the kit carefully. Contact your local Atmel distributor if you have issues concerning the contents of the kit.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
5
2.2 Electrostatic warning The Atmel SAM4E-EK board is shipped in a protective anti-static bag. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the components or any other metallic element of the board.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
6
3. Power up
3.1 Power up the board Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug adapter corresponding to that of your country, and insert it into the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power socket.
The board LCD should light up and display a welcome page. Then click or touch the icons displayed on the screen and enjoy the demo.
3.2 Source code and technical support After boot up, you can run some sample code or your own application on the development kit. You can download sample code and get technical support from the Atmel web site: http://www.atmel.com.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
7
4. Board Description
4.1 Board overview This chapter introduces the Atmel SAM4E-EK Evaluation Kit design. It introduces system-level concepts, such as power distribution, memory, and interface assignments.
The SAM4E-EK board is based on the integration of an ARM® Cortex™-M4 processor with on-board NAND Flash and a set of popular peripherals. It is designed to provide a high performance processor evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM4E-EK block diagram.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
8
4.2 Features list The list of the main board components and interfaces:
• SAM4E16 chip BGA144 package with optional socket footprint
• 12MHz crystal
• 32.768kHz crystal
• Optional SMB connector for external system clock input
• NAND Flash
• 2.8 inch TFT color LCD display with touch panel and backlight
• UART port with RS232 driver
• USART port with RS232 driver multiplexed with RS485 function with driver
• CAN port with driver
• Mono/stereo headphone jack output
• SD/MMC interface
• Reset button: NRST
• User buttons: WAKU, TAMP, Scroll-up, Scroll-down
• QTouch® buttons: Left, Right and Slider
• Full Speed USB device port
• JTAG/ICE port
• On-board power regulation
• Three user LEDs
• Power LED
• BNC connector for ADC input
• BNC connector for DAC output
• User potentiometer connected to the ADC input
• ZigBee® connector
• PIO connection interfaces (PIOA, PIOC and PIOD with 32-bit, PIOB with 16-bit PIOE with 6-bit)
SAM4E-EK User Guide 42067A−SAM4E−01/2013
9
4.3 Function blocks
4.3.1 Processor The Atmel SAM4E-EK is equipped with a SAM4E16 device in BGA144 package.
4.3.2 Memory The SAM4E16 chip embeds:
• 1024kB of embedded Flash
• 128kB of embedded SRAM
• 16kB of ROM with embedded boot loader routines (UART, USB) and In-Application Programming functions (IAP) routines
The SAM4E16 features an External Bus Interface (EBI) that permits interfacing to a broad range of external memories and virtually to any parallel peripheral.
The SAM4E-EK board is equipped with one NAND Flash MT29F2G08ABAEA on the EBI. This can change to other type of flash by setting the Static Memory Controller.
Figure 4-2. NAND-Flash.
R132 47K
R131 0R
C92100nF
MN10
WE18
N.C66
VCC37
CE9
RE8
N.C1120
WP19
N.C55
N.C11
N.C22
N.C33
N.C44
N.C1221
N.C1322
N.C1423
N.C1524
R/B7
N.C1726
N.C1827N.C1928
I/O029
N.C2134N.C2235
VSS36
PRE38N.C2339
VCC12
VSS13
ALE17
N.C811 N.C710
N.C914
N.C1015
CLE16
N.C1625
N.C2033
I/O130
I/O332I/O231
N.C2747
N.C2646
N.C2545
I/O744I/O643I/O542I/O441
N.C2440
N.C2848
R12547K
MT29F2G08ABAEA
R12647K
C93100nF
C941uF
R133DNP
+3V3
+3V3 +3V3 NAND FLASH
+3V3
PC18PC7
PC14
PC4PC5PC6
PC1PC2PC3
PC0
PC9PC10
PC16PC17
J37-2
NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can disconnect it from the on-board memories, thereby letting NCS0 free for other custom purposes.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
10
4.3.3 Clock circuitry The clock generator of a SAM4E16 microcontroller is composed of:
• A low-power 32.768Hz Slow Clock Oscillator with bypass mode
• A 3 to 20MHz Crystal Oscillator, which can be bypassed (12MHz needed in case of USB)
• A factory programmed fast internal RC Oscillator. Three output frequencies can be selected: 4 (default value), 8 or 12MHz
• A 80 to 240MHz PLL (PLLB) providing a clock for the USB Full Speed Controller
• An 80 to 240MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and to the peripherals. The input frequency of PLLA is from 3 to 32MHz
The SAM4E-EK board is equipped with one 12MHz crystal, optional Piezoelectric Ceramic Resonator 12MHz (Murata ref. CSTCE12M0G15L99-R0), one 32.768Hz crystal and an external clock input connector.
Figure 4-3. External clock source.
C22 18pF
C31 15pF
J2SMB
12 3
54
R5 DNP
R649.9R 1%
R11 0R
Y2
12
3
C27 18pF
R7 DNP
PA7
PA8
R12 DNP
PB9
PB8
R3 0R
Y1 32.768 kHz
Y312MHz
1 234
R8 0R
R4 0R
C28 15pF
4.3.4 Reset circuitry On-board NRST button BP1 provides an external reset control of the SAM4E16.
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide a reset signal out to the external components. Conversely, it can be asserted low from the outside to reset the microcontroller Core and the peripherals. The NRST pin integrates a permanent pull-up resistor of 100kΩ to VDDIO.
On the SAM4E-EK board, the NRST signal is connected to the LCD module and JTAG port.
Note: At power-on, the NRST signal is asserted with default duration of two clock cycles. That duration may not be sufficient to correctly reset any other system or board devices connected to that signal. First, in your custom application, you need to check for these device’s datasheets about reset duration requirements. Then, you need to set an appropriate configuration in the NRST Manager. This is done through the ERSTL field in the RSTC_MR register. The NRST duration is thereby configurable between 60μs and 2s, whether it is subsequently activated by a software reset or a user reset. Refer to the SAM4E16 datasheet for in-depth information.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
11
4.3.5 Power supply and management The Atmel SAM4E-EK board is supplied with an external 5V DC block through input J1. It is protected by a PolyZen diode (MN2) and an LC combinatory filter (MN3). The PolyZen is used in the event of an incorrect power supply connection.
The adjustable LDO regulator MN4 is used for the 3.3V rail main supply. It powers all the 3.3V components on the board.
Figure 4-4. Power block.
+3V3
+ C29100uF-TAN-6.3V
R9169K 1%
+5V
MN4MIC29302
VIN2
VOUT4
SD1
GN
D1
3
ADJ5
GN
D2
6
R10102K 1%
C30100nF
+ C2422uF
J1Power Jack 2.1mm
12
3 + C2522uF
MN2ZEN056V130A24LS
1
2
3
MN3BNX002-01
SV1
SG2
CV3
CG14
CG25
CG36
+5V
C23100nF
+ C26220uF-ELE-16V
The SAM4E16 product has different types of power supply pins:
• VDDIN pin: Power for the internal voltage regulator, ADC, DAC, and analog comparator power supplies. The voltage ranges from 1.6V to 3.6V.
• VDDIO pins: Power for the Peripherals I/O lines. The voltage ranges from 1.62V to 3.6V.
• VDDOUT pin: Output of the internal voltage regulator.
• VDDCORE pins: Power for the core, including the processor, embedded memories, and peripherals. The voltage ranges from 1.08V to 1.32V.
• VDDPLL pin: Power for the PLL A, PLL B and 12MHz oscillator. The voltage ranges from 1.08V to 1.32V. Note: VDDPLL should be decoupled and filtered from VDDCORE.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
12
4.3.6 UART The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to the DB9 male connector J7.
Figure 4-5. UART.
R58100K
C54100nF
R62 0R
TP4
MN7ADM3202
T1IN11
T2IN10 R1OUT12
R2OUT9
T1OUT14
T2OUT7R1IN13
R2IN8
V+2
C1+1
C1-3
C2+4
C2-5
V-6
VCC16
GND15
J7
5
4
3
2
1
9
8
7
6
10 11
C53100nF
C57100nF
TP5
R60 0R
C55100nF
R59100K
C56100nF
+3V3
+3V3
FGND
+3V3
PA9PA10UTXD0
URXD0
DBGU
4.3.7 USART The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal synchronous/asynchronous serial link. The data frame format is extensively configurable (data length, parity, number of stop bits) to support a broad range of serial communication standards. The USART is also associated with PDC channels for TX/RX data access.
To avoid any electrical conflict, the RS232 and RS485 transceiver are isolated from the receiving line PA21.
• Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level
• Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level
Figure 4-6. USART.
RXD1
PA21
PA21_232
C46100nF
C44100nF
R37 0R
C48100nF
R40 0R
R42 0R
J5
5
4
3
2
1
9
8
7
6
10 11
R44 0R
MN5ADM3312EARU
C1+6
C1-20
C2+2
C2-4
C3+24
C3-22
VCC3
V+1
V-21
GND23
SD19
EN5
T1IN7
T1OUT18
R1IN15
R1OUT10
T2IN8
T2OUT17
R2IN14
R2OUT11
T3IN9
T3OUT16
R3IN13
R3OUT12
C49100nF
R39 0R
R41 0R
C45100nF
R3847K
C434.7uF
TXD1
R43 47K
C47100nF
PA21_485 FGND
+3V3
+3V3
+3V3
PA25PA24RTS1PA21_232
CTS1
PA22
USART1
PA23
JP11
1
2
3
SAM4E-EK User Guide 42067A−SAM4E−01/2013
13
4.3.8 RS485 As noticed above the USART1 is shared with the RS485 port, connected to the transceiver MN6 and output to the 3-point connector J6. The design includes selectable jumpers for RS485 bus termination resistors selection (JP10, JP12, and JP13).
Figure 4-7. RS485.
PA25
JP13
R52DNP
PA21_485JP10
R50 0R
R48 0R
R51120R
J61
2
3
R47 0R
R45DNP
R4610K
C52100nF
R49 0R
MN6ADM3485ARZ
RO1
RE2
DE3
DI4
VCC8
GND5
A6
B7
+3V3
+3V3
+3V3
FGND
JP12
TXD1
RXD1
CTS1 RTS1
PA22
RS 485
PA24
4.3.9 Ethernet MAC 10/100 (EMAC) The EMAC module implements a 10/100 Ethernet MAC compatible with the IEEE® 802.3 standard using an address checker, statistics and control registers, receive and transmit blocks, and a DMA interface.
The Atmel SAM4E-EK is equipped with a MICREL KSZ8051MNL 10/100 Mbps Fast Ethernet Physical Layer transceiver. It contains the entire physical layer functions of 100BASE-TX as defined by IEEE 802.3u.
The Ethernet interface provides MII for 100Base-TX or 10Base-TX. The MII interfaces are capable of both 10Mb/s and 100Mb/s data rates as described in the IEEE 802.3u standard. The Ethernet interface integrates an RJ45 connector with an embedded transformer, and two status LEDs.
Figure 4-8. Ethernet block.
FGND
ETH1_XI
ETH1_XO
Y425MHz
1 234
C79 100nF
R108
4.7K
R107
4.7K+3V3
+3V3
R111 0R
C86 22pF
R109
470R
R1120R
C76100nF
R110
470R
GND_ETH
RXDV
RJ45 ETHERNET CONNECTOR
C77 2.2uF
At the De-Assertion of Reset: PHY ADD[2:0]:001 CONFIG[2:0]:000,Mode:MII Duplex Mode:Half Duplex Isolate Mode:Disable Speed Mode:100Mbps Nway Auto-Negotiation:Enable
ETH PHY
C82
100nF
C85 22pF
GND_ETH
R85 22R
R104 22R
GND_ETH
R105 22R
R86 22RR87 22RR88 22RR89 22RR90 22RR91 22RR92 22RR93 22RR94 22RR96 22RR98 22R
COL
E1_RXCK
RXER
E1_CRS
TXD3
R84 22R
C78100nF
TXD2
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J20J00-0061
1
2
7
8
3
6
5
4
13 14
9
10
11
12
RXC
TXD0TXD1
E1_COL
PD3
PD14
PD7
PD2
RXD0
PD12 RXD3
PD[0..31]
PD11
FGND
ETH1_XO
R99 22R RXM
RXP
TXP
+3V3
TXM
CT_TX
CT_RX
L5220ohm at 100MHz
1 2
RXD2
NRST
C8110uF
C8310uF
+3V3
TXC
ETH1_XI
R100 22R
MN9
KSZ8051MNL
RXC/B-CAST_OFF19
CRS/CONFIG129
COL/CONFIG028
TXD125
TXD024
TXEN23
RXD3/PHYAD013
RXD2/PHYAD114
RXD1/PHYAD215
RXD0/DUPLEX16
RXDV/CONFIG218 RXER/ISO20
MDC12
MDIO11
INTRP/NAND21
VDDA_3V33
VDDIO17
RESET32
TXP7
TXM6
RXP5
RXM4
VDD_1V22
GND1
PADDLE33
TXC22
TXD226 TXD327
REXT10
XO8
XI9
LED0/NWAYEN30
LED1/SPEED31
RR44.7k
1 2 3 45678
PD16
PD4
PD15
E1_TXCKTXENPD1
PD28PD9
PD5PD6
PD8
E1_RXDV
PD0
E1_TX0
E1_RX1E1_RX0
E1_MDCE1_MDIO
E1_TXEN
INT_ETH1
E1_RXER
+3V3
RR34.7k
1 2 3 45678
E1_TX1
C84
100nF
E1_TX2
FGND
PD10
E1_TX3
E1_RX2E1_RX3
PD13
RXD1
CRS
R103 22R
E1_AVDDT R106 6.49K
R102 4.7KR101 4.7K
SAM4E-EK User Guide 42067A−SAM4E−01/2013
14
4.3.10 CAN The CAN controller provides all the features required to implement the serial communication protocol CAN defined by Robert Bosch GmbH, the CAN specification as referred to by ISO/11898A (2.0 Part A and 2.0 Part B) for high speeds and ISO/11519-2 for low speeds. The CAN Controller is able to handle all types of frames (Data, Remote, Error and Overload) and achieves a bit rate of 1Mbit/sec.
The Atmel SAM4E has two CAN Controller with eight Mailboxes.
SAM4E-EK connects the CAN0 and CAN1 bus to the CAN transceiver SN65HVD234 (MN11 and MN12).
The extension connector (J13 and J14) type is RJ12 female socket.
Figure 4-9. CAN block.
R140
10K
(CANRX0)
R13410K
C96100nF
(CANTX0RS)PE0
J13
CAN RJ12
11
22
33
44
55
66
+ C9510uF
R135 0R
PE1
PB3
+3V3
R138 0R(CANRX0EN)
R139 0R+3V3
Rs
D
EN
R
CANH
CANL
VCCGND
MN11
SN65HVD234
2 3
7
6
4
1
5
8
(CANTX0)
R137120R
JP28
R151
10K
(CANRX1)
R14110K
C99100nF
(CANTX1RS)PE2
PC15
J14
CAN RJ12
11
22
33
44
55
66
+ C9810uF
R142 0R
PE3
PC12
R143 0R
R149 0R
+3V3
(CANRX1EN)
R150 0R+3V3
Rs
D
EN
R
CANH
CANL
VCCGND
MN12
SN65HVD234
2 3
7
6
4
1
5
8
(CANTX1)
CAN1
R148120R
JP29
CAN0
PB2 J37-6
4.3.11 Display interface The SAM4E-EK carries a TFT transmissive LCD module with touch panel, FTM280C34D. Its integrated driver IC is ILI9325. The LCD display area is 2.8 inches diagonally measured, with a native resolution of 240 x 320 dots.
4.3.11.1 LCD module The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port and the push-button BP1. The LCD chip select signal is connected to NCS1; the jumper JP8 can disconnect it so that this PIO line is available for other custom usage.
The SAM4E16 communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol data bus has to be implemented in software.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
15
Figure 4-10. LCD block.
LCD_DB3
Six slots on PCB for LCD shield
PC11
R14DNP
D1DNP
TVS, SOT23-5
1
2
345
R18 0R
C34100nF
R15DNP
RR2DNP
12345
678
LED_A
J3FH26-39S-0.3SHW
VDD1
DB172
DB163
DB154
DB145
DB136
DB127
DB118
DB109
DB910
DB811
DB712
DB613
DB514
DB415
DB316
DB217
DB118
DB019
VDD20
RD21
WR22
RS23
CS24
RESET25
IM026
IM127
GND28
LED-A29
LEDK130
LEDK231
LEDK332
LEDK433
Y+34
Y-35
X+36
X-37
NC38
GND39
R1347K
R174.7K
C32
10uF
R1610K
C33100nF
PINsonBOT
PIN 39
PIN 1
Z7
FTM280C34D
RR1DNP
12345
678
+3V3
+3V3
PC[0..31]
NRST
PA[0..31]
LCD_DB2
JP8
PC8
LCD_DB0
PD[0..31]
LCD
LCD_DB4
PD18
4.7k
NOT POPULATED
The part is placed as close as possible to J4
LCD_DB9
LCD_DB13LCD_DB12LCD_DB11LCD_DB10
LCD_DB16LCD_DB15LCD_DB14
LCD_DB17
LCD_DB5
PC2PC1PC0
PC3
X_LEFT
LCD_DB9
4.7k
PC6PC5PC4
PC7
X_RIGHT
LCD_DB7
Y_DOWN
LCD_DB8
Y_UP
4.7k
LCD_DB6
4.7k
LCD_DB6LCD_DB7
LED_K4
LCD_DB8
LCD_DB4LCD_DB5
LED_K3LED_K2
LCD_DB2LCD_DB3
LCD_DB1
LED_K1
NRST
LCD_DB0LCD_DB1
PC19
4.3.11.2 Backlight control The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by an AAT3155 charge pump, MN15. The AAT3155 is controlled by PC13; the 0Ω resistor R24 is mounted in series on this line, which permits to use it for other custom purposes. In that case, the pull-up resistor R20 maintains the charge pump permanently enabled by default.
On the anode drive line, a 0Ω resistor R18 is implemented in series for an optional current limitation.
Figure 4-11. Backlight control.
TP1R240R
C351uFR20
47K
C384.7uF
C361uF
MN15AAT3155ITP-T1
C1+10
C1-9
EN/SET11
C2+7
C2-6
OUTCP8
IN5
GND4
D13
D22
D31
D412
C371uF
FB1 BN03K314S300R
+3V3
+3V3 LED_A
LED_K1
LED_K4LED_K3LED_K2
PC13
LCD BACKLIGHT
SAM4E-EK User Guide 42067A−SAM4E−01/2013
16
4.3.12 Touch screen interface The LCD module integrates a 4-wire touch panel controlled by MN16 (ADS7843) which is a slave device on the SAM4E16 SPI bus. The controller sends back the measurement information about the X and Y positions as a pressure is applied to the touch panel. The touch panel can be used with either a stylus or a finger.
The ADS7843 touch panel controller connects to the SPI interface via the NPCS0 control signal. Two interrupt signals are connected and provide events information back to the microcontroller: PenIrq and Busy.
Note: PenIrq (PA16) is shared with ZigBee signal ZIGB_MISC. Busy (PA17) is shared with ZigBee signal ZIGB_IRQ. Therefore, if using a ZigBee interface in concurrence with the Touch Screen controller, take care not to have both drivers enabled at the same time on either PA16 or PA17.
Figure 4-12. Touch panel control.
R290R
R261RC39
100nF
R22 0R
MN16ADS7843E
XP2
YP3
XM4
YM5
DCLK16
DIN14
DOUT12
CS15
BUSY13
PENIRQ11
VREF9
VCC11
VCC210
GND6
IN37
IN48
R19100K
R28100K
L2 10uH-150mA
TP3
C40100nF
TP2R23 0R
C41100nF
C424.7uF
R27100K
R25 0R
R21100K
+3V3
+3V3
+3V3
AGND_TP AGND_TPLCD TOUCH SCREEN
PA14PA13PA12
PA11
PA17
X_RIGHT
Y_DOWNX_LEFTY_UP
PA16
JP9
4.3.13 JTAC/ICE A standard 20-pin JTAG/ICE connector is implemented on the Atmel SAM4E-EK for the connection of a compatible ARM JTAG emulator interface, such as the SAM-ICE™ from Segger.
Note that the NRST signal is connected to BP1 system button and is also used to reset the LCD module. The 0Ω resistor R61 may be removed in order to isolate the JTAG port from this system reset signal.
Figure 4-13. JTAG interface.
R56100K J8
HE10 20PTS
VTref1
Vsupply2
nTRST3
GND14
TDI5
GND26
TMS7
GND38
TCK9
GND410
RTCK11
GND512
TDO13
GND614
nSRST15
GND716
DBGRQ17
GND818
DBGACK19
GND920
R57100K
R61 0R
R53100K
R54100K
R55100K
+3V3
PB6PB4
NRST
ICE INTERFACE
PB5
PB7
SAM4E-EK User Guide 42067A−SAM4E−01/2013
17
4.3.14 Audio Interface The Atmel SAM4E-EK evaluation kit supports mono/stereo audio driven by a TPA0223 audio amplifier connected to two DAC channels of the microcontroller.
The TPA0223 is a 2W mono Bridge-Tied-Load (BTL) amplifier designed to drive speakers with as low as 4Ω impedance. The amplifier can be reconfigured on the fly to drive two stereo Single-Ended (SE) signals into head phones.
Figure 4-14. Headphone output.
JP17
JP15
PB14JP18
1
2
3
AUDIO_OUTL
JP14
1
2
3
J912
DAC0R67 33K
J10Phonejack Stereo 3.55
4321
+C62 220uF-TAN-6.3V
+C58 220uF-TAN-6.3V
R64 1K
R63 1K
R71 47KC65 0.47uF
AGND
AGND
AUDIO OUT
PB13
C591uF
C61100nF
TP6Test Pad SQ-40TH
R72 33K
C63 0.47uF
C67 0.47uF
MN8TPA0223DGQ
VDD3
RIN5
MONO-IN1
LIN9
LO/MO-10
RO/MO+6
ST/MN7
SHUTD0WN2
BYPASS4
GND8
PAD
11
+ C6010uF
C64 0.47uF
VDD_AMP
R70 100K
R68 100K R69 100K
AGND
AGND
AGND
AGND
VDD_AMP
C661uF
+5V
R65 33K
AGND
R66 47K
FB2BN03K314S300R
+3V3
AGND
JP16
R73 0R
Using a readily available 1/8-in. (3.5mm) stereo headphone jack, the control switch (pin4 and pin5 in J10) is closed when no plug is inserted. When closed, a 100kΩ/1kΩ divider pulls the ST/MN input low. When a jack plug is inserted, the 1kΩ resistor is disconnected and the ST/MN input is pulled high. The mono speaker (J9 connector) is also physically disconnected from the RO/MO+ output so that no sound is heard from the speaker while the headphones are inserted.
When works as stereo mode make sure JP15, JP16, and JP17 are disconnected.
4.3.15 USB device The SAM4E16 UDP port is compliant with the Universal Serial Bus (USB) rev 2.0 Full Speed device specification. J11 is a micro B-type receptacle for USB device.
Both 27Ω resistors R82 and R83 build up 90Ω differential impedance together with the (embedded) 6Ω output impedance of the SAM4E16 full speed channel drivers.
R80 and R81 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets lowered to a PIO compatible 3.3V level) through PC21.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
18
Figure 4-15. USB.
C7510pF
R83 27R
RV1V5.5MLA0603
PC21
FGND
PB10
RV2V5.5MLA0603
USB
5V D- D+ ID G
J11TBD USB Micro B
1 2 3 4
7
5
689
10 11
R81 68K
R80 47K
FGND
R82 27R
PB11
4.3.16 Analog interface
4.3.16.1 Analog reference The 3.0V voltage reference is based on a LM4040 (Precision Micropower Shunt Voltage Reference).
This ADVREF level can be set as 3.0V or 3.3V via the jumper JP3.
Figure 4-16. Analog Vref.
R12.2K
+5V
MN1
LM4040AIM3X-3.0
+3V3
C14
1uF
C13
100nF
ADVREFJP3
1
2
3
4.3.16.2 Analog input • The BNC connector CN2 is connected to the AEF0_AD4 or AFE1_AD0 (selected by JP40) as a single external
analog input
• The BNC connectors CN3, CN4 are connected to AFE0_AD10 and AFE0_AD11 as a differential external analog input. A low pass filter is optional by close 1-2 pins of JP21, JP22, JP24, and JP25
• Each BNC input has an on-board 50Ω resistor termination that can be applied by closing jumper JP20, JP23 or JP26
• A 10kΩ potentiometer (VR1) is also connected to the AFE0_AD5 implement an easy access to ADC programming and debugging (or implement an analog user control like display brightness, volume, etc.)
SAM4E-EK User Guide 42067A−SAM4E−01/2013
19
Figure 4-17. ADC/AFE input.
CN3
BNC
CN4
BNC
JP401
2
3
PB0
R7649.9R
CN2
BNC
JP23
ADC / AFE
C6810nF
PB1
PotentiometerClockwise 2-->3
VR110K VR
13
2
+3V3
JP22
1
2
3
C72
680pF
(AFE0_AD10)
(AFE0_AD11)
C73
680pF
L3 220uH
L4 220uH
R78
600R
R7749.9R
JP21
1
2
3
JP24
1
2
3
JP25
1
2
3
PC31
PC30
C714.7nF DNP
C744.7nF DNP
C7010nF
(AFE1_AD0, need open JP41)
(AFE0_AD5)
PB2
(AFE0_AD4)
JP20
JP26
R7949.9R
4.3.16.3 Analog output The BNC connector CN1 is connected to the DAC port PB14 and provides an external analog output. An on-board 50Ω resistor termination can be enabled by closing jumper JP21. A filter can be implemented on this output channel by replacing R74 and C69 with appropriate resistor and capacitor values, depending on the application requirements.
Figure 4-18. DAC output.
JP19
R7549.9R
PB14
C69 2.2uF
R740R DAC1
CN1BNC
JP18
1
2
3
SAM4E-EK User Guide 42067A−SAM4E−01/2013
20
4.3.17 QTouch elements QTouch keys consist in a series of sensors formed by the association of a copper area and the capacitive effect of human fingers approaching it.
Keys The Atmel SAM4E-EK implements two individual capacitive touch keys (RIGHT, LEFT).
Slider A group of channels forms a Slider. A Slider is composed of eight channels for a QTouch acquisition method. Such a sensor is used to detect a linear finger displacement on a sensitive area. A typical implementation is volume control.
Figure 4-19. QT_Slider.
R122
2.2K
R123
2.2K
Qtouch
R114 1KC89
100nF
C91 4.7nF
R115 1KR116 1K
PE4
QKEY
K2 12
R118 1KR119 1KR120 1KR121 1K
PA4
MN17
AT42QT2160
VDD3
VDD16
VDD17
RST25
SDA23
SCL24
CHANGE7
I2C_A021
I2C_A122
VREF8
VSS4
VSS18
X010X111X212X313X414X515X65X76
GPIO21
GPIO32
GPIO128
Y1A27
Y1B20
Y0A26
Y0B19
SMP9
PAD29
QKEY
K1 12
+3V3
R128 1K
R127 1K
FB3BN03K314S300R
R124
10K
Slid
er
S1
X6
X5
X4
X3
X2
X1
X0
Y0
+3V3
C88
1uF
C87
100nF
C90 4.7nF
R129
1M
R117 10K
R130
1M
PA3
4.3.18 LEDs There are three LEDs on the SAM4E-EK board:
• A blue LED (D2), amber LED (D3) and a green LED (D4), which are user defined and controlled by the GPIO
• A red LED (D5), which is a power LED indicating that the 3.3V power rail is active. It is also controlled by the GPIO and can be treated as a user LED as well. The only difference with the two others is that it is controlled through a MOS transistor. By default, the PIO line is disabled; a pull-up resistor controls the MOS to light the LED when the power is ON
Figure 4-20. LEDs.
PWM PD20
+3V3
PD21 D4 LED Green
D5 LED Red
R157470R
R158470R
R160470R
R159 100K
D3 LED Amber
Q1IRLML2502
1
32
LEDS
PD22
PWM
POWER
PA0R154470R D2 LED BlueTIMER
SAM4E-EK User Guide 42067A−SAM4E−01/2013
21
4.3.19 SD/MMC card The Atmel SAM4E-EK has a high-speed 4-bit multimedia MMC interface, which is connected to a 4-bit SD/MMC micro card slot featuring a card detection switch.
Figure 4-21. SD card.
PD23
VDD_MCI
R1610RDNP
Q2IRLML6402
1
32
R1624.7k
+3V3
R33 0R
VDD_MCI
PA28
R3110K
R32 0R
C51100nF
+ C5010uF
R34 0R
RA168Kx4
12345 6 7 8
R3010K
R36 0R
J4TF01A
DAT21
DAT32
CMD3
VCC4
CLK5
VSS6
DAT07
DAT18
GND10
CD9
Sh111
Sh212
Sh313
R35 0R
PA6
SD POWER CTRL
PA29
PA30PA31
PA26PA27
SD CARD
4.3.20 ZigBee The SAM4E-EK has a 10-pin male connector for the RZ600 ZigBee module.
Note: 0Ω resistors have been implemented in series with the PIO lines that are used elsewhere in the design, thereby enabling their individual disconnection, should a conflict occur in your application.
Figure 4-22. ZigBee interface.
JP36
R152 0R
J19HE10 5x2
1 23 45 67 89 10
R155 0RMOSI
MISOSPIO_NPCS3#IRQ_ZBEE
MISC_ZBEESLP_TR
SPCK
C10018pF
C1012.2nF
PA13
C1022.2uF
PA16ZB_RSTN
PA14PA12PA5
R153 0R
+3V3
PA17PA18
ZIGBEE
R156 0R PA15
4.3.21 PIO expansion The SAM4E-EK product features three PIO controllers, PIOA, PIOB, PIOC and PIOD, which are multiplexed with the I/O lines of the embedded peripherals. Each PIO Controller controls up to 32 lines (15 for PIOB and 6 for PIOE).
Expansion ports J15, J16, J17 and J18 provide PIO lines access for customer usage.
SAM4E-EK User Guide 42067A−SAM4E−01/2013
22
Figure 4-23. PIO expansion.
PC28
PD25
+3V3 +3V3
PD1PD0
PD3PD4
PD2
PD6PD5
PD9
PD7PD8
PD10PD11PD12
PD14PD15
PD19
PD17
PD13
PD21
PD16
PD20
PD18
J151 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
PD[0..31]
PC29
PD26
PIO D
PC30
PD27
PC31
PD28PD29
JP341
2
3
PD30PD31
JP331
2
3+5V +3V3
PA0
J181 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
PA1
JP321
2
3+3V3+5V
PA2
PE[0..5]
PA3PA4
PB12
PA5
PB13PB14
PC22
JP311
2
3+5V +3V3
PC23
PA18PA19
+5V
+3V3 +3V3
PIO A
+3V3
PA20
+3V3 +3V3 +3V3
PC24
+3V3
PC0
PC2PC1
PC4PC5
PC3
PC6
J171 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
PC7PC8PC9
PC11PC12
PC15
PC10
PC17
PC13PC14
PC16
PC20PC19
PB6PC21
PB3
PB7
PC18
PD22
PB4
PB0PB1
PB5
PB2PE1
PE3PE4
PE0
PE5
PA13
PE2
PA9
PA11
PA14
PC25
PA15
PA6
PA12
PA10PA27
PA23
PA25
PA22
PA24
PA29PA30
PA21
PA28
PA31
PA26
J161 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
PC[0..31]
PA[0..31]
PB[0..14]
PIO C
PA16
PIO B & PIO E
PC26
PA17
PD23PD24
PC27
SAM4E-EK User Guide 42067A−SAM4E−01/2013
23
5. Configuration This chapter describes the PIO usage, the jumpers, the test points and the solder drops of an Atmel SAM4E-EK board.
5.1 PIO usage
Table 5-1. PIO Port A pin assignments and signal descriptions.
IO line Peripheral A Peripheral B Peripheral C Extra function SYSIO and GPIO
Comments
PA0 PWMH0 TIOA0 A17 WKUP0 LED_TIMER (Blue) PA1 PWMH1 TIOB0 A18 WKUP1 BUTTON_SCROLL-UP PA2 PWMH2 DATRG WKUP2 BUTTON_SCROLL-DOWN PA3 TWD0 NPCS3 QTouch_SDA PA4 TWCK0 TCLK0 WKUP3 QTouch_SCL PA5 NPCS3 URXD1 WKUP4 ZIGB_SEL#, SPI FLASH_CS# PA6 PCK0 UTXD1 SD_CD PA7 PWMH3 XIN32 XIN32 PA8 AFE0_ADTRG WKUP5 XOUT32 XOUT32 PA9 URXD0 NPCS1 PWMFI0 WKUP6 DBGU_ROUT PA10 UTXD0 NPCS2 DBGU_TIN PA11 NPCS0 PWMH0 WKUP7 TOUCH_CS# PA12 MISO PWMH1 TOUCH_DOUT, ZIGB_MISO,
SPI FLASH_SO PA13 MOSI PWMH2 TOUCH_DIN, ZIGB_MOSI,
SPI FLASH_SI PA14 SPCK PWMH3 WKUP8 TOUCH_DCLK, ZIGB_SCLK,
SPI FLASH_SCK PA15 TIOA1 PWML3 WKUP14/PIODCEN1 ZIGB_SLP_TR PA16 TIOB1 PWML2 WKUP15/PIODCEN2 TOUCH_PENIRQ#,
ZIGB_MISC PA17 PCK1 PWMH3 AFE0_AD0 TOUCH_BUZY, ZIGB_IRQ PA18 PCK2 A14 AFE0_AD1 ZIGB_RST# PA19 PWML0 A15 AFE0_AD2/WKUP9 BUTTON_WAKU PA20 PWML1 A16 AFE0_AD3/WKUP10 BUTTON_TAMP PA21 RXD1 PCK1 AFE1_AD2 RS232_RXD, RS485_RXD PA22 TXD1 NPCS3 NCS2 AFE1_AD3 RS232_TXD, RS485_TXD PA23 SCK1 PWMH0 A19 PIODCCLK RS232_EN# PA24 RTS1 PWMH1 A20 PIODC0 RS232_RTS, RS485_DE PA25 CTS1 PWMH2 A23 PIODC1 RS232_CTS, RS485_RE# PA26 DCD1 TIOA2 MCDA2 PIODC2 SD_DAT2 PA27 DTR1 TIOB2 MCDA3 PIODC3 SD_DAT3 PA28 DSR1 TCLK1 MCCDA PIODC4 SD_CMD PA29 RI1 TCLK2 MCCK PIODC5 SD_CLK PA30 PWML2 NPCS2 MCDA0 WKUP11/PIODC6 SD_DAT0 PA31 NPCS1 PCK2 MCDA1 PIODC7 SD_DAT1
SAM4E-EK User Guide 42067A−SAM4E−01/2013
24
Table 5-2. PIO Port B pin assignments and signal descriptions.
IO line Peripheral A Peripheral B Peripheral C Extra function SYSIO and GPIO Comments PB0 PWMH0 RXD0 AFE0_AD4/RTCOUT0 AFE0_BNC PB1 PWMH1 TXD0 AFE0_AD5/RTCOUT1 ADC_Potentiometer PB2 CANTX0 NCPS2 CTS0 AFE1_AD0/WKUP12 CAN0_D, AFE1_BNC PB3 CANRX0 PCK2 RTS0 AFE1_AD1 CAN0_R PB4 TWD1 PWMH2 TDI JTAG_TDI PB5 TWCK1 PWML0 WKUP13 TDO/TRACESWO JTAG_TDO PB6 TMS/SWDIO JTAG_TMS PB7 TCK/SWCLK JTAG_TCK PB8 XOUT XOUT PB9 XIN XIN PB10 DDP USB_D+ PB11 DDM USB_D- PB12 PWML1 ERASE ERASE PB13 PWML2 PCK0 SCK0 DAC0 AUDIO_RIN PB14 NPCS1 PWMH3 DAC1 AUDIO_LIN,
DAC1_BNC
Table 5-3. PIO Port C pin assignments and signal descriptions.
IO line Peripheral A Peripheral B Peripheral C Peripheral D Extra function
SYSIO and GPIO
Comments
PC0 D0 PWML0 AFE0_AD14 NAND_D0/LCD_DB10 PC1 D1 PWML1 AFE1_AD4 NAND_D1/LCD_DB11 PC2 D2 PWML2 AFE1_AD5 NAND_D2/LCD_DB12 PC3 D3 PWML3 AFE1_AD6 NAND_D3/LCD_DB13 PC4 D4 NPCS1 AFE1_AD7 NAND_D4/LCD_DB14 PC5 D5 TIOA6 NAND_D5/LCD_DB15 PC6 D6 TIOB6 NAND_D6/LCD_DB16 PC7 D7 TCLK6 NAND_D7/LCD_DB17 PC8 NWE TIOA7 LCD_WR PC9 NANDOE TIOB7 NAND_OE# PC10 NANDWE TCLK7 NAND_WE# PC11 NRD TIOA8 LCD_RD PC12 NCS3 TIOB8 CANRX1 AFE0_AD8 CAN1_R PC13 NWAIT PWML0 AFE0_AD6 LCDBL_EN/SET PC14 NCS0 TCLK8 NAND_CE# PC15 NCS1 PWML1 CANTX1 AFE0_AD7 CAN1_D PC16 A21/NANDALE NAND_ALE PC17 A22/NANDCLE NAND_CLE PC18 A0 PWMH0 NAND_R/B# PC19 A1 PWMH1 LCD_RS PC20 A2 PWMH2 PC21 A3 PWMH3 USB_VBUS PC22 A4 PWML3 PC23 A5 TIOA3 PC24 A6 TIOB3 PC25 A7 TCLK3 PC26 A8 TIOA4 AFE0_AD12 PC27 A9 TIOB4 AFE0_AD13
SAM4E-EK User Guide 42067A−SAM4E−01/2013
25
PC28 A10 TCLK4 PC29 A11 TIOA5 AFE0_AD9 PC30 A12 TIOB5 AFE0_AD10 AFE0_BNC PC31 A13 TCLK5 AFE0_AD11 AFE0_BNC
Table 5-4. PIO Port D pin assignments and signal descriptions.
IO line Peripheral A Peripheral B Peripheral C Peripheral D Extra function
SYSIO and GPIO
Comments
PD0 GTXCK/GREFCK MII_TXCK PD1 GTXEN MII_TXEN PD2 GTX0 MII_TX0 PD3 GTX1 MII_TX1 PD4 GCRSDV/GRXDV MII_RXDV PD5 GRX0 MII_RX0 PD6 GRX1 MII_RX1 PD7 GRXER MII_RXER PD8 GMDC ETH_MDC PD9 GMDIO ETH_MDIO PD10 GCRS MII_CRS PD11 GRX2 MII_RX2 PD12 GRX3 MII_RX3 PD13 GCOL MII_COL PD14 GRXCK MII_RXCK PD15 GTX2 MII_TX2 PD16 GTX3 MII_TX3 PD17 GTXER PD18 NCS1 LCD_CS PD19 NCS3 PD20 PWMH0 LED_PWM (Amber) PD21 PWMH1 LED_PWM (Green) PD22 PWMH2 LED_PWR (RED) PD23 PWMH3 SD_PWR_CTL PD24 PWML0 PD25 PWML1 PD26 PWML2 PD27 PWML3 PD28 ETH_INTR PD29 PD30 PD31
Table 5-5. PIO Port E pin assignments and signal descriptions.
IO line Peripheral A Peripheral B Peripheral C Peripheral D Extra function
SYSIO and GPIO
Comments
PE0 CAN0_Rs PE1 CAN0_EN PE2 CAN1_Rs PE3 CAN1_EN PE4 QTouch_CHANGE#
SAM4E-EK User Guide 42067A−SAM4E−01/2013
26
5.2 Jumpers The Atmel SAM4E-EK board jumpers are essentially used for two main purposes: functional selection or current measurement. Details are given below.
Table 5-6. 2 pin jumpers setting.
Name Signal Close Open J37-1 SPI FLASH_CS (NPCS3) Connect (default) Disconnect J37-2 NAND_CE# (NCS0) Connect (default) Disconnect J37-3 VDDCORE Connect (default) Disconnect J37-4 VDDIO Connect (default) Disconnect J37-5 VDDIN Connect (default) Disconnect J37-6 CANTX0 CANTX0 can use AFE1_AD0 can use JP7 ERASE Erase internal flash Default JP9 TOUCH_CS# (NPCS0) Connect (default) Disconnect JP8 LCD_CS (NCS1) Connect (default) Disconnect J39-1 BUTTON_SCROLL-UP Connect (default) Disconnect J39-2 BUTTON_SCROLL-DOWN Connect (default) Disconnect J39-3 BUTTON_TAMP Connect (default) Disconnect J39-4 BUTTON_WAKU Connect (default) Disconnect JP15 PB13(DAC) to MONO-IN (Audio) Connect (default) Disconnect (default) JP16 PB14(DAC) to MONO-IN (Audio) Connect (default) Disconnect (default) JP17 Audio_ST/MN# Force mono mode No force (default) JP19, JP20, JP23 BNC input 50Ω match resister Use No use (default)
Name Signal 1-2 close 2-3 close JP11 PA21 RS485-RX RS232-RX JP3 ADVREF 3.3V (default) 3.0V JP14 Audio power 5V (default) 3.3V JP18 DAC_PB14 To CN1 (BNC) To Audio_LIN (default) JP31, JP32, JP33, JP34 PIOA/B/C/D-CONN-power 5V 3.3V JP21, JP22, JP24, JP25 AFE0_AD10/AD11 Use filter(default) Bypass filter JP40 ADC BNC input To AFE0_AD4 To AFE1_AD0
SAM4E-EK User Guide 42067A−SAM4E−01/2013
27
6. Schematics This chapter contains the following schematics:
• Block diagram
• Microcontroller
• TFT-LCD and touch
• COM and SD card and JTAG
• Audio and USB
• Ethernet
• QTouch, CAN and Flash memories
• I/O Peripheral
SAM4E-EK User Guide 42067A−SAM4E−01/2013
28
Figure 6-1. Block diagram.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
5 V
Inpu
t
PIO
A, B
, C
Exte
nsio
n
BNCPOT
ADC(
AFE)
/ DAC
NAND
FLA
SH
Shee
t 6
POW
ER
PIO
A, B
, C
PIO
A, B
, C
Shee
t 2
Shee
t 5
Shee
t 3
LCD
INTE
RFAC
E
AUDI
O O
ut (D
AC)
2.8"
240x
320
TFT
TOU
CH
SC
REE
N
QTO
UCH
PHONEJACK
DBG
U
USAR
T1
RS232 / 485
Shee
t 7
HE 10
ICE(
JTAG
)
Shee
t 8
HE 10
ZIG
BEE
INTE
RFAC
E
HSM
CI
ATM
ELC
orte
x-M
4 A
RM
Pro
cess
or
SAM
4E (B
GA
144)
Micro SD
POW
ER S
UPP
LY
(3
.3V)
HE 14
LEDs
, But
tons
CAN0
/ 1
RJ12
SPI F
LASH
ETH
ERN
ET(1
00M
)
Shee
t 4
FS U
SB (D
ivce
)
BA
CK
LIG
HT
Shee
t 2
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
1 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TOP
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
1 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TOP
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
1 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TOP
SAM4E-EK User Guide 42067A−SAM4E−01/2013
29
Figure 6-2. Microcontroller.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
(ER
ASE
)
10uF
PA
0P
A1
PA
2P
A3
PA
4P
A5
PA
6
PA
9P
A10
PA
11P
A12
PA
13P
A14
PA
15P
A16
PA
17P
A18
PA
19P
A20
PA
21P
A22
PA
23P
A24
PA
25P
A26
PA
27P
A28
PA
29P
A30
PA
31
PD
0P
D1
PD
2P
D3
PD
4P
D5
PD
6P
D7
PD
8P
D9
PD
10P
D11
PD
12P
D13
PD
14P
D15
PD
16P
D17
PD
18P
D19
PD
20P
D21
PD
22P
D23
PD
24P
D25
PD
26P
D27
PD
28P
D29
PD
30P
D31
PC
0P
C1
PC
2P
C3
PC
4P
C5
PC
6P
C7
PC
8P
C9
PC
10P
C11
PC
12P
C13
PC
14P
C15
PC
16P
C17
PC
18P
C19
PC
20P
C21
PC
22P
C23
PC
24P
C25
PC
26P
C27
PC
28P
C29
PC
30P
C31
PE
2P
E1
NR
ST
PE
0
PE
5P
E4
PE
3
PB
13P
B14
PB
0P
B1
PB
2P
B3
PB
4P
B5
PB
6P
B7
PB
8P
B9
PB
10P
B11
PB
12
PB
12
PA
8P
A7
PA
7
PA
8
PB
9
PB
8
+3V
3
VD
DIO
VD
DIN
VD
DP
LL
VD
DO
UT
VD
DC
OR
E
+5V
+3V
3
+3V
3
VD
DC
OR
E
VD
DIO
VD
DIN
VD
DO
UT
VD
DP
LL
+3V
3+5
V
+5V
+3V
3
PC
[0..3
1]
PD
[0..3
1]
PA
[0..3
1]
NR
ST
PE
[0..5
]
PB
[0..1
4]
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
2 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
SA
M4E
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
2 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
SA
M4E
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
2 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
SA
M4E
J37-
4
Y2
1 2
3
PIOA
U1A
AT91SAM4E-BGA144
PA
0C
11
PA
1D
12
PA
2E
12
PA
3F1
2
PA
4K
12
PA
5M
11
PA
6B
9
PA
7L2
PA
8M
2
PA
9M
12
PA
10L9
PA
11J9
PA
12L1
0
PA
13M
3
PA
14K
6
PA
15L5
PA
16K
5
PA
17J1
PA
18H
2
PA
19H
1
PA
20H
3
PA
21K
2
PA
22K
3
PA
23L4
PA
24L7
PA
25K
8
PA
26J8
PA
27J1
0
PA
28C
9
PA
29A
6
PA
30A
10
PA
31C
8
R8
0R
C7
100n
F
C11
100n
F
C1
100n
F
C28
15pF
MN
2ZE
N05
6V13
0A24
LS1
23
C12
100n
F
L1
56uH
C30
100n
F
C23
100n
F
C2
10uF
R1
2.2K
R9
169K
1%
R4
0R
C21
10uF
J2 SM
B
12
3 54
C8
10U
F
R11
0R
C3
100n
F
C17
100n
F
R3
0R
Y3
12M
Hz
1
2 3
4
JP3
1
2
3
J37-
5
C15
100n
F
MN
3B
NX
002-
01
SV
1
SG
2C
V3
CG
14
CG
25
CG
36
Y1
32.7
68 k
Hz
R5
DN
P
+C
2422
uF
C5
100n
F
C4
100n
F
C16
2.2u
F
C14
1uF
PIOC
U1D
AT91SAM4E-BGA144
PC
0E
4
PC
1J4
PC
2K
4
PC
3L3
PC
4J5
PC
5L8
PC
6K
7
PC
7M
4
PC
8J1
2
PC
9G
11
PC
10F1
0
PC
11F1
1
PC
12F4
PC
13G
2
PC
14E
10
PC
15G
1
PC
16D
11
PC
17B
12
PC
18B
10
PC
19D
8
PC
20A
9
PC
21A
7
PC
22C
7
PC
23C
6
PC
24B
6
PC
25C
5
PC
26F2
PC
27E
2
PC
28L1
2
PC
29F3
PC
30F1
PC
31E
1
R6
49.9
R 1
%
JP6
+C
2622
0uF-
ELE
-16V
SU
P1
BG
A-1
44 s
ocke
t
MN
4M
IC29
302
VIN
2V
OU
T4
SD
1
GND13
AD
J5
GND26
C22
18pF
R2 2.2R
C13
100n
F
PIOD
U1B
AT91SAM4E-BGA144
PD
0D
4
PD
1B
5
PD
2A
5
PD
3B
7
PD
4D
6
PD
5D
7
PD
6A
8
PD
7B
8
PD
8E
9
PD
9D
9
PD
10C
12
PD
11E
11
PD
12G
10
PD
13G
9
PD
14H
10
PD
15A
11
PD
16K
11
PD
17L1
1
PD
18M
10
PD
19M
9
PD
20K
9
PD
21H
9
PD
22M
8
PD
23M
7
PD
24M
6
PD
25M
5
PD
26L6
PD
27J6
PD
28K
10
PD
29D
10
PD
30M
1
PD
31D
3
C6
100n
F
MN
1
LM40
40A
IM3X
-3.0
J37-
3
+C
2910
0uF-
TAN
-6.3
V
J1P
ower
Jac
k 2.
1mm
1 2
3
C20
100n
F
U1C
AT9
1SA
M4E
-BG
A14
4
VD
DIO
G8
VD
DIO
E7
VD
DIO
F8
VD
DIO
H7
VD
DIO
H6
GN
DIO
F5G
ND
IOF6
GN
DIO
G4
GN
DIO
G5
GN
DIO
G6
VD
DIN
C1
VD
DO
UT
C3
AD
VR
EF
D1
GN
DA
NA
D2
VD
DC
OR
EH
5V
DD
CO
RE
E8
VD
DC
OR
EH
8V
DD
CO
RE
J7
GN
DC
OR
EG
7
GN
DC
OR
EE
5
GN
DC
OR
EE
6
GN
DC
OR
EF7
VD
DP
LLB
3
GN
DP
LLD
5
TES
TH
11
NR
ST
H12
JTA
GS
EL
B11
PB
0H
4
PB
1G
3
PB
2J2
PB
3J3
PB
4/TD
IA
12
PB
5/TD
O/T
RA
CE
SW
OC
10
PB
6/TM
S/S
WD
IOJ1
1
PB
7/TC
K/S
WC
LKF9
PB
8/X
OU
TA
3
PB
9/X
INA
2
PB
10/D
DM
B4
PB
11/D
DP
A4
PB
12/E
RA
SE
G12
PB
13B
2
PB
14C
4
PE
0C
2
PE
1A
1
PE
2B
1
PE
3E
3
PE
4K
1
PE
5L1
JP7
C19 22uF
JP5
C31
15pF
C27
18pF
R12
DN
P
C10
100n
F
+C
2522
uF
C9
100n
F
R10
102K
1%
R7
DN
P
C18
2.2u
F
SAM4E-EK User Guide 42067A−SAM4E−01/2013
30
Figure 6-3. TFT-LCD and touch.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
The
part
is p
lace
d as
cl
ose
as p
ossi
ble
to J
4
NOT POPULATED
LCD_
DB10
LCD_
DB11
LCD_
DB12
LCD_
DB13
LCD_
DB14
LCD_
DB15
LCD_
DB16
LCD_
DB17
LCD
LCD
TO
UC
H S
CR
EEN
LCD
BA
CK
LIG
HT
Six
slot
s on
PC
B fo
r LC
D s
hiel
d
4.7k
4.7k
4.7k
4.7k
LED
_A
LED
_K1
LED
_K2
LED
_K3
LED
_K4
PC13
PA12
PA13
PA14
PA17
PA11
X_R
IGH
TY_
UP
X_LE
FTY_
DO
WN
X_LE
FTX_
RIG
HT
Y_D
OW
NY_
UP
LED
_K4
LED
_K3
LED
_K2
LED
_K1
LED
_A
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
NR
ST
PC19
PC11
PC8
LCD
_DB9
LCD
_DB8
LCD
_DB7
LCD
_DB6
LCD
_DB5
LCD
_DB4
LCD
_DB3
LCD
_DB2
LCD
_DB1
LCD
_DB0
LCD
_DB0
LCD
_DB4
LCD
_DB9
LCD
_DB5
LCD
_DB7
LCD
_DB6
LCD
_DB8
LCD
_DB1
LCD
_DB3
LCD
_DB2
PA16
PD18
+3V3
+3V3
+3V3
+3V3
+3V3
AGN
D_T
P
+3V3
+3V3
AGN
D_T
P
NR
ST
PC[0
..31]
PA[0
..31]
PD[0
..31]
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
3 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TFT
LCD
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
3 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TFT
LCD
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
3 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
TFT
LCD
C41
100n
F
RR
1D
NP
1 2 3 45678
R14
DN
P
C35
1uF
L210
uH-1
50m
A
C39
100n
F
C37
1uF
R19
100K
R15
DN
P
PIN
son B
OT
PIN
39
PIN
1
Z7
FTM
280C
34D
D1
DN
P
TVS,
SO
T23-
5
1
2
3
4
5
C33
100n
F
R22
0RR
2047
KTP
3
R25
0R
R18
0R
C32
10uF
U2
AAT3
155I
TP-T
1
C1+
10
C1-
9
EN
/SE
T11
C2+
7
C2-
6
OU
TCP
8
IN5
GN
D4
D1
3
D2
2
D3
1
D4
12
JP8
R26
1RC
4010
0nF
R21
100K
R24
0R
J3 FH26
-39S
-0.3
SHW
VD
D1
DB
172
DB
163
DB
154
DB
145
DB
136
DB
127
DB
118
DB
109
DB
910
DB
811
DB
712
DB
613
DB
514
DB
415
DB
316
DB
217
DB
118
DB
019
VD
D20
RD
21
WR
22
RS
23
CS
24
RE
SE
T25
IM0
26
IM1
27
GN
D28
LED
-A29
LED
K1
30
LED
K2
31
LED
K3
32
LED
K4
33
Y+
34
Y-
35
X+
36
X-
37
NC
38
GN
D39
R16
10K
C42
4.7u
F
TP2
U3
ADS7
843E
XP
2
YP
3
XM
4
YM
5
DC
LK16
DIN
14
DO
UT
12
CS
15
BU
SY
13
PE
NIR
Q11
VR
EF
9
VC
C1
1
VC
C2
10
GN
D6
IN3
7
IN4
8FB
1BN
03K3
14S3
00R
R29
0R
C34
100n
FR
1347
K
R28
100K
RR
2D
NP
1 2 3 45678
R23
0RTP
1
R27
100K
JP9
R17
4.7K
C36
1uF
C38
4.7u
F
SAM4E-EK User Guide 42067A−SAM4E−01/2013
31
Figure 6-4. COM and SD card and JTAG.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
USA
RT1
ICE
INTE
RFA
CE
RS
485
SD C
AR
D
DB
GU
RXD
1TX
D1
RTS
1C
TS1
RXD
1
TXD
1R
TS1
CTS
1
UTX
D0
UR
XD0
SD P
OW
ER C
TRL PA
28
PB5
PB7
PB6
NR
ST
PB4
PA9
PA10
PA22
PA24
PA25
PA21
_485
PA25
PA24
PA21
_232
PA22
PA23
PA29
PA6
PA21
PA21
_232
PA21
_485
PA30
PA31
PA26
PA27
NR
ST
FGN
D
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
FGN
D
FGN
D
VDD
_MC
I
+3V3
VDD
_MC
I
PB[0
..14]
PA[0
..31]
NR
ST
PD23
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
4 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
KC
OM
& S
D C
ard
& JT
AG
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
4 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
KC
OM
& S
D C
ard
& JT
AG
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
4 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
KC
OM
& S
D C
ard
& JT
AG
R53
100K
R51
120R
C48
100n
F
R39
0R
J4 TF01
A
DA
T21
DA
T32
CM
D3
VC
C4
CLK
5
VS
S6
DA
T07
DA
T18
GN
D10
CD
9
Sh1
11
Sh2
12
Sh3
13
R54
100K
R44
0R
R33
0R
R42
0R
C53
100n
F
C43
4.7u
F
C56
100n
F
R34
0R
C54
100n
F
R30 10K
R37
0R
JP12
R61
0R
C55
100n
F
MN
7AD
M32
02
T1IN
11
T2IN
10R
1OU
T12
R2O
UT
9
T1O
UT
14
T2O
UT
7R
1IN
13
R2I
N8
V+
2
C1+
1
C1-
3
C2+
4
C2-
5
V-
6
VC
C16
GN
D15
R35
0R
R55
100K
R31 10K
R56
100K
TP5
MN
5AD
M33
12EA
RU
C1+
6
C1-
20
C2+
2
C2-
4
C3+
24
C3-
22
VC
C3
V+
1
V-
21
GN
D23
SD
19
EN
5
T1IN
7T1
OU
T18
R1I
N15
R1O
UT
10
T2IN
8T2
OU
T17
R2I
N14
R2O
UT
11
T3IN
9T3
OU
T16
R3I
N13
R3O
UT
12
R49
0R
R43
47K
C46
100n
F
R57
100K
J61 2 3
R40
0R
J7
54321 9876
10
11
C57
100n
F
C51
100n
F
JP13
RA1
68Kx
4
1234 5
678
R16
10R D
NP
R58
100K
TP4
R32
0R
R41
0R
R38
47K
R45
DN
P
R36
0R
R52
DN
P
R59
100K
R48
0R
R46
10K
JP10
Q2
IRLM
L640
2
1
32
J5
54321 9876
10
11
R47
0R
R50
0R
C45
100n
F
R60
0R
C49
100n
F
JP11
1
2
3
C47
100n
F
+C
5010
uF
J8 HE1
0 20
PTS
VTr
ef1
Vsu
pply
2
nTR
ST
3G
ND
14
TDI
5G
ND
26
TMS
7G
ND
38
TCK
9G
ND
410
RTC
K11
GN
D5
12
TDO
13G
ND
614
nSR
ST
15G
ND
716
DB
GR
Q17
GN
D8
18
DB
GA
CK
19G
ND
920
C52
100n
F
C44
100n
F
R16
24.
7k
MN
6AD
M34
85AR
Z
RO
1
RE
2
DE
3
DI
4
VC
C8
GN
D5
A6
B7
R62
0R
SAM4E-EK User Guide 42067A−SAM4E−01/2013
32
Figure 6-5. Audio and USB.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
AU
DIO
OU
T
USB
AD
C /
AFE
Potentiometer
Clockwise 2-->3
(AFE
0_A
D10
)
(AFE
0_A
D11
)
DA
C1
(AFE
0_A
D5)
(AFE
1_A
D0,
nee
d op
en J
P41)
DA
C0
(AFE
0_A
D4)
PB13
PC21
PB10
PB11
PB1
PC31
PC30
PB14
AUD
IO_O
UTL
PB0
PB2
AGN
D
AGN
D
VDD
_AM
P
AGN
D
AGN
D
AGN
D
VDD
_AM
P
+5V
AGN
D
+3V3
AGN
D
FGN
D
FGN
D
+3V3
AGN
D
PC[0
..31]
PB[0
..14]
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
5 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
Audi
o &
USB
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
5 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
Audi
o &
USB
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
5 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
Audi
o &
USB
C71
4.7n
F D
NP
C63
0.47
uF
R78
600R
C65
0.47
uF
RV2
V5.5
MLA
0603
CN
3
BNC
+
C62
220u
F-TA
N-6
.3V
R80
47K
R73
0R
R74
0R
R68
100K
CN
4
BNC
JP16
R66
47K
JP19
L322
0uH
C67
0.47
uF
RV1
V5.5
MLA
0603
C69
2.2u
F
+
C58
220u
F-TA
N-6
.3V
C61
100n
F
C74
4.7n
F D
NP
R69
100K
JP25
1
2
3
C72
680p
F
R82
27R
R77
49.9
R
FB2
BN03
K314
S300
R
JP18
1
2
3
R64
1K
JP17
JP22
1
2
3
C66
1uF
J91 2
MN
8TP
A022
3DG
Q
VD
D3
RIN
5
MO
NO
-IN1
LIN
9
LO/M
O-
10
RO
/MO
+6
ST/
MN
7
SH
UTD
0WN
2
BY
PA
SS
4
GN
D8
PAD11
C75
10pF
C70
10nF
L422
0uH
5VD-
D+ID
G
J11
TBD
USB
Mic
ro B
1
2
3
4
7
5
68 910
11
JP20
C59
1uF
JP21
1
2
3
JP15
TP6
Test
Pad
SQ
-40T
H
R63
1K
JP26
CN
2
BNC
R83
27R
R67
33K
+C
6010
uF
CN
1BN
C
R81
68K
R76
49.9
R
R75
49.9
R
R72
33K
JP23
JP40
1
2
3
R71
47K
R79
49.9
R
C64
0.47
uF
C73
680p
F
C68
10nF
J10
Phon
ejac
k St
ereo
3.5
5 4 3 2 1
R65
33K
R70
100K
JP24
1
2
3
JP14
1
2
3
VR1
10K
VR
13
2
SAM4E-EK User Guide 42067A−SAM4E−01/2013
33
Figure 6-6. Ethernet.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
RJ4
5 ET
HER
NET
CO
NN
ECTO
RET
H P
HY
E1_
RX
CK
E1_
CR
SE
1_C
OL
E1_
TXC
K
E1_
RX
DV
E1_
RX
0E
1_R
X1
E1_
TX0
E1_
TXE
N
E1_
MD
IOE
1_M
DC
E1_
RX
ER
INT_
ETH
1
E1_
TX1
E1_
TX2
E1_
TX3
E1_
RX
2E
1_R
X3
A
t the
De-
Ass
ertio
n of
Res
et:
P
HY
AD
D[2
:0]:0
01
CO
NFI
G[2
:0]:0
00,M
ode:
MII
D
uple
x M
ode:
Hal
f Dup
lex
Is
olat
e M
ode:
Dis
able
S
peed
Mod
e:10
0Mbp
s
Nw
ay A
uto-
Neg
otia
tion:
Enab
leE
TH1_
XI
ETH
1_X
O
CO
L
RX
ER
TXD
3TX
D2
RX
C
TXD
1TX
D0
PD
3P
D2
PD
7
PD
14
PD
12
RX
D0
RX
D3
PD
11
ETH
1_X
ORX
M
TXP
RX
P
TXM
CT_
RX
CT_
TX
RX
D2
TXC
ETH
1_X
I
PD
4
PD
16P
D15
PD
1TX
EN
PD
9P
D28
PD
8
PD
6P
D5
PD
0
PD
10
RX
D1
PD
13C
RS
RX
DV
GN
D_E
THFG
ND
GN
D_E
TH
GN
D_E
TH
+3V
3
+3V
3
+3V
3
E1_
AV
DD
T
FGN
D
+3V
3
FGN
D
+3V
3
PD
[0..3
1]
NR
ST
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
6 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
ETH
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
6 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
ETH
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
6 8A
XX
-XX
X-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
ETH
R99
22R
MN
9
KS
Z805
1MN
L
RX
C/B
-CA
ST_
OFF
19
CR
S/C
ON
FIG
129
CO
L/C
ON
FIG
028
TXD
125
TXD
024
TXE
N23
RX
D3/
PH
YA
D0
13
RX
D2/
PH
YA
D1
14
RX
D1/
PH
YA
D2
15
RX
D0/
DU
PLE
X16
RX
DV
/CO
NFI
G2
18R
XE
R/IS
O20
MD
C12
MD
IO11
INTR
P/N
AN
D21
VD
DA
_3V
33
VD
DIO
17
RE
SE
T32
TXP
7
TXM
6
RX
P5
RX
M4
VD
D_1
V2
2
GN
D1
PA
DD
LE33
TXC
22
TXD
226
TXD
327
RE
XT
10
XO
8
XI
9
LED
0/N
WA
YE
N30
LED
1/S
PE
ED
31
R90
22R
R10
7
4.7K
R96
22R
C81
10uF
C82
100n
F
R10
8
4.7K
L522
0ohm
at 1
00M
Hz
12
R10
522
R
C77
2.2u
F
R10
322
R
R91
22R
C78
100n
F
R98
22R
C79
100n
F
Y4
25M
Hz
1
2 3
4
R86
22R
R92
22R
RR
34.
7k
12345
678
C84
100n
FC
8310
uF
C86
22pF
R10
9
470R
RR
44.
7k12345
678
R87
22R
R93
22R
C85
22pF
R11
10R
R85
22R
R88
22R
R10
24.
7K
R94
22R
C76
100n
F
R89
22R
R10
14.
7K
R11
0
470R
R10
66.
49K
R84
22R
R11
20R
R10
022
R
1 2 3 6 4 5 7 8
75 75
7575
1nF
TD+
TD-
CT NCRD-
CT
TX+
TX-
RX+
RX-
RD+
J20
J00-
0061
1 2 7 83 654
1314
9 10 1112
R10
422
R
SAM4E-EK User Guide 42067A−SAM4E−01/2013
34
Figure 6-7. QTouch, CAN and Flash memories.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
(CA
NR
X0)
(CA
NTX
0RS
)
(CA
NR
X0E
N)
(CA
NTX
0)
(CA
NR
X1)
(CA
NTX
1RS
)
(CA
NR
X1E
N)
(CA
NTX
1)
CA
N1
CA
N0
Qto
uch
MIS
0M
OSI
SP
CK
NP
CS
3
MT2
9F2G
08A
BA
EA
NA
ND
FLA
SH
SPI F
LASH
PE4
PA4
PA3
PE0
PE1
PB3 P
C15
PE2
PE3
PC
12
PA
12P
A13
PA
14
PC
18
PC
14P
C7
PC
6P
C5
PC
4P
C3
PC
2P
C1
PC
0
PC
10P
C9
PC
16P
C17
PA5
PB2
+3V
3
+3V
3
+3V
3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V
3
+3V
3+3
V3
+3V
3
PE[0
..5]
PC
[0..3
1]
PA[0
..31]
PB[0
..14]
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
7 8A
XX-X
XX-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
Qto
uch
& C
AN
& F
lash
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
7 8A
XX-X
XX-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
Qto
uch
& C
AN
& F
lash
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
7 8A
XX-X
XX-X
XX
XX
XX
23-O
CT-
12
SA
M4E
-EK
Qto
uch
& C
AN
& F
lash
C99
100n
F
R12
01K
C92
100n
F
R11
41K
Rs
D EN
R
CA
NH
CA
NL
VC
CG
ND
MN
12
SN
65H
VD
234
237 6
41 58
MN
10
WE
18
N.C
66
VC
C37
CE
9
RE
8
N.C
1120
WP
19
N.C
55
N.C
11
N.C
22
N.C
33
N.C
44
N.C
1221
N.C
1322
N.C
1423
N.C
1524
R/B
7
N.C
1726
N.C
1827
N.C
1928
I/O0
29
N.C
2134
N.C
2235
VS
S36
PR
E38
N.C
2339
VC
C12
VS
S13
ALE
17
N.C
811
N.C
710
N.C
914
N.C
1015
CLE
16
N.C
1625
N.C
2033
I/O1
30
I/O3
32I/O
231
N.C
2747
N.C
2646
N.C
2545
I/O7
44I/O
643
I/O5
42I/O
441
N.C
2440
N.C
2848
R14
447
0K
R12
4
10K
R13
0
1M
R14
60R
JP28
R12
81KQ
KEY
K1
1 2
R12
11K
C87
100n
F
+C
9510
uF
C91
4.7n
FJ3
7-2
QK
EY
K2
1 2
R12
547
K
R14
70R
R15
00R
R12
71K
R13
410
K
R13
80R
R13
50R
R15
1
10K
Slider
S1 X6
X5
X4
X3
X2
X1
X0
Y0
J37-
6
J37-
1
R12
647
K
FB3
BN
03K
314S
300R
R14
30R
C96
100n
F
J14
CA
N R
J12
11
22
33
44
55
66
Rs
D EN
R
CA
NH
CA
NL
VC
CG
ND
MN
11
SN
65H
VD
234
237 6
41 58
R14
812
0R
C90
4.7n
F
C93
100n
F
R11
51K
R11
81K
R13
247
K
C89
100n
F
+C
9810
uF
R12
2
2.2K
JP29
R13
90R
R12
9
1M
R14
110
K
R14
90R
C94
1uF
C88
1uF
R11
61K
R14
0
10K
R11
91K
R13
10R
R12
3
2.2K
MN
13AT
25D
F321
A
HO
LD7
GN
D4
VC
C8
CS
1S
CK
6S
I5
SO
2
WP
3
U4 AT4
2QT2
160
VD
D3
VD
D16
VD
D17
RS
T25
SD
A23
SC
L24
CH
AN
GE
7
I2C
_A0
21
I2C
_A1
22
VR
EF
8
VS
S4
VS
S18
X0
10X
111
X2
12X
313
X4
14X
515
X6
5X
76
GP
IO2
1
GP
IO3
2G
PIO
128
Y1A
27
Y1B
20
Y0A
26
Y0B
19
SM
P9
PA
D29
C97
100n
F
R11
710
K
R13
3D
NP
R14
50R
R14
20R
R13
712
0R
J13
CA
N R
J12
11
22
33
44
55
66
SAM4E-EK User Guide 42067A−SAM4E−01/2013
35
Figure 6-8. I/O Peripheral.
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
PIO
API
O C
PIO
B &
PIO
E
PIO
D
HE1
0
MISO
MOSI
IRQ_
ZBEE
SPIO
_NPC
S3#
SPCK
SLP_
TRMI
SC_Z
BEE
ZB_R
STN
Not
e:P
in1
is n
ot o
n th
e in
dent
atio
n si
de
ZIG
BEE
Pin
1
LED
S
BU
TTO
NS
NR
ST
WA
KU
9
TAM
P
SCR
OLL
-UP
SCR
OLL
-DO
WN
TIM
ER
PWM
PWM
POW
ER
PA18
PA19
PA20
PC0
PC1
PC2
PC4
PC3
PC5
PC6
PC8
PC7
PC9
PC12
PC11
PC10
PC15
PC14
PC13
PC17
PC19
PC20
PC16
PC21
PB6
PC18
PB7
PB3
PB1
PB0
PB4
PB2
PB5
PE3
PE1
PE5
PE0
PE4
PE2
PA13
PA14
PA11
PA9
PA6
PA15
PA10
PA12
PA23
PA27
PA22
PA25
PA30
PA29
PA24
PA28
PA21
PA31
PA26
PA16
PA17
PD0
PD1
PD2
PD4
PD3
PD5
PD6
PD8
PD7
PD9
PD12
PD11
PD10
PD15
PD14
PD13
PD17
PD19
PD20
PD16
PD21
PD18
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PA0
PA1
PA2
PA3
PA4
PA5
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PB12
PB13
PB14
PA13
PA16
PA12
PA14
PA5
PA18
PA17
PA15
PD20
PD21
PD22
PA0
PA2
PA1
PA19
PA20
+5V
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
+5V
+3V3
+5V
+3V3
+5V
+3V3
PC[0
..31]
PA[0
..31]
PB[0
..14]
PD[0
..31]
PE[0
..5]
NR
ST
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
8 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
I/O P
erip
hera
l
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
8 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
I/O P
erip
hera
l
RE
VD
ATE
MO
DIF
.D
ES
.D
ATE
VE
R.
SC
ALE
1/1
RE
V.
SH
EE
T
This
agre
emen
t is
our p
rope
rty. R
epro
duct
ion
and
publ
icatio
n wi
thou
t our
writ
ten
auth
oriza
tion
shal
l exp
ose
offe
nder
to le
gal p
roce
edin
gs.
INIT
ED
ITA
8 8A
XX-X
XX-X
XXX
XXX
23-O
CT-
12
SAM
4E-E
K
I/O P
erip
hera
l
R15
50R
BP1
14
23
D5
LED
Red
Q1
IRLM
L250
2
1
32
J39-
4
JP33
1
2
3
JP36
J39-
1
R15
747
0R
J16
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738
3940
R15
847
0R
JP34
1
2
3
J39-
3
R15
447
0R
BP5
14
23
J15
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738
3940
R15
20R
R16
047
0R
J18
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738
3940
D2
LED
Blu
e
C10
018
pF
R15
30R
JP31
1
2
3
J39-
2
BP3
14
23
R15
910
0K
BP2
14
23
R15
60R
C10
12.
2nF
J19
HE1
0 5x
21
23
45
67
89
10
JP32
1
2
3
D4
LED
Gre
en
BP4
14
23
D3
LED
Am
berJ1
71
23
45
67
89
1011
1213
1415
1617
1819
2021
2223
2425
2627
2829
3031
3233
3435
3637
3839
40
C10
22.
2uF
SAM4E-EK User Guide 42067A−SAM4E−01/2013
36
7. Revision History Doc. Rev. Date Comments
42067A 01/2013 Initial document release.
Atmel Corporation 1600 Technology Drive San Jose, CA 95110 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com
Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369
Atmel Munich GmbHBusiness Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621
Atmel Japan G.K.16F Shin-Osaki Kangyo Bldg. 1-6-4 Osaki, Shinagawa-ku Tokyo 141-0032 JAPAN Tel: (+81)(3) 6417-0300 Fax: (+81)(3) 6417-0370
© 2012 Atmel Corporation. All rights reserved. / Rev.: 42067A−SAM4E−01/2013
Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, QTouch®, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. ARM®, Cortex™ and others are registered trademarks or trademarks of ARM Ltd. Other terms and product names may be trademarks of others.
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.