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ABSTRACT Electronic voting (also known as e-voting) is a term encompassing several different types of voting, embracing both electronic means of casting a vote and electronic means of counting votes. Electronic voting technology can include punch cards, optical scan voting systems and specialized voting kiosks (including self-contained Direct-recording electronic (DRE) voting systems). It can also involve transmission of ballots and votes via telephones, private computer networks, or the Internet. Electronic voting systems may offer advantages compared to other voting techniques. An electronic voting system can be involved in any one of a number of steps in the setup, distributing, voting, collecting, and counting of ballots, and thus may or may not introduce advantages into any of these steps. The main aim of this project is develop a Electronic Voting Machine with maximum security facilities. i
Transcript
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ABSTRACT

Electronic voting (also known as e-voting) is a term encompassing

several different types of voting, embracing both electronic means of casting a

vote and electronic means of counting votes. Electronic voting technology can

include punch cards, optical scan voting systems and specialized voting kiosks

(including self-contained Direct-recording electronic (DRE) voting systems). It

can also involve transmission of ballots and votes via telephones, private

computer networks, or the Internet.

Electronic voting systems may offer advantages compared to other voting

techniques. An electronic voting system can be involved in any one of a number

of steps in the setup, distributing, voting, collecting, and counting of ballots, and

thus may or may not introduce advantages into any of these steps.

The main aim of this project is develop a Electronic Voting Machine with

maximum security facilities.

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TABLE OF CONTENTSTABLE OF CONTENTS

CHAPTER NO. TITLE PAGE NO.

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ABSTRACT vii

LIST OF FIGURES xiii

LIST OF ABBREVATION xiv

1. INTRODUCTION 02

1.1 Block Diagram Description 02

1.2 Block Diagram 03

1.3 Circuit Diagram 04

1.4 Circuit Diagram Description 05

2. POWER SUPPLY UNIT 07

2.1 Circuit Diagram 07

2.1.1 Working Principle 07

2.1.2 Transformer 08

2.1.3 Bridge Rectifier 08

2.1.4 IC Voltage Regulators 10

3. MICROCONTROLLER 12

3.1 Description 12

3.2 Pin Diagram 14

3.2.1 8051 Pin Functions 15

3.2.1.1 I/O PORTS 15

3.2.1.2 Port0 15

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3.2.1.3 Port1 16

3.2.1.4 Port2 16

3.2.1.5 Port3 17

3.2.1.6 Oscillator inputs 19

3.2.1.7 RESET Line (RST) 19

3.2.1.8Address Latch Enable (ALE) 19

3.2.1.9 Program Store Enable (PSEN) 20

3.2.1.10 External Access (EA) 20

3.2.1.11 Memory Organization 21

3.2.1.12 Common Memory Space 25

3.3 Block Diagram 26

3.3.1Oscillator characteristics 26

3.3.2 8051 CLOCK 27

3.3.3 IDLE mode 27

3.3.4 Power down mode 28

3.3.5 8051 RESET 28

3.3.6 Central Processing Unit 29

3.3.7 The Accumulator 29

3.3.8 The "R" Register 29

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3.3.9 The "B" Register 30

3.3.10 The Program Counters (PC) 31

3.3.11 The Data Pointer (DPTR) 31

3.3.12 The Stack Pointer (SP) 32

3.3.13 Input/Output ports 32

3.3.14 Timers/Counters 33

3.3.15 Interrupts 34

3.3.16 Serial port 35

3.3.17 Applications 36

4. SERIAL COMMUNICATION 38

4.1 Introduction 38

4.2 Null MODEM 41

4.3 RS232 42

4.4 Null MODEM without Handshaking 43

4.5 Compatibility issues 44

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5. SOFTWARE CODING 47

6. SOFTWARE TOOLS 56

6.1 Types of Tools

56

6.1.1 KEIL C 56

6.1.2 SigID 57

6.1.3 VISUAL BASIC 58

7. HARDWARE TOOLS 61

7.1 GSM MODEM 66

7.1.1 Definition 66

7.1.2 The GSM Network 67

7.1.3 GSM MODEM 67

7.1.4 GSM MODEM Applications 69

7.1.5 Facts and applications of GSM/GPRS

MODEM 69

7.1.6 Applications 70

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7.1.7 Application suitable for GSM communication 71

7.2 LCD DISPLAY 72

8. CONCLUSION 75

9. APPENDIX 77

10. REFERENCES 79

LIST OF FIGURES

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FIGURE NO. TITLE PAGE NO.

1.1 Block diagram of car security system 03

1.2 Circuit Diagram 04

2.1 Circuit diagram of power supply 07

2.2 Block Diagram of power supply 08

3.1 Pin Diagram of 8051 14

3.2 Program Memory 22

3.3 Main Memory 23

3.4 Internal Data Memory 24

3.5 Block Diagram of the 8051 Core 26

3.6 8051 CLOCK 27

3.7 8051 RESET 28

3.8 Block diagram of timers/counters 34

4.1 Simple null modem without handshaking 44

6.1 Design window of ORCAD 58

7.1 GPS segments 62

7.2 Position of the 28 GPS satellites at 12.00 hrs UTC 63

7.3 GPS Satellite 64

7.4 Block diagram of satellite 65

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LIST OF ABBREVATIONS

MCU Micro Controller Unit

RMS Root Mean Square

CMOS Complementary Metal Oxide Semiconductor

CPU Central Processing Unit

RAM Random Access Memory

ALU Arithmetic Logic Unit

SP Stack Pointer

PSW Program Status Word

PC Program Counter

DPTR Data Pointer Register

UART Universal Asynchronous Receiver Transmitter

CD Carrier Detect Signal

RI Ring Indicator

DSR Data Set Ready

CTS Clear To Send

DTR Data Terminal Ready

DCE Data Communication Equipment

RX Receiver

TX Transmitter

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CHAPTER-1

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CHAPTER-1

INTRODUCTION

E-voting has been a very controversial topic ever since the presidential elections in

the U.S. in 2000.Many security flaws were found . the standards for the

implementation of e-voting systems were shown to be too weak and many

(scientific) experts expressed their negative opinions on e-voting .

Nevertheless, efforts are still made to introduce evoting in countries that use

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traditional paper ballots. E-voting is an election method in which the votes

are cast or collected electronically . A computer system whose main

element is an software component that maps the voting procedure

electronically is called an e-voting system. A direct recording electronic (DRE)

machine is a special case of such a system as it implements all steps in the voting

process, from registration and ballot casting to counting.

There are two different forms of voting: distance and presence voting .

In presence voting, a voter can cast his or her vote in a polling station under

the supervision of the election's administration. Examples for presence voting are

conventional elections in polling stations or voting with e-voting machines. In

distance voting, the voter acts without the supervision of the electoral

commission and casts his or her vote from a place other than a polling booth,

such as casting absentee ballots via mail or internetvoting.

1.1 BLOCK DIAGRAM:

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RTC RTCDriver OSC

Display Unit

Polling Switches

MCU

MAX232

Transformer Rectifier

RegulatorFilter

1.2 BLOCK DIAGRAM DESCRIPTION:

The finger print sensor gets the finger print of the voters and sends to the PC. In PC the finger print image is compared with existing image

If the image is matched, the computer sends the command the person is valid to the micro controller and displayed.

If any one try to poll their vote beyond the time limit, system will be blocked.

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1.3 EXISTING SYSTEM:

The system allows the Evil Practices held in the manual Voting system. Electronic voting systems may offer advantages compared to other voting

techniques. An electronic voting system can be involved in any one of a number of steps in

the setup, distributing, voting, collecting, and counting of ballots, and thus may or may not introduce advantages into any of these steps.

1.4 PROPOSED SYSTEM:

Electronic voting (also known as e-voting) is a term encompassing several

different types of voting, embracing both electronic means of casting a vote

and electronic means of counting votes.

It can also involve transmission of ballots and votes via telephones, private

computer networks, or the Internet.

1.4 CIRCUIT DIAGRAM

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VCC

VCC

P0_0P0_1P0_2P0_3P0_4P0_5P0_6P0_7P1_7

P1_6

P1_1P1_0

P1_3P1_2

P1_5P1_4

P3_3

P3_0

P3_4

P3_7

P3_5

P3_2

P3_6

P3_1

P2_4

P2_2

P2_7

P2_1

P2_5

P2_3

P2_6

P2_0

R28K2

C2

10uF

U1

8051

9

1819

20

293031

40

12345678

2122232425262728

1011121314151617

3938373635343332

RST

XTAL2XTAL1

GND

PSENALE/PROG

EA/VPP

VCCP1.0

P1.1P1.2P1.3P1.4P1.5P1.6P1.7

P2.0/A8P2.1/A9

P2.2/A10P2.3/A11P2.4/A12P2.5/A13P2.6/A14P2.7/A15

P3.0/RXDP3.1/TXDP3.2/INTOP3.3/INT1P3.4/TOP3.5/T1P3.6/WRP3.7/RD

P0.0/AD0P0.1/AD1P0.2/AD2P0.3/AD3P0.4/AD4P0.5/AD5P0.6/AD6P0.7/AD7

X111.0592MHz

C333PF

C433PF

C1

0.1uFRS

T

1.5 CIRCUIT DIAGRAM DESCRIPTION

The operation of power supply circuits built using

filters, rectifiers, and then voltage regulators. Starting with an AC voltage, a steady

DC voltage is obtained by rectifying the AC voltage, Then filtering to a DC level,

and finally, regulating to obtain a desired fixed DC voltage. The regulation is

usually obtained from an IC voltage regulator Unit, which takes a DC voltage and

provides a somewhat lower DC voltage, Which remains the same even if the input

DC voltage varies, or the output Load connected to the DC voltage changes.

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CHAPTER 2

POWER SUPPLY UNIT

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POWER SUPPLY UNIT

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V D D

V D D

C 70 . 1 u F

J P 2

2 2 0 V A C

12

- +

D 1 1

43

2

U 27 8 0 5

1

3

2V I N

GN

D

V O U T

C 610 0 uF

C 54 7 0 u F

R 42 2 0 o h m

D 2

L E D

2.1.1 WORKING PRINCIPLE:

The AC voltage, typically 220V rms, is connected to a

transformer, which steps that ac voltage down to the level of the desired DC

output. A diode rectifier then provides a full-wave rectified voltage that is

initially filtered by a simple capacitor filter to produce a dc voltage. This

resulting dc voltage usually has some ripple or ac voltage variation.

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A regulator circuit removes the ripples and also remains the same dc value even if

the input dc voltage varies, or the load connected to the output dc voltage changes.

2.1.2 TRANSFORMER:

The potential transformer will step down the power supply voltage (0-230V) to

(0-6V) level. Then the secondary of the potential transformer will be connected to

the precision rectifier, which is constructed with the help of op–amp. The

advantages of using precision rectifier are it will give peak voltage output as DC,

rest of the circuits will give only RMS output.

2.1.3 BRIDGE RECTIFIER:

When four diodes are connected as shown in figure, the circuit is called as

bridge rectifier. The input to the circuit is applied to the diagonally opposite

corners of the network, and the output is taken from the remaining two corners.

Let us assume that the transformer is working properly and there is a positive

potential, at point A and a negative potential at point B. the positive potential at

point A will forward bias D3 and reverse bias D4.

The negative potential at point B will forward bias D1 and reverse D2. At this

time D3 and D1 are forward biased and will allow current flow to pass through

them; D4 and D2 are reverse biased and will block current flow.

The path for current flow is from point B through D1, up through RL, through

D3, through the secondary of the transformer back to point B. this path is indicated

by the solid arrows. Waveforms (1) and (2) can be observed across D1 and D3.

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One-half cycle later the polarity across the secondary of the transformer

reverse, forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow

will now be from point A through D4, up through RL, through D2, through the

secondary of T1, and back to point A. This path is indicated by the broken arrows.

Waveforms (3) and (4) can be observed across D2 and D4. The current flow

through RL is always in the same direction.

In flowing through RL this current develops a voltage corresponding to that

shown waveform (5). Since current flows through the load (RL) during both half

cycles of the applied voltage, this bridge rectifier is a full-wave rectifier.

One advantage of a bridge rectifier over a conventional full-wave rectifier is

that with a given transformer the bridge rectifier produces a voltage output that is

nearly twice that of the conventional full-wave circuit.

This may be shown by assigning values to some of the components shown in

views A and B. assume that the same transformer is used in both circuits. The peak

voltage developed between points X and y is 1000 volts in both circuits. In the

conventional full-wave circuit shown—in view A, the peak voltage from the center

tap to either X or Y is 500 volts.

Since only one diode can conduct at any instant, the maximum voltage that can

be rectified at any instant is 500 volts.

The maximum voltage that appears across the load resistor is nearly-but never

exceeds-500 v0lts, as result of the small voltage drop across the diode. In the

bridge rectifier shown in view B, the maximum voltage that can be rectified is the

full secondary voltage, which is 1000 volts. Therefore, the peak output voltage

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across the load resistor is nearly 1000 volts. With both circuits using the same

transformer, the bridge rectifier circuit produces a higher output voltage than the

conventional full-wave rectifier circuit.

2.1.4 IC VOLTAGE REGULATORS:

Voltage regulators comprise a class of widely used ICs. Regulator IC units

contain the circuitry for reference source, comparator amplifier, control device, and

overload protection all in a single IC. IC units provide regulation of either a fixed

positive voltage, a fixed negative voltage, or an adjustably set voltage. The

regulators can be selected for operation with load currents from hundreds of milli

amperes to tens of amperes, corresponding to power ratings from milli watts to

tens of watts.

A fixed three-terminal voltage regulator has an unregulated dc input voltage,

Vi, applied to one input terminal, a regulated dc output voltage, Vo, from a second

terminal, with the third terminal connected to ground.

The series 78 regulators provide fixed positive regulated voltages from 5 to

24 volts. Similarly, the series 79 regulators provide fixed negative regulated

voltages from 5 to 24 volts.

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CHAPTER-322

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CHAPTER-3

MICROCONTROLLER

3.1 DESCRIPTION

A microcontroller is heart of the embedded system. It contains a processor core, memory, and programmable input/output peripherals.

It contain four ports, port0 port1 port2 port3.where port 0 is an external port and

other three ports are internal ports.

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heavy devices like motor, alarm devices etc.. are connected to the port0.

Port 0 does not have internal pull up resistors.

Ports 1 2 3 have internal pull up resistors.

Port 3 provides serial communication signals.

Features of Microcontroller

8 bit controller

16 bit Program Counter(PC) and Data Pointer(DPTR)

128 byte of RAM

4KB on chip of ROM

Two 16 bit timers/ counter( T0,T1)

40 pin

32 I/O pins for four 8 bit ports

6 Interrupt sources

64K Program/ Data memory address space

The generic 8051 architecture supports Harvard

architecture, which contains two separate buses for both program and data. So, it

has two distinctive memory spaces of 64K X 8 size for both program and data. It is

based on an 8 bit central processing unit with an 8 bit Accumulator and another 8

bit B register as main processing blocks. Other portions of the architecture include

few 8 bit and 16 bit registers and 8 bit memory locations.

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Each 8031 device has some amount of data RAM built in the device for

internal processing. This area is used for stack operations and temporary storage of

data.

This base architecture is supported with on chip peripheral functions like I/O

ports, timers/counters, versatile serial communication port. So it is clear that this

8031 architecture was designed to cater many real time embedded needs.

Now you may be wondering about the non mentioning of memory

space meant for the program storage, the most important part of any embedded

controller. Originally this 8031 architecture was introduced with on chip, ‘one time

programmable version of Program Memory of size 4K X 8. Intel delivered all

these microcontrollers (8051) with user’s program fused inside the device.

The memory portion was mapped at the lower end of the Program Memory

area. But, after getting devices, customers couldn’t change any thing in their

program code, which was already made available inside during device fabrication.

So, very soon Intel introduced the 8031 devices (8751) with re-programmable

type of Program Memory using built-in EPROM of size 4K X 8. Like a regular

EPROM, this memory can be re-programmed many times. Later on Intel started

manufacturing these 8031 devices without any on chip Program Memory.

The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller

with 4K bytes of In-System Programmable Flash memory. The device is

manufactured using Atmel’s high-density nonvolatile memory technology and is

compatible with the Indus-try-standard 80C51 instruction set and pin out. The on-

chip Flash allows the program memory to be reprogrammed in-system or by a

conventional nonvolatile memory pro-grammar. By combining a versatile 8-bit

CPU with In-System Programmable Flash on a monolithic chip, the Atmel

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AT89S51 is a powerful microcontroller which provides a highly-flexible and cost-

effective solution to many embedded control applications. The AT89S51 provides

the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O

lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five-vector

two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and

clock circuitry.

In addition, the AT89S51 is designed with static logic for operation down to

zero frequency and supports two software selectable power saving modes. The Idle

Mode stops the CPU while allowing the RAM, timer/counters, serial port, and

interrupt system to continue functioning. The Power-down mode saves the RAM

con-tents but freezes the oscillator, disabling all other chip functions until the next

external interrupt or hardware reset.

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3.2 PIN DIAGRAM

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3.2.1 8051 PIN FUNCTIONS

3.2.1.1 I/O PORTS (P0, P1, P2, P3):

1234567891011121314151617181920

4039383736353433323130292827262524232221

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST

(RXD)P3.0(TXD)P3.1

(T0)P3.4(T1)P3.5

XTAL2XTAL1

GND

(INT0)P3.2(INT1)P3.3

(RD)P3.7(WR)P3.6

VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)EA/VPPALE/PROGPSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8)

8051(8031)

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Of the 40 pins of the typical 8052, 32 of them are

dedicated to I/O lines that have a one-to-one relation with SFRs P0, P1, P2, and P3.

The developer may raise and lower these lines by writing 1s or 0s to the

corresponding bits in the SFRs. Likewise; the current state of these lines may be

read by reading the corresponding bits of the SFRs. All of the ports have internal

pull-up resistors except for port 0.

3.2.1.2 PORT 0:

Port 0 is dual-function in that it in some designs port 0ís I/O

lines are available to the developer to access external devices while in other

designs it is used to access external memory. If the circuit requires external RAM

or ROM, the microcontroller will automatically use port 0 to clock in/out the 8-bit

data word as well as the low 8 bits of the address in response to a MOVX

instruction and port 0 I/O lines may be used for other functions as long as external

RAM isn’t being accessed at the same time. If the circuit requires external code

memory, the microcontroller will automatically use the port 0 I/O lines to access

each instruction that is to be executed. In this case, port 0 cannot be utilized for

other purposes since the state of the I/O lines are constantly being modified to

access external code memory.

Note that there are no pull-up resistors on port 0, so it may be necessary to

include your own pull-up resistors depending on the characteristics of the parts you

will be driving via port 0.here small decoupling capacitor is connected in this port

0.

3.2.1.3 PORT 1:

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Port 1 consists of 8 I/O lines that you may use exclusively to interface to

external parts. Unlike port 0, typical derivatives do not use port 1 for any functions

themselves. Port 1 is commonly used to interface to external hardware such as

LCDs, keypads, and other devices. With 8052 derivatives, two bits of port 1 are

optionally used as described for extended timer 2 functions. These two lines are

not assigned these special functions on 8051ís since 8051ís don’t have a timer 2.

Further, these lines can still be used for your own purposes if you don’t need these

features of timer 2.

P1.0 (T2): If T2CON.1 is set (C/T2), then timer 2 will be incremented

whenever there is a 1-0 transition on this line. With C/T2 set, P1.0 is the clock

source for timer 2. P1.1 (T2EX): If timer 2 is in auto-reload mode and T2CON.3

(EXEN2) is set, a 1-0 transition on this line will cause timer 2 to be reloaded with

the auto-reload value. This will also cause the T2CON.6 (EXF2) external flag to be

set, which may cause an interrupt if so enabled.

3.2.1.4 PORT 2:

Like port 0, port 2 is dual-function. In some circuit designs it is available for

accessing devices while in others it is used to address external RAM or external

code memory. When the MOVX @DPTR instruction is used, port 2 is used to

output the high byte of the memory address that is to be accessed. In these cases,

port 2 may be used to access other devices as long as the devices are not being

accessed at the same time a MOVX instruction is using port 2 to address external

RAM. If the circuit requires external code memory, the microcontroller will

automatically use the port 2 I/O lines to access each instruction that is to be

executed.

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In this case, port 2 cannot be utilized for other purposes since the state of the

I/O lines are constantly being modified to access external code memory.

3.2.1.5 PORT 3:

Port 3 consists entirely of dual-function I/O lines. While the developer may

access all these lines from their software by reading/writing to the P3 SFR, each

pin has a pre-defined function that the microcontroller handles automatically when

configured to do so and/or when necessary. P3.0 (RXD): The UART/serial port

uses P3.0 as the receive line. In circuit designs that will be using the

microcontroller’s internal serial port, this is the line into which serial data will be

clocked. Note that when interfacing an 8052 to an RS-232 port that you may not

connect this line directly to the RS-232 pin; rather, you must pass it through a part

such as the MAX232 to obtain the correct voltage levels. This pin is available for

any use the developer may assign it if the circuit has no need to receive data via the

integrated serial port.

P3.1 (TXD): The UART/serial port uses P3.1 as the ‘transmit line.’ In circuit

designs that will be using the microcontroller’s internal serial port, this is the line

that the microcontroller will clock out all data which is written to the SBUF SFR.

Note that when interfacing an 8052 to an RS-232 port that you may not connect

this line directly to the RS-232 pin; rather, you must pass it through a part such as

the MAX232 to obtain the correct voltage levels. This pin is available for any use

the developer may assign it if the circuit has no need to transmit data via the

integrated serial port.

P3.2 (-INT0): When so configured, this line is used to trigger an ‘External 0

Interrupt.’ This may either be low-level triggered or may be triggered on a 1-0

transition. Please see the chapter on interrupts for details. This pin is available for

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any use the developer may assign it if the circuit does not need to trigger an

external 0 interrupt.

P3.3 (-INT1): When so configured, this line is used to trigger an ‘External 1

Interrupt.’ This may either be low-level triggered or may be triggered on a 1-0

transition. Please see the chapter on interrupts for details. This pin is available for

any use the developer may assign it if the circuit does not need to trigger an

external 1 interrupt.

P3.4 (T0): When so configured, this line is used as the clock source for timer

0. Timer 0 will be incremented either every instruction cycle that T0 is high or

every time there is a 1-0 transition on this line, depending on how the timer is

configured. Please see the chapter on timers for details. This pin is available for

any use the developer may assign it if the circuit does not to control timer 0

externally.

P3.5 (T1): When so configured, this line is used as the clock source for timer

1. Timer 1 will be incremented either every instruction cycle that T1 is high or

every time there is a 1-0 transition on this line, depending on how the timer is

configured. Please see the chapter on timers for details. This pin is available for

any use the developer may assign it if the circuit does not to control timer 1

externally.

P3.6 (-WR): This is external memory write strobe line. This line will be

asserted low by the microcontroller whenever a MOVX instruction writes to

external RAM. This line should be connected to the RAM’s write (-W) line. This

pin is available for any use the developer may assign it if the circuit does not write

to external RAM using MOVX.

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P3.7 (-RD): This is external memory write strobe line. This line will be

asserted low by the microcontroller whenever a MOVX instruction writes to

external RAM. This line should be connected to the RAM’s write (-W) line. This

pin is available for any use the developer may assign it if the circuit does not read

from external RAM using MOVX.

3.2.1.6 OSCILLATOR INPUTS (XTAL1, XTAL2):

The 8052 is typically driven by a crystal connected to pins 18 (XTAL2) and

19 (XTAL1). Common crystal frequencies are 11.0592Mhz as well as 12Mhz,

although many newer derivatives are capable of accepting frequencies as high as

40Mhz.

While a crystal is the normal clock source, this isn’t necessarily the case. A

TTL clock source may also be attached to XTAL1 and XTAL2 to provide the

microcontroller’s clock.

3.2.1.7 RESET LINE (RST):

Pin 9 is the master reset line for the microcontroller. When this pin is

brought high for two instruction cycles, the microcontroller is effectively reset.

SFRs, including the I/O ports, are restored to their default conditions and the

program counter will be reset to 0000h. Keep in mind that Internal RAM is not

affected by a reset. The microcontroller will begin executing code at 0000h when

pin 9 returns to a low state.

The reset line is often connected to a reset button/switch that the user may

press to reset the circuit. It is also common to connect the reset line to a watchdog

IC or a supervisor IC (such as MAX707).

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3.2.1.8 ADDRESS LATCH ENABLE (ALE):

The ALE at pin 30 is an output-only pin that is controlled entirely by the

microcontroller and allows the microcontroller to multiplex the low-byte of a

memory address and the 8-bit data itself on port 0. This is because, while the high-

byte of the memory address is sent on port 2, port 0 is used both to send the low

byte of the memory address and the data itself. This is accomplished by placing the

low-byte of the address on port 0, exerting ALE high to latch the low-byte of the

address into a latch IC (such as the 74HC573), and then placing the 8 data-bits on

port 0. In this way the 8052 is able to output a 16-bit address and an 8-bit data

word with 16 I/O lines instead of 24.

The ALE line is used in this fashion both for accessing external RAM with

MOVX @DPTR as well as for accessing instructions in external code memory.

When your program is executed from external code memory, ALE will pulse at a

rate of 1/6th that of the oscillator frequency. Thus if the oscillator is operating at

11.0592 MHz, ALE will pulse at a rate of 1,843,200 times per second. The only

exception is when the MOVX instruction is executed one ALE pulse is missed in

lieu of a pulse on WR or RD.

3.2.1.9 PROGRAM STORE ENABLE (PSEN):

The Program Store Enable (PSEN) line at pin 29 is exerted low

automatically by the microcontroller whenever it accesses external code memory.

This line should be attached to the Output Enable (-OE) pin of the EPROM that

contains your code memory.

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PSEN will not be exerted by the microcontroller and will remain in a high

state if your program is being executed from internal code memory.

3.2.1.10 EXTERNAL ACCESS (EA):

The External Access (EA) line at pin 31 is used to determine whether the

8052 will execute your program from external code memory or from internal code

memory.

If EA is tied high (connected to +5V) then the microcontroller will execute

the program it finds in internal/on-chip code memory. If EA is tied low (to ground)

then it will attempt to execute the program it finds in the attached external code

memory EPROM. Of course, your EPROM must be properly connected for the

microcontroller to be able to access your program in external code memory.

3.2.1.11 MEMORY ORGANIZATION:

The 8051 architecture provides both on chip memory as well as off chip

memory expansion capabilities. It supports several distinctive ‘physical’ address

spaces, functionally separated at the hardware level by different addressing

mechanisms, read and write controls signals or both:

On chip Program Memory

On chip Data Memory

Off chip Program Memory

Off chip Data Memory

On chip Special Function Registers

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The Program Memory area (EPROM incase of external memory or

Flash/EPROM incase of internal one) is extremely large and never lose

information when the power is removed. Program Memory is used for information

needed each time power is applied: Initialization values, Calibration data,

Keyboard lookup tables etc along with the program itself. The Program Memory

has a 16 bit address and any particular memory location is addressed using the 16

bit Program Counter and instructions which generate a 16 bit address.

On chip Data memory is smaller and therefore quicker than Program

Memory and it goes into a random state when power is removed. On chip RAM is

used for variables which are calculated when the program is executed.

In contrast to the Program Memory, on chip Data Memory accesses need a

single 8 bit value (may be a constant or another variable) to specify a unique

location. Since 8 bits are more than sufficient to address 128 RAM locations, the

on chip RAM address generating register is single byte wide.

Different addressing mechanisms are used to access these different memory

spaces and this greatly contributes to microcomputer’s operating efficiency.

The 64K byte Program Memory space consists of an internal and an external

memory portion. If the EA pin is held high, the 8051 executes out of internal

Program Memory unless the address exceeds 0FFFH and locations 1000H through

FFFFH are then fetched from external Program Memory. If the EA pin is held low,

the 8031 fetches all instructions from the external Program Memory. In either case,

the 16 bit Program Counter is the addressing mechanism.

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Figure.3.2 - Program Memory

The Data Memory address space consists of an internal and an external

memory space. External Data Memory is accessed when a MOVX instruction is

executed.

Apart from on chip Data Memory of size 128/256 bytes, total size of Data

Memory can be expanded up to 64K using external RAM devices.

Total internal Data Memory is divided into three blocks:

Lower 128 bytes.

Higher 128 bytes

Special Function Register space.

Higher 128 bytes are available only in 8032/8052 devices.

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Fig.3.3. Main Memory

Even though the upper RAM area and SFR area share same address

locations, they are accessed through different addressing modes. Direct addresses

higher than 7FH access SFR memory space and indirect addressing above 7FH

access higher 128 bytes (in 8032/8052).

Fig.3.4. Internal Data Memory

The next figure indicates the layout of lower 128 bytes. The lowest 32 bytes

(from address 00H to 1FH) are grouped into 4 banks of 8 registers. Program

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instructions refer these registers as R0 through R7. Program Status Word indicates

which register bank is being used at any point of time.

The next 16 bytes above these register banks form a block of bit addressable

memory space. The instruction set of 8031 contains a wide range of single bit

processing instructions and these instructions can directly access the 128 bits of

this area.

The SFR space includes port latches, timer and peripheral control registers.

All the members of 8031 family have same SFR at the same SFR locations. There

are some 16 unique locations which can be accessed as bytes and as bits.

3.21.12 COMMON MEMORY SPACE:

The 8031’s Data Memory may not be used for program storage. So it means

you can’t execute instructions out of this Data Memory. But, there is a way to have

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a single block of off chip memory acting as both Program and Data Memory. By

gating together both memory read controls (RD and PSEN) using an AND gate, a

common memory read control signal can be generated.

In this arrangement, both memory spaces are tied together and total

accessible memory is reduced from 128 Kbytes to 64 Kbytes.

The 8031 can read and write into this common memory block and it can be

used as Program and Data Memory.

You can use this arrangement during program development and debugging

phase. Without taking Microcontroller off the socket to program its internal ROM

(EPROM/Flash ROM), you can use this common memory for frequent program

storage and code modifications.

Basically, 8031’s assembly language instruction set consists of an operation

mnemonic and zero to three operands separated by commas. In two byte

instructions the destination is specified first, and then the source. Byte wide

mnemonics like ADD or MOV use the Accumulator as a source operand and also

to receive the result.

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3.3 BLOCK DIAGRAM:

Fig.3.5. Block Diagram of the 8051 Core

3.3.1 OSCILLATOR CHARACTERISTICS:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier which can be configured for use as an on chip oscillator, as shown in

Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the

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device from an external clock source, XTAL2 should be left unconnected while

XTAL1 is driven as shown in Figure 2.

There are no requirements on the duty cycle of the external clock signal,

since the input to the internal clocking circuitry is through a divide-by two flip-

flop, but minimum and maximum voltage high and low time specifications must be

observed.

3.3.2 8051 CLOCK:

8051 has an on-chip oscillator

It needs an external crystal

Crystal decides the operating frequency of the 8051

3.3.3 IDLE MODE:

In idle mode, the CPU puts itself to sleep while all the on-chip peripherals

remain active. The mode is invoked by software. The content of the on-chip RAM

and all the special functions registers remain unchanged during this mode. The idle

mode can be terminated by any enabled interrupt or by a hardware reset. It should

be noted that when idle is terminated by a hardware reset, the device normally

resumes program execution, from where it left off, up to two machine cycles

before the internal reset algorithm takes control. On-chip hardware inhibits access

to internal RAM in this event, but access to the port pins is not inhibited. To

eliminate the possibility of an unexpected write to a port pin when Idle is

terminated by reset, the instruction following the one that invokes Idle should not

be one that writes to a port pin or to external memory.

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3.3.4 POWER DOWN MODE:

In the power down mode the oscillator is stopped, and the instruction that

invokes power down is the last instruction executed. The on-chip RAM and

Special Function Registers retain their values until the power down mode is

terminated. The only exit from power down is a hardware reset. Reset redefines the

SFRs but does not change the on-chip RAM. The reset should not be activated

before VCC is restored to its normal operating level and must be held active long

enough to allow the oscillator to restart and stabilize.

3.3.5 8051 RESET:

RESET is an active High input

When RESET is set to High, 8051 goes back to the power on state

Power-On Reset

Push PB and active High on RST

Release PB, Capacitor discharges and RST goes low

RST must stay high for a min of 2 machine cycles

Fig.3.7.8051 RESET

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3.3.6 CENTRAL PROCESSING UNIT:

The CPU is the brain of the microcontrollers reading user’s programs and

executing the expected task as per instructions stored there in. Its primary elements

are an 8 bit Arithmetic Logic Unit (ALU), Accumulator (Acc), few more 8 bit

registers, B register, Stack Pointer (SP), Program Status Word (PSW) and 16 bit

registers, Program Counter (PC) and Data Pointer Register (DPTR).

3.3.7 THE ACCUMULATOR:

If worked with any other assembly language you will be familiar with the

concept of an accumulator register. The Accumulator, as its name suggests, is used

as a general register to accumulate the results of a large number of instructions. It

can hold an 8-bit (1-byte) value and is the most versatile register the 8052 has due

to the sheer number of instructions that make use of the accumulator. More than

half of the 8052ís 255 instructions manipulate or use the Accumulator in some

way.

For example, if you want to add the number 10 and 20, the resulting 30 will

be stored in the Accumulator. Once you have a value in the Accumulator you may

continue processing the value or you may store it in another register or in memory.

3.3.8 THE "R" REGISTERS:

The "R" registers are sets of eight registers that are named R0, R1, through

R7. These registers are used as auxiliary registers in many operations. To continue

with the above example, perhaps you are adding 10 and 20.

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The original number 10 may be stored in the Accumulator whereas the value

20 may be stored in, say, register R4. To process the addition you would execute

the command:

As mentioned earlier, there are four sets of ‘R’ registers, register bank 0, 1,

2, and 3. When the 8052 is first powered up, register bank 0 (addresses 00h

through 07h) is used by default.

In this case, for example, R4 is the same as Internal RAM address 04h.

However, your program may instruct the 8052 to use one of the alternate register

banks; i.e., register banks 1, 2, or 3. In this case, R4 will no longer be the same as

Internal RAM address 04h. For example, if your program instructs the 8052 to use

register bank 1, register R4 will now be synonymous with Internal RAM address

0Ch. If you select register bank 2, R4 is synonymous with 14h, and if you select

register bank 3 it is synonymous with address 1Ch.

The concept of register banks adds a great level of flexibility to the 8052,

especially when dealing with interrupts (we'll talk about interrupts later). However,

always remember that the register banks really reside in the first 32 bytes of

Internal RAM.

3.3.9 THE "B" REGISTER:

The "B" register is very similar to the Accumulator in the sense that it may

hold an 8-bit (1-byte) value. The "B" register is only used implicitly by two 8052

instructions: MUL AB and DIV AB. Thus, if you want to quickly and easily

multiply or divide A by another number, you may store the other number in "B"

and make use of these two instructions. Aside from the MUL and DIV an

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instruction, the “B” register is often used as yet another temporary storage register

much like a ninth "R" register.

3.3.10 THE PROGRAM COUNTER (PC):

The Program Counter (PC) is a 2-byte address that tells the 8052 where the

next instruction to execute is found in memory. When the 8052 is initialized PC

always starts at 0000h and is incremented each time an instruction is executed. It is

important to note that PC isn’t always incremented by one. Since some instructions

are 2 or 3 bytes in length the PC will be incremented by 2 or 3 in these cases.

The Program Counter is special in that there is no way to directly modify its

value. That is to say, you can’t do something like PC=2430h. On the other hand, if

you execute LJMP 2430h you’ve effectively accomplished the same thing.

It is also interesting to note that while you may change the value of PC (by

executing a jump instruction, etc.) there is no way to read the value of PC. That is

to say, there is no way to ask the 8052 "What address are you about to execute?"

As it turns out, this is not completely true: There is one trick that may be used to

determine the current value of PC.

3.3.11 THE DATA POINTER (DPTR):

The Data Pointer (DPTR) is the 8052ís only user-accessible 16-bit (2-byte)

register. The Accumulator, "R" registers, and "B" register are all 1-byte values.

The PC just described is a 16-bit value but isn’t directly user-accessible as a

working register. DPTR, as the name suggests, is used to point to data. It is used by

a number of commands that allow the 8052 to access external memory. When the

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8052 accesses external memory it accesses the memory at the address indicated by

DPTR.

While DPTR is most often used to point to data in external memory or code

memory, many developers take advantage of the fact that it’s the only true 16-bit

register available. It is often used to store 2-byte values that have nothing to do

with memory locations.

3.3.12 THE STACK POINTER (SP):

The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit

(1-byte) value. The Stack Pointer is used to indicate where the next value to be

removed from the stack should be taken from. When you push a value onto the

stack, the 8052 first increments the value of SP and then stores the value at the

resulting memory location. When you pop a value off the stack, the 8052 returns

the value from the memory location indicated by SP, and then decrements the

value of SP.

This order of operation is important. When the 8052 is initialized SP will be

initialized to 07h. If you immediately push a value onto the stack, the value will be

stored in Internal RAM address 08h. This makes sense taking into account what

was mentioned two paragraphs above: First the 8051 will increment the value of

SP (from 07h to 08h) and then will store the pushed value at that memory address

(08h). SP is modified directly by the 8052 by six instructions: PUSH, POP,

ACALL, LCALL, RET, and RETI. It is also used intrinsically whenever an

interrupt is triggered (more on interrupts later. Don’t worry about them for now!).

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3.3.13 INPUT / OUTPUT PORTS:

The 8031’s I/O port structure is extremely versatile and flexible. The device

has 32 I/O pins configured as four eight bit parallel ports (P0, P1, P2 and P3). Each

pin can be used as an input or as an output under the software control. These I/O

pins can be accessed directly by memory instructions during program execution to

get required flexibility.

These port lines can be operated in different modes and all the pins can be

made to do many different tasks apart from their regular I/O function executions.

Instructions, which access external memory, use port P0 as a multiplexed

address/data bus. At the beginning of an external memory cycle, low order 8 bits of

the address bus are output on P0. The same pins transfer data byte at the later stage

of the instruction execution.

Also, any instruction that accesses external Program Memory will output the

higher order byte on P2 during read cycle. Remaining ports, P1 and P3 are

available for standard I/O functions. But all the 8 lines of P3 support special

functions: Two external interrupt lines, two counter inputs, serial port’s two data

lines and two timing control strobe lines are designed to use P3 port lines. When

you don’t use these special functions, you can use corresponding port lines as a

standard I/O.

Even within a single port, I/O operations may be combined in many ways.

Different pins can be configured as input or outputs independent of each other or

the same pin can be used as an input or as output at different times. You can

comfortably combine I/O operations and special operations for Port 3 lines.

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3.3.14 TIMERS / COUNTERS:

8031 has two 16 bit Timers/Counters capable of working in different modes.

Each consists of a ‘High’ byte and a ‘Low’ byte which can be accessed under

software. There is a mode control register and a control register to configure these

timers/counters in number of ways.

These timers can be used to measure time intervals, determine pulse widths

or initiate events with one microsecond resolution up to a maximum of 65

millisecond (corresponding to 65, 536 counts). Use software to get longer delays.

Working as counter, they can accumulate occurrences of external events (from DC

to 500 KHz) with 16 bit precision.

3.3.15 INTERRUPTS:

The 8031 has five interrupt sources: one from the serial port when a

transmission or reception operation is executed; two from the timers when

overflow occurs and two come from the two input pins INT0, INT1.

Each interrupt may be independently enabled or disabled to allow polling on

same sources and each may be classified as high or low priority.

A high priority source can override a low priority service routine. These

options are selected by interrupt enable and priority control registers, IE and IP.

When an interrupt is activated, then the program flow completes the

execution of the current instruction and jumps to a particular program location

where it finds the interrupt service routine. After finishing the interrupt service

routine, the program flows return to back to the original place.

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The Program Memory address, 0003H is allotted to the first interrupt and

next seven bytes can be used to do any task associated with that interrupt.

Interrupt Source Service routine starting address:

External 0 0003H

Timer/Counter 0 000BH

External 1 0013H

Timer/counter 1 001BH

Serial port 0023H

3.3.16 SERIAL PORT:

Each 8031 microcomputer contains a high speed full duplex (means you can

simultaneously use the same port for both transmitting and receiving purposes)

serial port which is software configurable in 4 basic modes: 8 bit UART; 9 bit

UART; Interprocessor Communications link or as shift register I/O expander.

For the standard serial communication facility, 8031 can be programmed for

UART operations and can be connected with regular personal computers, teletype

writers, modem at data rates between 122 bauds and 31 kilo bauds.

Getting this facility is made very simple using simple routines with option to

select even or odd parity. You can also establish a kind of Interprocessor

communication facility among many microcomputers in a distributed environment

with automatic recognition of address/data.

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Apart from all above, you can also get super fast I/O lines using low cost

simple TTL or CMOS shift registers.

3.3.17APPLICATIONS:

Security applications

Image processing applications

Banking applications

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CHAPTER-4

CHAPTER-4

SERIAL COMMUNICATION

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4.1 INTRODUCTION:

Serial communication is basically the transmission or reception of data one

bit at a time. Today's computers generally address data in bytes or some multiple

thereof. A byte contains 8 bits. A bit is basically either a logical 1 or zero. Every

character on this page is actually expressed internally as one byte. The serial port is

used to convert each byte to a stream of ones and zeroes as well as to convert a

stream of ones and zeroes to bytes. The serial port contains a electronic chip called

a Universal Asynchronous Receiver/Transmitter (UART) that actually does the

conversion.

The serial port has many pins. We will discuss the transmit and receive pin

first. Electrically speaking, whenever the serial port sends a logical one (1) a

negative voltage is effected on the transmit pin. Whenever the serial port sends a

logical zero (0) a positive voltage is affected. When no data is being sent, the serial

port's transmit pin's voltage is negative (1) and is said to be in a MARK state. Note

that the serial port can also be forced to keep the transmit pin at a positive voltage

(0) and is said to be the SPACE or BREAK state. (The terms MARK and SPACE

are also used to simply denote a negative voltage (1) or a positive voltage (0) at the

transmit pin respectively).

When transmitting a byte, the UART (serial port) first sends a START BIT

which is a positive voltage (0), followed by the data (general 8 bits, but could be 5,

6, 7, or 8 bits) followed by one or two STOP Bits which is a negative(1) voltage.

The sequence is repeated for each byte sent. Figure 1 shows a diagram of what a

byte transmission would look like.

At this point you may want to know what the duration of a bit is. In other

words, how long does the signal stay in a particular state to define a bit. The

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answer is simple. It is dependent on the baud rate. The baud rate is the number of

times the signal can switch states in one second. Therefore, if the line is operating

at 9600 baud, the line can switch states 9,600 times per second. This means each

bit has the duration of 1/9600 of a second or about 100µsec.

when transmitting a character there are other characteristics other than the

baud rate that must be known or that must be setup. These characteristics define

the entire interpretation of the data stream. The first characteristic is the length of

the byte that will be transmitted. This length in general can be anywhere from 5 to

8 bits.

The second characteristic is parity. The parity characteristic can be even,

odd, mark, space, or none. If even parity, then the last data bit transmitted will be a

logical 1 if the data transmitted had an even amount of 0 bits. If odd parity, then

the last data bit transmitted will be a logical 1 if the data transmitted had an odd

amount of 0 bits. If MARK parity, then the last transmitted data bit will always be

a logical 1. If SPACE parity, then the last transmitted data bit will always be a

logical 0. If no parity then there is no parity bit transmitted.

The third characteristic is the amount of stop bits. This value in general is 1

or 2. Assume we want to send the letter 'A' over the serial port. The binary

representation of the letter 'A' is 01000001. Remembering that bits are transmitted

from least significant bit (LSB) to most significant bit (MSB), the bit stream

transmitted would be as follows for the line characteristics 8 bits, no parity, 1 stop

bit and 9600 baud.

LSB (0 1 0 0 0 0 0 1 0 1) MSB

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The above represents (Start Bit) (Data Bits) (Stop Bit). To calculate the

actual byte transfer rate simply divide the baud rate by the number of bits that must

be transferred for each byte of data. In the case of the above example, each

character requires 10 bits to be transmitted for each character. As such, at 9600

baud, up to 960 bytes can be transferred in one second.

The above discussion was concerned with the "electrical/logical"

characteristics of the data stream. We will expand the discussion to line protocol.

Serial communication can be half duplex or full duplex. Full duplex

communication means that a device can receive and transmit data at the same time.

Half duplex means that the device cannot send and receive at the same time. It can

do them both, but not at the same time. Half duplex communication is all but

outdated except for a very small focused set of applications.

Half duplex serial communication needs at a minimum two wires, signal

ground and the data line. Full duplex serial communication needs at a minimum

three wires, signal ground, transmit data line, and receive data line. The RS232

specification governs the physical and electrical characteristics of serial

communications. This specification defines several additional signals that are

asserted (set to logical 1) for information and control beyond the data signal

These signals are the Carrier Detect Signal (CD), asserted by modems to

signal a successful connection to another modem, Ring Indicator (RI), asserted by

modems to signal the phone ringing, Data Set Ready (DSR), asserted by modems

to show their presence, Clear To Send (CTS), asserted by modems if they can

receive data, Data Terminal Ready (DTR), asserted by terminals to show their

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presence, Request To Send (RTS), asserted by terminals if they can receive data.

The section RS232 Cabling describes these signals and how they are connected.

The above paragraph alluded to hardware flow control. Hardware flow

control is a method that two connected devices use to tell each other electronically

when to send or when not to send data. A modem in general drops (logical 0) its

CTS line when it can no longer receive characters. It re-asserts it when it can

receive again. A terminal does the same thing instead with the RTS signal. Another

method of hardware flow control in practice is to perform the same procedure in

the previous paragraph except that the DSR and DTR signals.

Note that hardware flow control requires the use of additional wires. The

benefit to this however is crisp and reliable flow control. Another method of flow

control used is known as software flow control. This method requires a simple 3

wire serial communication link, transmit data, receive data, and signal ground. If

using this method, when a device can no longer receive, it will transmit a character

that the two devices agreed on. This character is known as the XOFF character.

This character is generally a hexadecimal 13. When a device can receive again it

transmits an XON character that both devices agreed to. This character is generally

a hexadecimal 11.

4.2 NULL MODEM:

Serial communications with RS232. One of the oldest and most widely

spread communication methods in computer world. The way this type of

communication can be performed is pretty well defined in standards. I.e. with one

exception. The standards show the use of DTE/DCE communication, the way a

computer should communicate with a peripheral device like a modem. For your

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information, DTE means Data Terminal Equipment (computers etc.) where DCE

is the abbreviation of Data Communication Equipment (modems).

One of the main uses of serial communication today where no modem is

involved—a serial null modem configuration with DTE/DTE communication—is

not so well defined, especially when it comes to flow control. The terminology null

modem for the situation where two computers communicate directly is so often

used nowadays, that most people don't realize anymore the origin of the phrase and

that a null modem connection is an exception, not the rule.

In history, practical solutions were developed to let two computers talk with

each other using a null modem serial communication line. In most situations, the

original modem signal lines are reused to perform some sort of handshaking.

Handshaking can increase the maximum allowed communication speed because it

gives the computers the ability to control the flow of information. A high amount

of incoming data is allowed if the computer is capable to handle it, but not if it is

busy performing other tasks. If no flow control is implemented in the null modem

connection, communication is only possible at speeds at which it is sure the

receiving side can handle the amount information even under worst case

conditions.

4.3 RS232:

When we look at the connector pin out of the RS232 port, we see two pins

which are certainly used for flow control. These two pins are RTS, request to send

and CTS, clear to send. With DTE/DCE communication (i.e. a computer

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communicating with a modem device) RTS is an output on the DTE and input on

the DCE. CTS are the answering signal coming from the DCE.

Before sending a character, the DTE asks permission by setting its RTS

output. No information will be sent until the DCE grants permission by using the

CTS line.

If the DCE cannot handle new requests, the CTS signal will go low. A

simple but useful mechanism allowing flow control in one direction. The

assumption is that the DTE can always handle incoming information faster than

the

DCE can send it. In the past, this was true. Modem speeds of 300 baud were

common and 1200 baud was seen as a high speed connection.

For further control of the information flow, both devices have the ability to

signal their status to the other side. For this purpose, the DTR data terminal ready

and DSR data set ready signals are present. The DTE uses the DTR signal to

signal that it is ready to accept information, whereas the DCE uses the DSR signal

for the same purpose. Using these signals involves not a small protocol of

requesting and answering as with the RTS/CTS handshaking. These signals are in

one direction only.

The last flow control signal present in DTE/DCE communication is the CD

carrier detect. It is not used directly for flow control, but mainly an indication of

the ability of the modem device to communicate with its counter part. This signal

indicates the existence of a communication link between two modem devices.

4.4 NULL MODEM WITHOUT HANDSHAKING:

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How to use the handshaking lines in a null modem configuration? The

simplest way is to don't use them at all. In that situation, only the data lines and

signal ground are cross connected in the null modem communication cable. All

other pins have no connection. An example of such a null modem cable without

handshaking can be seen in the figure below.

Connector 1Connector

2Function

2 3 Rx TX

3 2 TX Rx

5 5 Signal ground

Fig.4.1. Simple null modem without handshaking

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4.5 COMPATIBILITY ISSUES:

If you read about null modems, this three wire null modem cable is often

talked about. Yes, it is simple but can we use it in all circumstances? There is a

problem, if either of the two devices checks the DSR or CD inputs. These signals

normally define the ability of the other side to communicate. As they are not

connected, their signal level will never go high. This might cause a problem.

The same holds for the RTS/CTS handshaking sequence. If the software on

both sides is well structured, the RTS output is set high and then a waiting cycle is

started until a ready signal is received on the CTS line. This causes the software to

hang because no physical connection is present to either CTS line to make this

possible. The only type of communication which is allowed on such a null modem

line is data-only traffic on the cross connected Rx/TX lines.

This does however not mean that this null modem cable is useless.

Communication links like present in the Norton Commander program can use this

null modem cable. This null modem cable can also be used when communicating

with devices which do not have modem control signals like electronic measuring

equipment etc.

As you can imagine, with this simple null modem cable no hardware flow control

can be implemented. The only way to perform flow control is with software flow

control using the XOFF and XON characters.

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CHAPTER-5

SOFTWARE CODING

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6.1 TYPES OF TOOLS:

KEIL C

SigID

VISUAL BASIC

6.1.1 KEIL C:

Keil software is the leading vendor for 8/16-bit development tools (ranked at

first position in the 2004 embedded market study of the embedded system and EE

times magazine).

Keil software is represented world wide in more than 40 countries, since the

market introduction in 1988; the keil C51 compiler is the de facto industry standard

and supports more than 500 current 8051 device variants. Now, keil software

offers development tools for ARM.

Keil software makes C compilers, macro assemblers, real-time kernels,

debuggers, simulators, integrated environments, and evaluation boards for 8051,

251, ARM and XC16x/C16x/ST10 microcontroller families.

The Keil C51 C Compiler for the 8051 microcontroller is the most popular

8051 C compiler in the world. It provides more features than any other 8051 C

compiler available today.

The C51 Compiler allows you to write 8051 microcontroller applications in

C that, once compiled, have the efficiency and speed of assembly language.

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Language extensions in the C51 Compiler give you full access to all resources of

the 8051.

The C51 Compiler translates C source files into relocatable object modules

which contain full symbolic information for debugging with the µVision Debugger

or an in-circuit emulator. In addition to the object file, the compiler generates a

listing file which may optionally include symbol table and cross reference

Nine basic data types, including 32-bit IEEE floating-point,

Flexible variable allocation with bit, data, bdata, idata, xdata, and pdata memory types,

Interrupt functions may be written in C, Full use of the 8051 register banks,

Complete symbol and type information for source-level debugging,

Use of AJMP and ACALL instructions,

Bit-addressable data objects, Built-in interface for the RTX51 real time kernels,

Support for the Philips 8xC750, 8xC751, and 8xC752 limited instruction sets,

Support for the Infineon 80C517 arithmetic unit.

6.1.2 SigID :

SigID.ocx is an Active-X control that allows the developer to capture encrypted fingerprint templates, store them, and use them later to compare against newly-captured fingerprints on-the-fly.

Each fingerprint template is automatically encrypted prior to its delivery to the developer.

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NOTE: It’s important to understand there are two possible ways to use the SigID ActiveX control:

1-Portable: The developer is handed back the fingerprint template with which to compare later fingerprints in a portable file format (.TFT) or ASCII hex string (for easy database storage).

This allows maximum flexibility in terms of storing fingerprint templates, but certain fingerprint comparisons are not possible using this approach (namely one-to-many searches).

2-Maximized: A proprietary, encrypted database (a DAT file) is used to store the fingerprint templates.

Whereas this approach limits the storage flexibility of approach 1, it maximizes fingerprint comparisons in terms of speed and possible search options (namely one-to-many searches).

These approaches are mutually exclusive, and the developer must decide which approach best suits the application.

Methods beginning with the prefix pr (portable) signify methods falling under approach #1, the most portable option.

Methods beginning with the prefix db (database) signify methods falling under approach #2, the maximized proprietary database option.

Methods that begin with neither prefix are neutral methods, and another dependent upon one approach another.

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As the user places their finger on the sensor the image will appear in the olive box. To enroll a fingerprint for a file (and string) the user will need to place their finger on the sensor three times as SigID instructs. After the third scan the fingerprint will be enrolled.

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Finger Alignment: The ID Gem fingerprint sensor is a reliable and high-quality electronic fingerprint capture device. To capture the best fingerprint image, it is important for the user to align the center of the fingertip’s whorl in the center of the sensor. The fingerprint alignment guide on the ID Gem sensor is designed to fit an average adult thumb. Persons with small fingers, such as children, may instinctively align their fingers with the top of the alignment guide, resulting in a low-quality image that doesn’t fully capture the finger’s

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6.1.3 VISUAL BASIC:

Visual Basic for Applications (VBA) is an implementation of Microsoft's event-driven programming language Visual Basic 6, and associated integrated development environment (IDE), which is built into most Microsoft Office applications.

VBA enables developers to build user defined functions, automate processes, and access Win32 and other low-level functionality through DLLs. It was also built into Office applications apart from version 2008 for Apple's Mac OS X, other Microsoft applications such as Microsoft MapPoint and Microsoft Visio; as well as being at least partially implemented in some other applications such as AutoCAD, WordPerfect, and ArcGIS. It supersedes and expands on the capabilities of earlier application-specific macro programming languages such as Word's WordBasic, and can be used to control many aspects of the host application, including manipulating user interface features, such as menus and toolbars, and working with

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custom user forms or dialog boxes. VBA can also be used to create import and export filters for various file formats, such as ODF.

As its name suggests, VBA is closely related to Visual Basic and uses the Visual Basic Runtime, but can normally only run code within a host application rather than as a standalone application. It can, however, be used to control one application from another using OLE Automation. For example, it is used to automatically create a Word report from Excel data, in turn automatically collected by Excel from polled observation sensors. The VBA IDE is reached from within an Office document by pressing the key sequence Alt+F11.

VBA is functionally rich and flexible but it does have some important limitations, such as restricted support for function pointers which are used as callback functions in the Windows API. It has the ability to use (but not create) (ActiveX/COM) DLLs, and later versions add support for class modules.

Language

Code written in VBA is compiled to a proprietary intermediate language called P-code (packed code), which the hosting applications (Access, Excel, Word, and PowerPoint) store as a separate stream in COM Structured Storage files (e.g., .doc or .xls) independent of the document streams.

The intermediate code is then executed by a virtual machine (hosted by the hosting application). Despite its resemblance to many old BASIC dialects (particularly Microsoft BASIC, from which it is indirectly derived), VBA is not compatible with any of them except Microsoft Visual Basic, where source-code of VBA Modules and Classes can be directly imported, and which shares the same library and virtual machine.

Compatibility ends with Visual Basic version 6; VBA is not compatible with VB.NET. VBA is proprietary to Microsoft and, apart from the COM interface, is not an open standard.

Object models

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To use VBA with an application such as Access, Word, or Excel, terminology and language constructions are needed to interact with the applicationThis portion of VBA is called the Object Model for the application. A map of the object model is online for Excel and for Word.

A listing of the object model is found by opening the Macro/VBA editor in the target application and then using "View" to open the "Object Browser" (F2).

Much of the difficulty in using VBA is related to learning the object model, which uses names invented by the originators of the model that may be less than transparent to a new user.

One way to learn the terms and syntax of the object model is to use the macro recorder to record the steps taken to achieve a desired result using the mouse and menus of the application. Once this is done, the VBA code constructed by the recorder can be viewed in the VBA editor, and often greatly streamlined or generalized with only a modicum of understanding of VBA itself. Unfortunately, the macro recorder does not always record everything (particularly for graphs), and some applications employing VBA do not provide a recorder at all.

Use of debugging tools to discover VBA constructs for some cases where the macro recorder does not work are described by Jelen and Syrstad,[5] but some steps may remain obscure.

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CHAPTER-7

CHAPTER-7

HARDWARE TOOLS

Microcontroller(DS89C450)

LCD

RS232 Serial Communication

Keypad

Finger Print sensor

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GSM Modem

7.1 GSM MODEM:

7.1.1 DEFINITION:

Global system for mobile communication (GSM) is a globally accepted

standard for digital cellular communication. GSM is the name of a standardization

group established in 1982 to create a common European mobile telephone standard

that would formulate specifications for a pan-European mobile cellular radio

system operating at 900 MHz.

7.1.2 THE GSM NETWORK

GSM provides recommendations, not requirements. The GSM specifications

define the functions and interface requirements in detail but do not address the

hardware. The reason for this is to limit the designers as little as possible but still to

make it possible for the operators to buy equipment from different suppliers. The

GSM network is divided into three major systems: the switching system (SS), the

base station system (BSS), and the operation and support system (OSS). The basic

GSM network elements

7.1.3 GSM MODEM:

A GSM modem is a wireless modem that works with a GSM wireless

network. A wireless modem behaves like a dial-up modem. The main difference

between them is that a dial-up modem sends and receives data through a fixed

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telephone line while a wireless modem sends and receives data through radio

waves.

A GSM modem can be an external device or a PC Card / PCMCIA Card.

Typically, an external GSM modem is connected to a computer through a serial

cable or a USB cable. A GSM modem in the form of a PC Card / PCMCIA Card is

designed for use with a laptop computer. It should be inserted into one of the PC

Card / PCMCIA Card slots of a laptop computer. Like a GSM mobile phone, a

GSM modem requires a SIM card from a wireless carrier in order to operate.

As mentioned in earlier sections of this SMS tutorial, computers use AT

commands to control modems. Both GSM modems and dial-up modems support a

common set of standard AT commands. You can use a GSM modem just like a

dial-up modem.

In addition to the standard AT commands, GSM modems support an

extended set of AT commands. These extended AT commands are defined in the

GSM standards. With the extended AT commands, you can do things like:

Reading, writing and deleting SMS messages.

Sending SMS messages.

Monitoring the signal strength.

Monitoring the charging status and charge level of the battery.

Reading, writing and searching phone book entries.

The number of SMS messages that can be processed by a GSM modem per

minute is very low -- only about six to ten SMS messages per minute.

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7.1.4 GSM MODEM APPLICATIONS:

7.1.5 FACTS AND APPLICATIONS OF GSM/GPRS MODEM:

The GSM/GPRS Modem comes with a serial interface through which the

modem can be controlled using AT command interface. An antenna and a power

adapter are provided. The basic segregation of working of the modem is as under

• Voice calls

• SMS

• GSM Data calls

• GPRS

Voice calls:

Voice calls are not an application area to be targeted. In future if interfaces

like a microphone and speaker are provided for some applications then this can be

considered.

SMS:

SMS is an area where the modem can be used to provide features like:

• Pre-stored SMS transmission

• These SMS can be transmitted on certain trigger events in an automation

system

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• SMS can also be used in areas where small text information has to be sent.

The transmitter can be an automation system or machines like vending machines,

collection machines or applications like positioning systems where

The navigator keeps on sending SMS at particular time intervals. SMS can be a

solution where GSM data call or GPRS services are not available

7.1.6 APPLICATIONS:

Access control devices:

Now access control devices can communicate with servers and security staff

through SMS messaging. Complete log of transaction is available at the head-

office Server instantly without any wiring involved and device can instantly alert

security personnel on their mobile phone in case of any problem. RaviRaj

Technologies is introducing this technology in all Fingerprint Access control and

time attendance products.

Transaction terminals:

EDC machines, POS terminals can use SMS messaging to confirm

transactions from central servers. The main benefit is that central server can be

anywhere in the world. Today you need local servers in every city with multiple

telephone lines. You save huge infrastructure costs as well as per transaction cost.

Supply Chain Management:

Today SCM require huge IT infrastructure with leased lines, networking

devices, data centre, workstations and still you have large downtimes and high

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costs. You can do all this at a fraction of the cost with GSM M2M technology.

A central server in your head office with GSM capability is the answer; you can

receive instant transaction data from all your branch officers, warehouses and

business associates with nil downtime, Low cost

7.1.7 APPLICATIONS SUITABLE FOR GSM COMMUNICATION:

If your application needs one or more of the following features, GSM will be

more cost-effective then other communication systems.

Short Data Size:

You data size per transaction should be small like 1-3 lines. e.g. banking

transaction data, sales/purchase data, consignment tracking data, updates. These

small but important transaction data can be sent through SMS messaging which

cost even less then a local telephone call or sometimes free of cost worldwide.

Hence with negligible cost you are able to send critical information to your head

office located anywhere in the world from multiple points.

You can also transfer faxes, large data through GSM but this will be as or

more costly compared to landline networks.

Multiple remote data collection points:

If you have multiple data collections points situated all over your city, state,

country or worldwide you will benefit the most. The data can be sent from multiple

points like your branch offices, business associates, warehouses, and agents with

devices like GSM modems connected to PCs, GSM electronic terminals and

Mobile phones. Many a times some places like warehouses may be situated at

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remote location may not have landline or internet but you will have GSM network

still available easily.

High uptime:

If your business require high uptime and availability GSM is best suitable

for you as GSM mobile networks have high uptime compared to landline, internet

and other communication mediums. Also in situations where you expect that

someone may sabotage your communication systems by cutting wires or taping

landlines, you can depend on GSM wireless communication.

Large transaction volumes:

GSM SMS messaging can handle large number of transaction in a very

short time. You can receive large number SMS messages on your server like e-

mails without internet connectivity. E-mails normally get delayed a lot but SMS

messages are almost instantaneous for instant transactions. Consider situation like

shop owners doing credit card transaction with GSM technology instead of

conventional landlines. time you find local transaction servers busy as these

servers use multiple telephone lines to take care of multiple transactions, whereas

one GSM connection is enough to handle hundreds of transaction.

Mobility, Quick installation:

GSM technology allows mobility, GSM terminals, modems can be just

picked and installed at other location unlike telephone lines. Also you can be

mobile with GSM terminals and can also communicate with server using your

mobile phone. You can just purchase the GSM hardware like modems, terminals

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and mobile handsets, insert SIM cards, configure software and your are ready for

GSM communication.

7.2 RS 232

When we look at the connector pin out of the RS232 port, we see

two pins which are certainly used for flow control. These two pins are RTS,

request to send and CTS, clear to send. With DTE/DCE communication (i.e. a

computer communicating with a modem device) RTS is an output on the DTE and

input on the DCE. CTS are the answering signal coming from the DCE.

Before sending a character, the DTE asks permission by setting its RTS

output. No information will be sent until the DCE grants permission by using the

CTS line.

If the DCE cannot handle new requests, the CTS signal will go low. A

simple but useful mechanism allowing flow control in one direction. The

assumption is that the DTE can always handle incoming information faster than

the DCE can send it. In the past, this was true. Modem speeds of 300 baud were

common and 1200 baud was seen as a high speed connection.

For further control of the information flow, both devices have the ability to

signal their status to the other side. For this purpose, the DTR data terminal ready

and DSR data set ready signals are present. The DTE uses the DTR signal to

signal that it is ready to accept information, whereas the DCE uses the DSR signal

for the same purpose. Using these signals involves not a small protocol of

requesting and answering as with the RTS/CTS handshaking. These signals are in

one direction only.

The last flow control signal present in DTE/DCE communication is the CD

carrier detect. It is not used directly for flow control, but mainly an indication of

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the ability of the modem device to communicate with its counter part. This signal

indicates the existence of a communication link between two modem devices.

7.2.1 MAX 232

Introduction

MAX-232 is primary used for people building electronics with an RS-232

interface. Serial RS-232 communication works with voltages (-15V ... -3V for

high) and +3V ... +15V for low) which are not compatible with normal computer

logic voltages. To receive serial data from an RS-232 interface the voltage has to

be reduced, and the low and high voltage level inverted. In the other direction

(sending data from some logic over RS-232) the low logic voltage has to be

"bumped up", and a negative voltage has to be generated, too.

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Fig 5.11 Pin Diagram Of Max 232

RS232 COMMUNICATION

Introduction

In telecommunications, RS-232 is a standard for serial binary data interconnection

between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating

Equipment). It is commonly used in computer serial ports.

Scope of the Standard:

The Electronic Industries Alliance (EIA) standard RS-232-C [3] as of 1969

defines:

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Electrical signal characteristics such as voltage levels, signaling rate, timing and

slew-rate of signals, voltage withstand level, short-circuit behavior, maximum

stray capacitance and cable length

Interface mechanical characteristics, pluggable connectors and pin

identification

Functions of each circuit in the interface connector

Standard subsets of interface circuits for selected telecom applications

The standard does not define such elements as character encoding (for example,

ASCII, Baudot or EBCDIC), or the framing of characters in the data stream (bits

per character, start/stop bits, parity). The standard does not define protocols for

error detection or algorithms for data compression.

The standard does not define bit rates for transmission, although the standard says

it is intended for bit rates lower than 20,000 bits per second. Many modern devices

can exceed this speed (38,400 and 57,600 bit/s being common, and 115,200 and

230,400 bit/s making occasional appearances) while still using RS-232 compatible

signal levels.

Details of character format and transmission bit rate are controlled by the serial

port hardware, often a single integrated circuit called a UART that converts data

from parallel to serial form. A typical serial port includes specialized driver and

receiver integrated circuits to convert between internal logic levels and RS-232

compatible signal levels.

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Circuit Working Description

In this circuit the MAX 232 IC used as level logic converter. The MAX232 is a

dual driver/receiver that includes a capacive voltage generator to supply EIA 232

voltage levels from a single 5v supply. Each receiver converts EIA-232 to 5v

TTL/CMOS levels. Each driver converts TLL/CMOS input levels into EIA-232

levels.

In this circuit the microcontroller transmitter pin is connected in the MAX232

T2IN pin which converts input 5v TTL/CMOS level to RS232 level. Then T2OUT

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pin is connected to reviver pin of 9 pin D type serial connector which is directly

connected to PC.

In PC the transmitting data is given to R2IN of MAX232 through transmitting pin

of 9 pin D type connector which converts the RS232 level to 5v TTL/CMOS level.

The R2OUT pin is connected to receiver pin of the microcontroller. Likewise the

data is transmitted and received between the microcontroller and PC or other

device vice versa.

7.2 LCD DISPLAY

Pin 1 - GND

Pin 2 - VCC (+5V)

Pin 3 – Contrast

Pin 4 – RS

Pin 5 – R/W

Pin 6 – Enable

Pin 7-14 – Data(DB7-DB14)

Pin 15 – LED+

Pin 16 – LED-

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The HD44780U dot-matrix liquid crystal display controller and driver LSI displays alphanumeric, Japanese kana characters, and symbols. It can be configured to drive a dot-matrix liquid crystal display under the control of a 4- or 8-bit microprocessor. Since all the functions such as display RAM, character generator, and liquid crystal driver, required for driving a dot-matrix liquid crystal display are internally provided on one chip, a minimal system can be interfaced with this controller/driver

8.CONCLUSION

9.APPENDIX

10.REFERENCES

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