620 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 43, NO. 4, AUGUST 1994

Self-Calibration/Compensation Technique for Microcontroller-Based Sensor Arrays

Paul T. Kolen

Abstruct- Described is a generalized technique for real-time gain and thermal compensation of imbedded microcontroller- based sensor arrays. By incorporating a single or multiple low- cost, uncalibrated thermal sensor(s) into a software feedback loop, a self-normalized calibration/compensation table for each sensor can be generated and stored in EEPROM for later use in real-time signal acquisition. The compensation is accomplished by executing a one-time initialization software routine as the sensor array is cycled through the expected temperature range. To achieve compensation to within the system resolution, the required correction loop bit width will be different from that of the system bit width. In addition to temperature compensation, the technique also includes correction for gain and voltage offset errors introduced by the analog signal conditioning as well as A/D conversion errors. An example of the technique is presented using a 68HC711E9 microcontroller for real-time acquisition and compensation of a four-element strain gage array,

I. INTRODUCTION

HE RAPID decreases in unit cost in addition to the T increase of on-chip capabilities have made the single-chip controller (MCU) a viable altemative to centralized processing in a multitude of instrumentation and robotics applications [1]-[3]. Current MCUs can be configured with all required RAM/ROM/EEPROM as well as serial interface and multiple- channel A/D conversion support on chip. By dedicating the MCU to a specific task or subsystem and networking multiple units together at a single node, individual MCU performance requirements are greatly reduced as well as the complexity of the overall programming task [41, [51.

An ideal subsystem application for the MCU is the acqui- sition, control, and conditioning of analog sensor inputs [6]. A typical multiple-sensor system usually requires some or all of the following: 1) excitation, 2) multiplexing, 3) filtering, 4) A/D conversion, 5) amplification, 6) offset and thermal compensation.

Whereas 1) through 4) are generic, i.e., no individual sensor calibration need be done to design the support circuitry, the gain, offset, and thermal compensation must be individually tailored to absorb the device-to-device variations to achieve maximum performance. This is particularly true if the device variations are large and/or the sensor thermal sensitivity is high.

Normally, the individual sensors are manually “tweaked” via trim potentiometer adjustments to remove offset errors

Manuscript received May 19, 1992; revised January 4, 1994. The author is with the electromagnetic Instrumentation and Design Lab-

oratory, Electrical and Computer Engineering Department, San Diego State University, San Diego, CA 92182-0190 USA.

IEEE Log Number 9402027.

and gain variations. The temperature compensation is accom- plished with a dedicated thermally sensitive network. This approach is time proven and appropriate for a single sensor, but if multiple elements are used, the redundancy and parts count becomes impractical.

An altemative compensation/offset scheme becomes avail- able in a dedicated MCU-based subsystem. By placing the subsystem in a “learn” mode, a one-time initialization program is executed while the sensor/system is cycled through the ex- pected temperature range of operation with no sensor stimulus. The sensor temperature is monitored by a generic, uncalibrated positive temperature coefficient (PTC) circuit which is used as a local reference without concem for absolute accuracy. The single requirement is an acceptable d V / d T over the expected temperature range. Similarly, gain normalization is generated by applying a known stimulus to the sensor incorporating the previously determined offset corrections.

The learn-mode program creates a unique dv,,,,,/dT cor- rection array for each sensor in EEPROM for later use during signal acquisition. This array is used by the acquisition program to compensate for offset and gain errors in real-time by a combination of softwarebrdware corrections.

Two correction schemes can be employed using the EEP- ROM as a basis. If acquisition speed is critical, the fastest approach is the generation of a look-up table requiring little or no calculation overhead to produce the correction voltage at the expense of a larger EEPROM requirement. The sec- ond and slower technique is the generation of a high-order polynomial fit to the data obtained in the leam mode. This approach requires much less EEPROM at the expense of slower acquisition time. The former will be employed in this application.

11. TECHNIQUE

Fig. 1 illustrates the block diagram of the hardware ac- quisition/correction subsystem. The acquisition and thermal- sense A/D converters are shown separately as the bit-width requirements of the thermal-sense converter will be determined by the acquisition converter resolution and system error in all applications. The j-wide sensor array is scanned by the input multiplexer and applied to the first stage, A1.A1 is a low- noise, high-gain amplifier providing the initial gain, buffering, and voltage offset for the multiplexed sensor signal. The gain for this stage GI is maximized to yield the best signal-to- noise ratio balanced against the bandwidth requirements of the particular amplifier to maintain the required frequency

0018-9456/94$04.00 0 1994 IEEE

KOLEN SELF-CALIBRATION/COMPENSATION TECHNIQUE 62 1

Fig. 1 . Functional block diagram of microcontroller-based self-compensation system.

response. The voltage error compensation, wcOmp, is introduced to the A1 stage via the k-bit D/A converter.

The entire analog system is controlled via the digital 1-0 ports of the MCU. The corrected data is formatted and routed to the serial port for transmission to the central node or stored in local memory as required.

The second stage A2 is a programmable gain amplifier (PGA) providing the necessary gain GZ and level shift to optimize the individual sensor signals to the particular n-bit A/D converter voltage range and offset. The digital values applied to the PGA and D/A resulting in G2 and vcOmp are taken from the EEPROM array as required for the instanta- neous sensor temperatures determined via the m-bit A/D at the time of acquisition. For a given system gain, the temperature- dependent error voltage lL,,(T) referenced to input can be expressed as

(fKss f Ksl f Vdrift(T)) = Krr(T) (1)

where V& (T) is the dominant temperature-dependent sensor error, and V,,, and Vosl are the maximum expected DC sensor and first-stage offset voltage, respectively. It is assumed that A1 and A2 have a negligible contribution to the temperature- dependent error.

In order to determine the required EEPROM size and the minimum bit width of the thermal-sensing m-bit converter, the maximum error voltage drift must be expressed in terms of the n-bit LSB.

The number of LSB changes generated by the drift compo- nent of &&') can be expressed by

where N is the integer number of unique values generated by the n-bit converter in response to the drift voltage described in (l), and Vf,, is the full-scale voltage of the 2n converter.

In order to actively compensate the N possible error values during acquisition, the m-bit thermal converter must generate at least M LSB changes in the m-bit conversion code for the N LSB chnages in the n-bit code such that M 2 N . This criteria can be met if the following conditions are satisfied:

(3)

Here Vf,, is the full-scale voltage of the 2" converter, GT is the thermal sensor amplifier gain, and V T ~ ~ ~ \ V T ~ ~ ~ are the thermal sensor voltage outputs at the temperature limits of

= 2m ( VT max - VT min)GT V , m

calibration, and

Here dM/dT and dN/dT represent the temperature- dependent rate of code change for the m-bit and n-bit A/D converters, respectively.

It is important to note that if (3) and (4) are satisfied and Tmax/Tmin bracket the operating temperature range there are no constraints on either the linearity or absolute calibration of the thermal sensor. The M code changes are used solely as an array pointer into the EEPROM array.

In order to determine the required bit width of the k-bit D/A converter, it is necessary to define the D/A requirements in terms of the 2" system resolution and expected error dynamic range. This can be expressed as

where the k-bit width requirements can be greater or smaller then that of the system width depending on system gain and/or error magnitude.

Finally, assuming that each sensor requires two additional bytes for hardware/software gain and normalization, the min- imum required number of EEPROM bytes can be expressed as

Mbytes = { N (i) + 2}j

where j is the number of system sensors, and k is the bit width of the D/A with the (k/8) ratio rounded up to an integer.

The MPU requires three distinct software routines to imple- ment the scheme. A compensatiodleam routine is executed with the sensors biased but unstimulated while being tem- perature cycled through the expected mirdmax range. The m-bit thermal sensor is continuously scanned during the temperature cycle with the sensor array data converted and stored only when a change in the thermal sensor converter code is detected. Once the temperature cycle is complete, either by limit comparison, time-out, or manual, the n-bitlm-bit array data is reduced to generate the EEPROM compensation array to be used in the acquisition routine.

A gaidleam routine is used to generate the gain normaliza- tion array. This routine is executed after the compenstiodleam routine as it uses the output from that routine. By stimulat- ing the sensors with a calibrated stimulus, assuming linear response and negligible gain sensitivity to temperature, the hardware PGA and software normalization EEPROM array elements are generated to maximize system accuracy.

111. MPLICATION The described technique has been successfully implemented

in a four-strain-gage system designed to maintain a system error of less than f l LSB over the temperature range of O-lOO°C. A four-element strain gage array was bounded to a 12" x 12" x 300" aluminum test beam together with a single temperature-sensing element. A single thermal sensor was assumed adequate due to the expected close thermal

~

622

Fig. 2. Complete circuit diagram of four-gage-array self-compensated sys- tem.

tracking of the individual gages due to their close physical proximity on a large thermal mass. If this were not the case, a thermal sensor for each gage/gage group would have to be implememted as required. The gages and thermal-sensing element were manufactured by Measurements Group, Inc.

Unlike conventional strain gage applications, the sensors are not operated in the standard four element whetstone bridge arrangement which provides differential signal output plus temperature compensation through common-mode rejection [7]. This approach reduces the number of sensors by a factor of four and uses a single low-current common-mode offset resistor pair. The reduction in component count becomes more favorable as the size of the sensor array increases.

The complete operational circuit is illustrated in Fig. 2. Sensors Rg@3 are general-purpose constantan grid, nominal 120R strain gages capable of a &3% linear strain range [8]. These gages are scanned into the low-noise, x 100 differential- in/differential-out amplifier comprised of op-amps A 1/A2 via the four power MOSFETS M+3. This scanning topology prevents sensor self-heating effects [9] and saves considerable power by biasing the individual array element ON only when scanned. This is particularly useful if the system is battery operated as the sensor bias circuit requires a large fraction of the total system power. The offset errors introduced by the nonzero ON resistance of the MOSFET switches are absorbed into the overall offset correction.

The gage bias current is provided by a high-current-output op-amp referenced to a stable voltage source with common- mode rejection provided by the high-value R z / R ~ resistor pair. The gage/system compensation voltage is applied to the first stage via the k-bit DfA converter through the scaling resistor R4.

The A3 PGA gain stage provides four programmable gains of 1 ,2 ,4 , and 8 v/v providing a total maximum system gain of x 100- x 800. While the 8-bit converter of the MCU provides an individual channel dynamic range of 48 dB, the addition of the 12 dB of dynamic range provided by the PGA yields an overall system dynamic range of 60 dB. The PGA output is offset by A4/R8/Rg to produce a unipolar 0-5V signal to the n-bit AP converter. The output of the PGA is bandwidth limited to 5 kHz and rail clamped by the RIO - C1/03-4

low-pass filteddiode clamp combination. Finally, the temperature sensor is biased by two high-output-

current op-amps A5/A7 with A6 providing the necessary gain to produce the required code changes in the m-bit A P converter over the O-lOO°C range. R15 is selected to

TABLE I WORST CASE DESIGN/ANALYSIS RESULTS GENERATED FROM GAGE ARRAY SYSTEM REPRESENTED IN FIG. 2.

produce zero voltage at O°C given the expected resistance versus temperature curve of the nickel foil PTC sensor [lo]. The thermal voltage is applied to the 68HC711E9 on-chip 8- bit A/D converter via the input multiplexer. The output of As is bandwidth limited to 1 kHz and rail clamped by the R11 - C4/D1-2 low-pass filter/diode clamp combination.

The Motorola 68HC7 1 1E9 MPU is well-suited to this task due to the on-chip memory resources of 512 bytes RAM, 512 bytes EEPROM, and 12 kilobytes EPROM. In addition, a medium-performance eight-channel, 8-bit A/D converter, and serial communication interface (SCI) are also on-chip [ 111.

To allow high-level interactive program development, an 8- kilobyte FORTH kemel was loaded into high memory strating at E000, leaving 4 kilobytes for the application program [ 121. If more or less application program memory is required, other variations of the basic 68HC71 Ixx are available with different memory and support resources. The FORTH kemel supports RS-232 communication via the SCI to allow interactive pro- gram support and development through a PC running any generic communication software.

The selections of the midmax system gain, required k- bit/m-bit resolution, and EEPROM requirements are driven by the n-bit system A/D converter requirements. Table I is the result of a "worst-case" errror budget analysis of the circuit shown in Fig. 2. The table enties were based solely on the manufacturer-provided generic data sheets with no individual component testing or measurement. The on-chip 8- bit multiplexed A/D converter served as both the system n-bit and thermal m-bit A/D converters resulting in n = m = 8 in the calculation of the Table I entries.

Fig. 3 illustrates the uncompensated offsethhermal drift voltages associated with the individual gages as the ther- mal mass was cycled from approximately O-lOO°C with the gages unstrained. An AD590 thermal sensor with 1% absolute accuracy was used for all measurements. The gages were continuously scanned without any correction resulting in the "raw" sensor/system baseline voltage being converted. Due to the random combination of offset and drift voltage variations, gages 0 and 2 were driven off scale even at minimum gain while gages 1 and 3 were within scale for most of the thermal cycle.

Prior to initiating the compensation/learn program, the ther- mal block was allowed to equilibrate at 0°C. Once the com- pensation/leam program was initiated, the block was heated to 100°C over a period of approximately 5 minutes. The same cycle was repeated for the gainpeam program. Fig. 4 repre-

KOLEN: SELF-CALIBRATION/COMPENSATION TECHNIQUE 623

Fig. 3. Uncompensated voltage output of gage array plus thermal sensor output versus absolute temperature (no excitation).

"s'

f'

"T 8 2 , I"" 0 B I b 2. d l 18 .e 56 6. 72 ea 88 €6

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Fig. 4. versus tempeature (no excitation).

Compensated voltage output of gage array plus thermal sensor output

Not shown in Figs. 3 and 4 is the error does not smoothly degenerate once the temperature exceeds the calibration range but rather abruptly returns to the uncompensated response due to the EEPROM table limit. Given this unforgiving behavior at the thermal limits, it is essential that the compensation range bracket the operating limit with enough margin to guarantee inrange operation.

It must be stressed that the residual error expressed in terms of the system LSB will be the same for any n-bit-based system up to the system noise limit regardless of system resolution. This is due to all calculations being normalized to the system LSB and not an absolute voltage resolution. Therefore, if the overall system noise permits, the residual error would remain approximately f l LSB if Table I was recalculated for an n = 12-bit system resulting in a 24 dB increase in resolution with a corresponding increase in the m-bit and k-bit converter performance requirements.

Gain normalization was accomplished by loading the test beam with a calibrated static torque of 100N-m prior to executing the leardgain routine. For this test, it was assumed that this load was the maximum resulting in the software scaling the gain of A2 to maximize the resolution of the converter while remaining in-scale. The byte value for this load was also stored to be used as the channel normalization in-situ.

IV. CONCLUSION A generalized procedure for optimized microcontroller-

based compensation/correction of generic sensor arrays has been developed. The procedure was successfully applied to a four-strain-gage system reducing the residual error to f l LSB over most of the target temperature zone. The technique can be universally applied to any sensor array/microcontroller combination provided the required EEPROM, m-bit A/D converter, and k-bit D/A converter requirements can be met for the specified n-bit system resolution. sents the same unstrained gage output shown in Fig. 3 cycled

from approximately 0-1 10°C but with the acquisition program using the generated EEPROM compensation/gain table. An examination of the generated EEPROM table revealed that 40 m-bit thermal converter code changes were detected by the learn program in excellent agreement with the predicted number of 37. This produced an EEPROM correction array requiring 448 bytes which is slightly larger then the 374 bytes based on the expected 37 m-code changes.

The residual error was consistently reduced to below f l LSB for all four gages over most of the thermal range with an occasional f 2 LSB error. This excess error is most probably the region of the excess error due to nonlinearities in either the

Paul T. Kolen was bom February 9, 1952. He received the B.S. degree in physics and astronomy from the University of Michigan, Ann Arbor, MI, in 1974, the M.S. degree in physics from San Diego State University, San Diego, CA, in 1977, and the Ph.D. degree in physics and electrical engineering from Utah State University, UT in 1982.

From 1982 to 1985 he was a Visiting Scholar at the Air Force Weapons Laboratory in New Mexico where his research interest was in remote sensing instrumentation. In 1985 he joined a private R&D

company in San Diego to conduct experimental work into Electromagnetic interactions with the human nervous system. He joined the electrical engi-

Of (4) not being satisfied in the localized

individual gages or the thermal Of the aforementioned test were LSB system resolution. in situ.

or both. Multiple hais to within the *l

neering faculty of h n Diego state Uni;ersity in 1988 where he founded the Electromagnetic Instrumentation Design Laboratory. His current interest is in the development of remote sensing systems for the study of human motion