Published in IET Power ElectronicsReceived on 24th September
2013Revised on 18th January 2014Accepted on 19th February 2014doi:
10.1049/iet-pel.2013.0736ISSN 1755-4535Rapid prototyping of power
electronics convertersfor photovoltaic system application using
XilinxSystem GeneratorRajasekar Selvamuthukumaran, Rajesh
GuptaDepartment of Electrical Engineering, Motilal Nehru National
Institute of Technology, Allahabad, Uttar Pradesh
211004,IndiaE-mail: [email protected]: The aim of
this study is to develop a research platform for rapid prototyping
of the power electronics converters forsolar photovoltaic (PV)
system applications. This study describes theeld-programmable gate
array (FPGA)-based hardware-in-the-loop (HIL) simulation of voltage
source inverter (VSI) used for PV system power conversion. The PV
system and invertermodels are realised in simulation as part of the
HIL to test the real-timefunctionality of the FPGA controller. The
generationof switching control signals for the VSI andits interface
withthe PVsystemis developedthroughthe
XilinxSystemGenerator(XSG)domain.
TheXSGautomaticallygeneratestheVHSIChardwaredescriptionlanguage(VHDL)codeusinghardware
descriptionlanguage co-simulationfor generationof gatingsignal for
modulationof the VSI. Tovalidate theproposedapproach,
thesinusoidalpulse-widthmodulationusingbipolarandunipolarswitchingschemesandcurrentcontrolmethodhavebeentestedforthePVsupportedVSI.TheproposedapproachoftherapidprototypemodelhasbeendesignedandimplementedinthelaboratorythroughXSGandMATLAB/SIMULINKinterface.
Performancecomparisonbetweenthesoftware simulation and real-time
HIL simulation has been demonstrated.1 IntroductionThe power
electronics converters play a vital role in wide
rangeofapplicationssuchasgridintegrationofrenewableenergysystems,
industrial drives, vehicular system,
consumerelectronicsproductsetc.[13].Thedigitalcontrolsaremoreattractivesolutionof
implementingalgorithmfor embeddedsystemapplications.
Conventionally, the digital embeddedcontrollers like
microprocessor, microcontroller and digitalsignal processors (DSPs)
are used to implement thepulse-width modulation (PWM) algorithms
for powerelectronics converters. However, these
controllers-basedtechniques have the disadvantages of limited
functionalityand lowcomputational speed for complex
PWMcircuits.Digital PWMcontrol withaDSPhas theadvantages of asimple
circuitry, software control andexibility in adaptationto various
applications. However, for complex controllers
theDSPrequireshighprocessingpowerandsystemarchitecturewhich is not
possible in affordable cost [4, 5].The Xilinx Inc. has developed
programmable logic devicecalleda eld-programmablegatearray(FPGA)
[6]. TheseFPGAcomprises of thousands of logic gates, some
ofwhicharegroupedtogetherasa congurablelogicblocktosimplify the
higher-level circuit design. The FPGAs aredesignated as the better
option for prototyping anapplication-specic integrated circuit
(ASIC) because oftheir congurability and programmability. However,
theimplementationof control algorithms inhighperformanceFPGAfor
real-time control applications has been founddifcult and requires
specialised trainingin the hardwaredescriptionlanguage(HDL).
Withincreaseinthelevel ofcomplexity in the controllers, the
processing time forprototype development is time consuming and
tiresomeeven for skilled researchers or engineers [710].The
photovoltaic (PV) systemcharacteristics are highlynon-linear in
nature and real-time testing of the controlalgorithms are
expensive, time consuming and dependsuponthe environmental
conditions [11]. It requires eitheractual PVsystemor real-time
PVsimulator. Using
PVsimulators,thecontrolandenergyyieldperformanceofthePVinverterscan
betested before actuallyimplementingthecontrol systemfor
thePVinverter ineld. Thesimulatorsare accurate and exible, thus the
performance andreliabilityof the systemcaneasilybe testedwithout
anyrisk [12, 13]. However, the PVsimulators are expensiveand
require actual converters for testing.Different platforms like
digital signal processing
andcontrolengineering(dSPACE),Opal-RT(realtime)etc.arecommercially
available for hardware-in-the-loop (HIL)simulationof power
electronicsconverter applications[14,15]. Theseplatformsarecostlier
withlimitedfunctionalityin the lower versions. For PV applications
these
RTplatformshavebeenusedforcontrollerimplementationandusesactual
powerelectronicsconvertersandPVsystemorPV simulator [1517]. With
the wide usage of FPGAcontrollers in power electronics converters
control inwww.ietdl.orgIET Power Electron., 2014, Vol. 7, Iss. 9,
pp. 22692278doi: 10.1049/iet-pel.2013.07362269& The Institution
of Engineering and Technology 2014various applications there is a
need of lowcost digitalplatformusedtoimplement HILsimulationof
theFPGAcontroller.The FPGA-basedXilinx SystemGenerator (XSG)
HILsimulation is a low cost, easily available platform
foreffectivemethodtodesign, test
anddevelopnewhardwareprototyperapidlywithout theknowledgeofHDL[18,
19].The XSGautomatically generates the VHDLcode
usingHDLco-simulationrapidly.
TheFPGAcontrollerdesignedintheHILsimulationcanreadilybeusedwiththeactualsystem.
This enables the researchers/users for rapidprototypingof the
FPGA-basedpower electronics circuitsusing XSG[2023]. Other
controllers generally used
inrapidprototypingarebasedonmicrocontrollersandDSPs.However, these
controllers are not suitable for the highperformance ASIC
controller for power electronicsapplications [2426]. The main
advantages of theFPGA-based XSGHIL simulation are (i) it provides
afunctionaltestoftheFPGAascontrollerbeforeconnectingit to the
actual system, (ii) sample delay effect of the
digitalcontrollercanbetested,
(iii)realisationoflagsinvolvedininterface of analogue variables and
(iv) reduces thecontroller development time
owingtoHDLco-simulationtool.This paper attempts to provide a low
cost rapid prototypingplatform using XSG for power electronics
converterssupported by solar PV system. The PV system is realised
inthe MATLAB/SIMULINKand interfaced to the voltagesource inverter
(VSI). An H-bridge DCAC inverter
isconsideredtoconverttheDCoutputofthePVintotheACusingbipolar
andunipolar sinusoidal PWM(SPWM). TheXSGHIL simulation creates the
automatic VHDL codewhich can be used to develop and test various
controlalgorithms quickly in actual physical systems throughFPGAs.
The proposed approach is based on thestep-by-step procedure that
combines HDL co-simulationstudies, HIL simulation verication and
experimental testingof power conversion of the PV system using
VSC.2 VSI for PV systemA PV module comprised of series connected
solar cells whichcan produce power in the range of 75150 W. To
obtain therequired higherpower outputthe modules can be connectedin
series and parallel to forma PVstring. The detailedmodelling,
characteristics and nomenclature of the
PVsystemisdescribedin[27].Fig.1shows theIV andPVcharacteristics of
the TATA BP (TBP 1275) solar PVmodule, at constant cell temperature
of T=25C andvarying solar radiations. Fig. 2shows the IVand
PVcharacteristics of the TATA BP (TBP 1275) solar PVmodule, at
constant solar radiationof G = 1000 W/m2, andvarying cell
temperature. The characteristics
clearlyshowthatthePVmodulecurrenthassolarradiationdependency,Fig. 2
At constant solar radiation of G=1000 W/m2, and varying cell
temperaturea IV characteristics andb PV characteristics of TATA BP
solar module under varying cell temperatureFig. 1 At constant cell
temperature of T =25C and varying solar radiationsa IV andb PV
characteristics, of TATA BP solar module under varying solar
radiationwww.ietdl.org2270& The Institution of Engineering and
Technology 2014IET Power Electron., 2014, Vol. 7, Iss. 9, pp.
22692278doi: 10.1049/iet-pel.2013.0736whereas the PV module voltage
has cell temperaturedependency.Solar energy available fromthe PV
module requiresefcient andqualityconversiontechniques tomake
themutilisable to the end users. The power available from the
PVmodule is DC in nature and in many applications AC poweris
required. Power electronics inverter is employed toconvert
available DC power fromthe PVmodule intouseful ACpower. Fig.
3showsthePVsupportedH-bridgeinverter topology. It consist of four
switching device, S1and S2 on leg A and, S3 and S4 on leg B. The
capacitor CpvisconnectedacrossthePVmoduleandtheinverter,
anditsuppliesconstantvoltagetotheinverter.LoadisconnectedacrosstheterminalsAandB,
whichproducestwo-level orthree-level output voltages according to
the switchingpatterngenerated. TheH-bridgeinverter
ismodeledintheMATLAB/SIMULINKand the modulating signal for
theinverterisgeneratedinreal-timethroughFPGAusingXSGdiscussed in
the next section.3 Generation of PWM signal in XSGThe common SPWM
techniques such as unipolar and bipolarswitching schemes are
implemented through FPGAusingXSGHILsimulationtoolset.
Thedigitalisedsignals, that is,modulatingsinewavesignal
andtriangularcarriersignal aregenerated in MATLAB through XSG
interface. Aftergeneration of digitalised signal, HIL simulation
testing iscarriedout byconnectingXilinxSpartan3EFPGAkit toverifythe
generationof the PWMsignal. Once the modelworking behaviour is
veried through the simulations, then theVHDL code can be generated
automatically using XSG tokencompilation. This VHDLcode is
synthesised in integratedsoftware environment (ISE) simulator and
test benchwaveformis generated for all the PWMtechniques.
Theresulting coding is then downloaded in the Spartan-3E FPGAkit
through JTAG programming [18]. The pulses at the outputports are
isolated and amplied at the gating power levels andfed to the
respective insulated gate bipolar transistors (IGBTs).3.1
Triangular carrier wave generationThe digitised triangular waveform
is generated at thefrequency of 2 kHz as shown in Fig. 4. The
following stepsare used in MATLAB/XSG to generate the
digitisedtriangular signal:1. Up counter block set in XSG is used
to digitallyincrements the count limit value from0 to 8192.
Theresultant waveform obtained from these up countersresembles the
ramp signal varying from 0 to 8192 as shownFig. 4(a).
Thecountercount limit isobtainedbyusingthefollowing formulaCounter
countlimit = Actualtimeperiodrequired/explicitperiod, that is, 5
e4/6 e8= 8333. Number of bitrequired = 213= 8192, which is the
nearest count limit of theabove calculated value.Fig. 3 PV
supported single phase H-bridge inverterFig. 4 XSG realisation of
sine and triangle waveformsa Digitised triangular waveform
generated at the frequency of 2 kHzb Digitised sine waveform
generated at the frequency of 50 Hzwww.ietdl.orgIET Power
Electron., 2014, Vol. 7, Iss. 9, pp. 22692278doi:
10.1049/iet-pel.2013.07362271& The Institution of Engineering
and Technology 20142.
ThesignalobtainedfromtheXilinxupcounterblockispassedthroughthebit
slicer extractor. Theextractor
blockisusedtoslice-offthesequenceofbitsfromtheinputdataandcreatesanewdatavalue.
Theoutput datatypeusedisunsignedwithitsbinarypoint at zero.
FromFig. 4(i), wecanseethat thebit sliceextractor hasslicedoff
theupperbit location, that is, 213= 8192. After slice off it
become212= 4096.3. Logical operator Xilinx NOT block is used to
complimentthe signal available from the Xilinx block bit slice
extractor.This makes the up/down counter block to generate
thedigitised triangular waveform.4. Xilinx up/down counter block is
used to performthecounter increment when input port value is 1 and
thedecrement operationstartswhentheinput port valueis0,that is,
downcounter. The counter digitallyincreases thecounter
valuefrom4096to4096andthensubsequentlydecreases it back to the
value 4096 to 4096 again over therange of time.5.
Xilinxreinterpretblockdoesnotconsumeanyhardwareresource in the
FPGA, it changes the signal type fromsigned to unsigned without
relocating the binary point.3.2 Reference sine wave generationThe
digitisedreference sinewaveformis generatedat thefrequency of 50 Hz
in the MATLAB/XSG domain asshown in Fig. 4(b), following the steps
listed below:1. Xilinxupcounter blockdigitallyincrements the
countlimit value from 0 to 332 and the number of bits required
is29= 512,wherethecountercountlimitiscalculatedsimilarto calculated
in triangular wave generation.2. ROM block is a read only memory
block used in the XSG.Theblockhasoneinput port
formemoryaddressandoneoutput port fordataoutput. Theaddressport
shouldbeanunsignedxedpointinteger.
TheinitialvectorvalueoftheROMblock is dened as sin(2 pi f ), where
f variesfrom 0 to 332.3.
TheamplitudeofthesinewaveisvariedusingthegainblockbytakinggainequaltodesiredmodulationindexMi.Inthisexample,
Mi = 0.66isconsidered. Hencetheoutputof the digitised sine
waveformamplitude is 0.66 V asshown in Fig. 4(ii).3.3 SPWM signal
generationTheSPWMisgeneratedbycomparingthe50 Hzdigitisedreference
sine wave modulating signal with the 2 kHzdigitised triangular
carrier waveform. Xilinx relational blockis used to performthe
operation of comparator, whichcompares the signals and generates
gating signal. Fig. 5shows the SPWM signal generation. The
differentmodulation index is achieved by changingthe gainvalueinthe
sine wave generator.3.4 Automatic code generation and HIL
simulationThe XSG is a high performance design tool used
formodelling, simulatingandanalysingdynamic systems forrapid
hardware prototyping, which runs as a part ofSIMULINKinMATLAB.
Thesesimulations canbeusedas a co-simulation tool for software
blocks and alsohardware blockfor XilinxFPGA, because XSGblockinFig.
5 SPWM signal generationFig. 6 Schematic view of the automatic code
generation in XSGwww.ietdl.org2272& The Institution of
Engineering and Technology 2014IET Power Electron., 2014, Vol. 7,
Iss. 9, pp. 22692278doi: 10.1049/iet-pel.2013.0736the Simulink is
automatically lled with an S-function(corresponding component in
the functional prototype).Fig. 6 shows the schematic viewof the
automatic codegeneration. After carefully testing and ne turning
thesystem, the automatic code is generated in between thegate-in
and gate-out block [28].Wheregate-inblockisusedat theinput of
theXSGtoconvert oating-point into the xed-point format andgate-out
block is used to convert xed point format into theoating point
format which is required by the Simulinkdata. Whenthe simulationis
carriedout inthe Simulinkenvironment withXSGblockset, it will
generatetheHDLcode and automatically invokes the ISE
Foundationsoftware togenerate the bit stream, whichis
calledHDLco-simulation. Further, while thesimulationis carriedoutby
connecting the hardware run-time model, that is, Spartan3e FPGAkit,
todesignandperformthe simulation, it iscalled as HILverication.
Fig. 7shows the viewof theHDL co-simulation and HIL circuit.4
Result and discussionThe MATLAB/SIMULINKsoftwarewithadd-onof
XSGfacilities is used for the HDL co-simulation and HILverication
studies [29]. In this section, different PWMsignals are generated
in the HIL verication mode fordifferent PV supported power inverter
topologies;(i)H-bridgeinverterusingbipolarPWMand,
(ii)H-bridgeinverter usingunipolar PWM, for carrier frequencyfc=
3kHz and modulation index Mi=0.9.4.1 FPGA-based HIL simulation for
PV supportedH-bridge inverter using bipolar SPWMThis section
discusses about the HIL simulation of PVsupported H-bridge inverter
using bipolar PWM, and thesimulation and experimental results are
compared. Fig. 8shows thesnapshotoftheFPGA-basedHILvericationofthe
bipolar PWMfor PV supported H-bridge inverter.Fig. 9 shows the
PVmodule current and power underdynamicchangeinsolarradiationlevel.
Duringtheperiodt = 00.1 s, the radiation level is G = 500 W/m2.
ThecorrespondingPVcurrent andpower is 2.2 Aand55 W,respectively.
After sudden change in radiation to G =1000 W/m2,fromt = 0.1to0.2
s,thePVcurrent andpowerareincreasedto3.6 Aand125 W, respectively.
Fromthisgure, the signicance of the HILsimulation is
realisedsuchthat thereal PVsystemcharacteristicsareattainedinthe
proposed approach during environmental
changingconditions.ReferringtoFig. 3, thegatingsignals
aregeneratedbycomparing the triangular carrier signal Vtriwith
themodulating reference sine wave Vsinusing the followingFig. 7
Schematic view of the HDL co-simulation and HIL circuitFig. 8
FPGA-based HIL verication of bipolar PWM for H-bridge
inverterwww.ietdl.orgIET Power Electron., 2014, Vol. 7, Iss. 9, pp.
22692278doi: 10.1049/iet-pel.2013.07362273& The Institution of
Engineering and Technology 2014control logic [30]If Vsin.
VtrithenS1and S4areON, VAB = +VPVIf Vsin, Vtrithen S2and S3are ON,
VAB = VPVThetwo-level PWMoutput
voltageisobtainedusingHILsimulation. Figs. 10a and b show the
gating signalgeneration using bipolar PWMtechnique in Xilinx
testbench simulation and experiment, respectively. Fig. 10cshows
the output voltage and current of the inverter,through HIL
simulation and experiment.To check the harmonic content in the
two-level PVsupported H-bridge inverter, frequency spectrumof
theinverter current is showninFig. 10d. The results clearlyshowthat
thedominant harmonicsarelyingcentredat thecarrier frequencyof 3
kHzbothinHILsimulationandinexperimental result. The value of the
total harmonicdistortionintheinverteroutputcurrentisabout13.65%,
inboththeresults. Thisshowsthat theresult ofFPGA-basedHIL
simulation closely matches with the experimental results.4.2
FPGA-based HIL simulation for PV supportedH-bridge inverter using
unipolar SPWMThe FPGA-based HIL simulation for PV supported
H-bridgeinverterusingunipolarPWMtechniqueisexplainedinthissection.
The unipolar PWM signal is generated bycomparing triangular carrier
signal Vtri with the bidirectionalmodulatingsignal (Vsinand Vsin).
ReferringtoFig. 3, thegating signals for the PVsupported H-bridge
inverter isgenerated based on the followingswitching control
logicwith three-levels of the output voltage [31]If Vsin. Vtrithen
S1is ON and VAO = +VPV/2If Vsin, Vtrithen S2is ONandVAO =
VPV/2Similarlyif Vsin. VtrithenS3is ON and VBO = +VPV/2If Vsin,
Vtrithen S4is ON and VBO = VPV/2Theterminal O isthehypothetical
neutral of thedc-linkvoltage. Thereforetheoutput
voltageVABhasthree-levels+VPV, 0andVPVbecause of unipolar
switchingpattern.Figs. 11aandbshowsthegatingsignal
generationfortheunipolar PWM technique, Fig. 11c shows the output
currentand voltage of the PV supported unipolar PWM-basedH-bridge
inverter and Fig. 11d shows the
frequencyspectrumoftheoutputcurrent,bothfortheHILsimulationandexperimental
result. It canbenoticedfromtheresultsofthefrequencyspectrumthat
thedominant harmonicsareshiftedtowardstwiceof
theeffectiveswitchingfrequency,thatis, at6 kHz.
Thevalueofthetotalharmonicdistortionis about 4.10%, which is lesser
then the bipolar PWMtechnique.4.3 Performance comparison of
softwaresimulation and real-time HIL simulationIn this section,
performance comparison of
softwaresimulationandreal-timeHILsimulationis discussed.
Themainadvantage of the proposedreal-time HILsimulationover the
pure software simulation is the performancevericationof
thesysteminpresenceof theactual
FPGAcontroller.Followingresultswilldemonstratethedifferenceintheperformancebecauseof
sampling, computationtimeand signal conversion delays of the FPGA
controller.Fig. 12a represents the H-bridge inverter output voltage
forthe bipolar SPWMboth for the software simulation andreal-time
HIL simulation. The HIL simulation clearly
showsthedelayingenerationofPWMpulses.
Thereal-timeHILsimulationincorporatesthephysical
operatingconditionofthe digital controllers. The frequency harmonic
spectrumFig. 9 Dynamic change in solar radiation from G =500 to
1000 W/m2, effect of PV module current and
powerwww.ietdl.org2274& The Institution of Engineering and
Technology 2014IET Power Electron., 2014, Vol. 7, Iss. 9, pp.
22692278doi: 10.1049/iet-pel.2013.0736andtotal harmonicdistortions
producedbythethree-levelinverter output voltagewithsoftware
simulationandwithreal-time simulation is shown in Fig. 12b. The
softwaresimulation shows the characteristics of the ideal
SPWM,however, in real-time simulation the SPWMis lteredbecause of
sampling effect of the digital processor [32].Further the
performance comparison has been done for thecurrent control
modeoftheVSIsupportedbythePVat axed switching frequency of 3 kHz.
The inverter is trackinga constant current through the load. Fig.
12c shows thecurrent trackingperformance. Thecurrent trackingerror
inreal-time HIL simulation is larger than the softwareFig. 10 HIL
simulation and experimental result of PV supported H-bridge
inverter using bipolar SPWMa Xilinx test bench waveform of gating
signalb Experimental result of gating signalc Inverter output
voltage and current of HIL simulation and experimental resultd
Frequency spectrum of inverter output current through HIL
simulation and experimental resultwww.ietdl.orgIET Power Electron.,
2014, Vol. 7, Iss. 9, pp. 22692278doi:
10.1049/iet-pel.2013.07362275& The Institution of Engineering
and Technology 2014Fig. 11 HIL experimental result of PV supported
H-bridge inverter using unipolar SPWMa Xilinx test bench waveform
of gating signalb Experimental result of gating signalc Inverter
output voltage and current of HIL simulation and experimental
resultd Frequency spectrum of inverter output current through HIL
simulation and experimental resultwww.ietdl.org2276& The
Institution of Engineering and Technology 2014IET Power Electron.,
2014, Vol. 7, Iss. 9, pp. 22692278doi:
10.1049/iet-pel.2013.0736simulation because of the delay effects of
the FPGAcontroller.5 ConclusionThis paper proposes the FPGA-based
HILsimulation forrapid prototyping of the PVsupported power
electronicsconverter circuits. The HIL simulation environment
isprovedtobeanefcient tool todevelopswitchingcontrolstrategiesfor
thepower converters usedinthePVsystemthrough automatic HDL code
generation by XSG. Theactual
characteristicsofthePVmoduleandVSImodel
arerealisedintheMATLAB/SIMULINK.
TheimplementationofthebipolarandunipolarSPWMforVSItogeneratetheACoutput
fromtheinput DCof thesolar
PVjustiestheconceptofHILsimulation.Theperformancecomparisonofthe
software simulationand HILsimulation demonstratedthe delay effect
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