Sensors and Digital Signal Processing (DSP) Part 1: ADCs and...

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ECE 5900/6900 Fundamentals of Sensor Design Dr. Suketu Naik

EE 4900: Fundamentals of Sensor Design

Lecture 13Sensors and Digital Signal Processing (DSP)

Part 1: ADCs and DACs

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Digital Signal Processing (DSP): Basics

Q: Why use DSP over Analog Signal Processing?

A:

1) Cost effective for complex signal processing techniques

2) Some techniques are impossible/difficult without DSP

3) Compact, more reliable and less sensitive to

environmental effects

Q: What is needed to be DSP designer/engineer?

A:

1)Knowledge of signal processing techniques

2)Knowledge of DSP microprocessors, C/Matlab

programming, A/D&D/A converters, filters, common

algorithms, sensors

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DSP Chain

Ref: Applied Digital Signal Processing: Theory and Practice, by D. Manolakis and V. K. Ingle

Ideal

ADC

Discrete-Time

System

Ideal

DAC

SensorSignal

ConditioningADC DSP DAC

Analog

Filter

Analog

InputDigital Input

from ADC

Digital Output

to DAC

Clock (T) Clock (T)

Clock (T) Clock (T)

Analog

Output

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DSP in a generic Sensor ASIC


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DSP: Basic Modules

Analog to Digital Converter (A/D)

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DSP: Basic Modules


Analog to Digital Converter (A2D, A/D, ADC)

Ranges from discrete circuits, monolithic ICs, modules, boxes

ADC converts analog data such as voltage into digital data compatible

with DSP devices

Characteristics: accuracy, linearity, resolution, conversion speed,

stability, price

Speed and accuracy are inversely related

Example: Image Processing

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A/D and D/A Basics

A/D: convert continuous-time signal into discrete-domain signal

D/A: convert discrete-time signal into continuous-time signal

ADC Symbol

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DSP: Basic Modules

Analog to Digital Converter (A2D, A/D, ADC)

Quantization Errors

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A/D Basics

1) The sample-and-hold amplifier captures an analog signal and holds it during

analog-digital conversion): SHA plays a major role in determining the Spurious

Free Dynamic Range (SFDR), Signal to Noise Ratio (SNR)

2) Input amplifier provides current gain to charge the cap, voltage on the cap

follows the input signal, the switch is opened, and the capacitor retains the voltage

present before it was disconnected from the input buffer, the output buffer offers

a high impedance to the hold capacitor to keep the held voltage from discharging

prematurely

Sample and Hold Amplifier (SHA)

Ref: http://www.analog.com/media/en/training-seminars/tutorials/MT-090.pdf

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A/D Basics: SNR and SFDR

Spurious free dynamic range

(SFDR) is the ratio of the rms

value of the signal to the rms value

of the worst spurious signal

(regardless of where it falls in the

frequency spectrum)

Signal to Noise Ratio (SNR) is the

ratio of the value of the signal to

the rms value noise floor

Signal to Noise Ratio (SNR) Spurious Free Dynamic Range (SFDR)

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A/D Basics

1) Resolution: 8-bit, 12-bit, 16-bit, etc

2) Digital output code

-e.g. the largest output value that the 3-bit

A/D converter can produce is 7/8th of the full-scale

reference voltage, VREF

3) Code width

-This is range of analog input voltages for which the

code is produced: measured in weight of 1 LSb

-e.g. 1 LSb = VREF/2N, where N is the number of bits

For example, if VREF=4.096 V and N=12-bits

1 LSb will have a weight of 4.096 V/212 = 1 mV

4) Accuracy

-how close the actual digital output code represents useful information

-function of its internal circuitry and noise from external sources

Few of the ADC Parameters

Ref: http://www.analog.com/library/analogDialogue/archives/39-06/Chapter%202%20Sampled%20Data%20Systems%20F.pdf

http://ww1.microchip.com/downloads/en/appnotes/00693a.pdf

Ideal Transfer Function for

3-bit ADC

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A/D Basics

Example: 4-bit ADC Output Table

Ref: http://www.analog.com/library/analogDialogue/archives/39-06/Chapter%202%20Sampled%20Data%20Systems%20F.pdf

http://ww1.microchip.com/downloads/en/appnotes/00693a.pdf

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A/D Basics

ADC selection: Bits vs Bandwidth

Ref: http://www.ti.com/europe/downloads/Choose%20the%20right%20data%20converter%20for%20your%20application.pdf

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DSP: Basic Modules

1) Successive Approximation Register (SAR)

2) ΣΔ (Sigma-Delta)

3) Flash

4) Pipelined

Types of A/D Converters

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Successive Approximation Register (SAR) ADC

SARs determine the digital word by

– Sampling the input signal

– Using an iterative process

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Application Areas (other than General Purpose) 1) Multiple Channel Data Acquisition

2) Pen Digitizers

3) CMOS Image Sensors

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Successive-approximation register (SAR)

performs bit-weighing conversion

Comparator compares the input

voltage to the output of an N-bit

DAC

Using the DAC output as a reference

this process approaches the final result as a

sum of N weighting steps

SHA keeps the signal constant during the

conversion cycle

First, the comparator determines whether the SHA

output is greater or less than the DAC output, and MSB (1 or 0) is stored in SAR

DAC is then set either to 1/4 scale or 3/4 scale by the control logic (depending on

the value of the MSB) and the comparator makes the decision for the second bit of

the conversion: the result (1 or 0) is stored in the register, and the process

continues...

At the end of the conversion process, a logic signal (EOC, DRDY, BUSY, etc.) is

asserted

As each bit is determined, it is latched into the SAR as part of the ADC's output

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SAR Algorithm using binary scale

and binary weights

Ref: http://www.analog.com/library/analogdialogue/archives/39-06/architecture.html

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Timing Diagram

SAR Conversion Process

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DSP: Basic Modules



3) Flash

4) Pipelined


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ΣΔ (Sigma-Delta) ADC

Delta-Sigma converters determine the digital word by

– Oversampling

– Applying Digital Filtering

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ΣΔ (Sigma-Delta)ADC

Application Areas 1) Process Control Systems

-Water supply & Sewage

-Oil & Gas

-Power

-Heating and Cooling

-Commuter Trains

2) Precision temperature measurements

3) Weighing scales

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ΣΔ (Sigma-Delta) or Oversampling ADC

Ref: Demystifying Delta-Sigma ADCs, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1870

Functional Block Diagram

Σ-Δ is modulator followed

by a digital decimation filter

ΣΔ modulator: Difference

Amplifier, an integrator and a

comparator with a feedback loop

that contains a 1-bit DAC

The internal DAC is simply

a switch that connects the

comparator input to a positive or

negative reference voltage VREF

The Σ-Δ ADC also includes a

clock unit that provides proper timing for the modulator (oversampling at Kfs)

and digital filter (fs)

Digital-and-decimation filter decimates the oversampled bit stream and reduces

the data rate

The digital filter averages the 1-bit data stream, improves the ADC resolution,

and removes quantization noise

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Ref: Choose the right A/D converter for your application, Texas Instruments

http://www.ti.com/europe/downloads/Choose%20the%20right%20data%20converter%20for%20your%20application.pdf

Oversampling, Noise Shaping, Digital Filtering, and Decimation

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Oversampling and Noise Shaping



More '1's created

during the

positive cycle

More '0's created

during the

negative cycle

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Digital Filtering



Sinc 3 FilterHigh Frequency Noise Reduction

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Decimation



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DSP: Basic Modules



3) Flash

4) Pipelined


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Flash (Parallel) ADC

Application Areas (requiring very large bandwidths)

1) Data acquisition systems

- typically contain signal conditioning circuitry, analog-to-

digital converter (ADC), computer bus, DACs), digital I/O

lines, counter/timers

2) Satellite communication

3) Radar processing

4) Sampling oscilloscopes

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Flash (Parallel) ADC

Ref: Understading Flash ADCs, https://www.maximintegrated.com/en/app-notes/index.mvp/id/810

Flash ADC Architecture Fastest way to convert an analog signal

to a digital signal

Flash ADCs are made by cascading

high-speed, low gain (trade-off between

bandwidth and gain) comparators

N-bit Flash ADC has 2N-1 comparators

connected in parallel, with reference voltages

set by a resistor network and spaced

VFS/2N (1-LSB) apart

A change of input voltage usually causes

a change of state in more than one comparator

output

Output changes are combined in a

decoder-logic unit that produces a

parallel N-bit output from the converter.

Upto 1 GHz sampling rate, low resolution,

large die size, excessive input capacitance and power consumption

Very precise matching required, prone to sporadic and erratic outputs

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DSP: Basic Modules



3) Flash

4) Pipelined


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Pipeline ADC

Pipeline converters determine digital word by

– Undersampling

– Multiple stages / Larger Cycle-latency

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Pipelined (Subranging Quantizers) ADC

Application Areas

1) Communication systems:

-total harmonic distortion (THD),

-spurious-free dynamic range (SFDR)

2) CMOS Image Sensor/CCD-based imaging systems

- noise, bandwidth, and fast transient response

3) Data-acquisition systems

-time and frequency-domain characteristics are both

important

-low spurs and high input bandwidth

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Pipelined (Subranging Quantizers) ADC

Provides an optimum balance of size, speed, resolution, power

dissipations

Consists of numerous consecutive stages, each containing a

track/hold (T/H), a low-resolution ADC and DAC, and a summing

circuit that includes an interstage amplifier to provide gain

Ref: Understading Pipelined ADCs, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1023

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References

Recommended ADCs Choose the right A/D converter for your applicationhttp://www.ti.com/europe/downloads/Choose%20the%20right%20data%20converter%20f

or%20your%20application.pdf

Texas Instruments, Analog Devices, Maxim Integrated

Low power acquisition (SAR)

ADS7042 (12-bit, 1 msps)

MAX1116 (8-bit, 100 ksps)

Pressure and Temperature Sensing (delta sigma)

MAX11270 (24-bit, 2 ksps)

ADS1146 (16-bit, 64 ksps)

AD7797 (24-bit, 123 sps)

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DSP: Basic Modules

Analog to Digital Converter (A2D, A/D, ADC) Alternatives

1) Pulse Width Modulator (PWM)

2) Voltage-to-Frequency (V/F) Converter

3) Direct Digitization

4) Resistance to Frequency Converter

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DSP: Basic Modules

Digital to Analog Converter (D/A)

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Which Type of DAC to choose?

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Digital to Analog Converter (DAC)

1) R-2R Ladder


3) Multiplying

4) Current Steering

Types of D/A Converters

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R-2R DAC

Application Areas

1) Automatic Test Equipment

2) Precision Instrumentation

3) Industrial Control Systems

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R-2R Ladder DAC

DAC=Resistors and Summing Amp

Problem: Matching

For large number of bits, summing resistors need to be very precise

Solution: R-2R Ladder

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R-2R Ladder DAC

DAC=Resistors and Summing Amp

D's = digital data

The digital inputs can be control signals

for switches that connect the resistors to

Vref (high or logical 1) or ground (low or

logical 0)

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R-2R Ladder DAC

R-2R DAC is the classical and most common type of DAC

Voltage Mode

The arms of the ladder are switched between VREF and ground, and the output is

taken from the end of the ladder

Current Mode

The end of the ladder, with its code-independent impedance, is used as the VREF

terminal and the ends of the arms are switched between ground

The output line is held at ground and the network is followed by a current-to-

voltage (I/V) converter

Voltage Mode Current Mode

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Digital to Analog Converter (DAC)

1) R-2R Ladder


3) Multiplying

4) Current Steering

Types of D/A Converters

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Application Areas

1) Audio (USB DAC)

2) Motion Control Systems

-More Resolution

-Less Accuracy

3) Sonar Electronics

ΣΔ (Sigma-Delta) DAC

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ΣΔ (Sigma-Delta) DAC

Reverse of ΣΔ ADC

Oversampling of the digital input, digital filtering, demodulation,

analog filtering

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References

Recommended DACs How to select a precision DAC?http://www.ti.com/general/docs/video/watch.tsp?entryid=0_l2147gog

Texas Instruments (TI), Analog Devices (AD), Maxim Integrated

(MI)

Delta-Sigma DACs

DAC1220 (TI, 20-bit, 2.5 mW, low power)

AD1833A (AD, 24-bit, 192 kHz, audio)

MAX5134 (MI, 16-bit, highly-linear, process control)

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