Shashank Srivastava Motilal Nehru National Institute Of
Technology, Allahabad Error Detection and Correction : Data Link
Layer
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Error Detection and Correction Data can be corrupted during
transmission. For reliable communication, errors must be detected
and corrected.
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Types of errors
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Single-bit error Only one bit in the data unit changes.
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Single-bit errors are least likely type of errors. Example:
imagine a sender sending at 1 Mbps. This means each bit lasts for
1/ 10 6 sec = 1 s. For single-bit error to occur, noise must have a
duration of only 1 s, which is very rare.
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Multiple-bit error
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Burst error Means two or more bits in the data unit have
changed. The length of the burst is measured from the first
corrupted bit to the last corrupted bit. The number of bits
affected depends on the data rate and duration of the noise.
Example: if we are sending data at 1 Kbps, a noise of 1/100 sec can
affect 10 bits.
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Detection Redundancy: One technique is to send every data unit
twice. Receiving device will do a bit-by-bit comparison between the
two versions. The possibility of errors being introduced into
exactly same bits are very small, so this method is effective- but
it is inefficient and slow. Second possibility is to append shorter
group of bits. This is called redundancy because extra bits are
redundant to the information, and discarded as soon as accuracy of
the transmission has been determined.
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Redundancy If the received bit stream passes the checking
criteria, the data portion of the data unit is accepted and the
redundant bits are discarded.
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Vertical Redundancy Check (Parity Check) Least expensive
method. Even parity : A redundant bit, called a parity bit, is
appended to every data unit so that the total number of 1s in the
unit becomes even. Odd parity: total number of 1s should become
odd.
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Even parity VRC concept
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Performance: VRC can detect all single-bit errors. It can also
detect burst errors as long as the total number of bits changed is
odd.
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Longitudinal Redundancy Check (LRC) A block of bits is
organized in a table (rows and columns). Then calculate parity bit
for each column and create a new row, which are parity bits for the
whole block.
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Performance: LRC of n bits can easily detect a burst error of n
bits. A burst error of more than n bits is also detected by LRC
with a high probability. Example: if 2 bits in one data unit are
damaged, and 2 bits in exactly the same position in another data
unit are damaged, the LRC checker will not detect the error.
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Cyclic Redundancy Check (CRC) Most powerful redundancy checking
technique. Unlike VRC and LRC, which are based on addition-, CRC is
based on binary division. A CRC or CRC remainder is appended to the
end of a data unit so that the resulting data unit becomes exactly
divisible by a second, predetermined binary number(divisor). At
destination, incoming data unit is divided by the same number. If
no remainder- then data unit is intact. If there is a remainder-
means data unit is damaged. Note: a CRC must have exactly one bit
less than divisor.
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CRC
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1) A string of n 0s is appended to the data unit. The number of
n is one less than the number of bits in the predetermined divisor
(which is n+1 bits). 2) The new data unit is divided by the divisor
using a process called binary division. The remainder is the CRC.
3) CRC of n bits replaces the appended 0s at the end of data unit.
CRC may consist of all 0s. 4) The data unit arrives at receiver-
data first, followed by CRC. The receiver treats whole string as a
unit and divides by the same divisor. 5) If remainder is zero -
data unit is allowed to pass, else it is rejected.
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Binary Division Each bit of the divisor is subtracted from the
corresponding bit of the dividend without disturbing the next
higher bit.
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Polynomials The CRC generator(the divisor) is most often
represented not as a string of 1s and 0s, but as an algebraic
polynomial. A polynomial selected should have following properties:
1) It should not be divisible by x : it guarantees that all the
burst errors of a length equal to the degree of polynomial are
detected. 2) It should be divisible by x+1 : it guarantees that all
burst errors affecting an odd number of bits are detected.
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Polynomial and Divisor
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Standard Polynomials The numbers 12, 16, and 32 refers to the
size of CRC remainder. The CRC divisors are 13, 17, and 33 bits,
respectively.
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Performance: CRC can detect all burst errors that affect an odd
number of bits. CRC can detect all burst errors of length less than
or equal to the degree of polynomial. CRC can detect with a very
high probability burst errors of length greater than the degree of
the polynomial.
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Checksum It is also based on the concept of redundancy.
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Checksum Generator Data segment is subdivided into equal
segments of n units. These segments are added together using 1s
complement arithmetic in such a way that total is also n-bits long.
The total sum is then complemented and appended to the end of
original data unit, called checksum field. Means if the sum of the
data segment is T, checksum is T. Extended data unit is transmitted
across the network.
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Checksum
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Checksum Checker The receiver subdivides the data unit into
segments-each of n bits, and adds all segments together. Then it
complements the result. If total found is zero - data unit is
intact. If total is not zero means data unit contains error.
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Data Unit and Checksum
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AT SENDER: 1 0 0 0 1 0 0 1 Word 1 1 0 1 1 1 0 0 0 Word 2
------------------------------------- 1 0 1 0 0 0 0 0 1 Sum using
ones complement arithmetic 1 Remove carry and add it back
------------------------------------- 0 1 0 0 0 0 1 0 sum 1 0 1 1 1
1 0 1 checksum The pattern sent is
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Performance: Detects all errors involving an odd number of
bits. Detects most errors involving even number of bits. If one or
more bits of a segment are damaged, and corresponding bits of
opposite value in a second segment are also damaged, the sum of
these columns will not change and the receiver will not detect a
problem. In LRC, two 0s could both change to 1s without altering
the parity because carries were discarded. Checksum retains all
carries, so although two 0s becoming 1s would not alter the value
of their own column, they would change the value of next higher
column.
Error correction Error-correcting codes are more sophisticated
than error detection codes, and require more redundancy bits. The
number of bits required to correct a burst error is so high that in
most cases, it is inefficient to do so. Therefore, most
error-correction is limited to one-,two-, or three bits.
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Single-bit error correction: First step in error correction is
locating invalid bit position. Suppose data is composed of 7 bit
ASCII code. To locate one of the 7 positions, 3 extra bits are
sufficient. But if the error occurs in these additional bits, so to
cover all possibilities(7 bits of data+3 redundant bits), we need
additional bits.
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Redundancy bits: r must be able to indicate m+r+1 different
states. One state means no error, and m+r states indicates the
location of error in m+r different positions.
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Redundancy bits: R bits can indicate 2 r different states.
Therefore 2 r >=m+r+1 Example: if value of m=7, then r=4.
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Hamming code Positioning the redundancy bits: use the positions
that are powers of 2. (r1, r2, r4, r8). Each r bit is the VRC bit
(parity bit) for one combination of data bits.
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Each data bit may be included in more than one VRC calculation.
R1: bits 1,3,5,7,9,11 R2: bits 2,3,6,7,10,11 R4: bits 4,5,6,7 R8:
bits 8,9,10,11 The r1 bit is calculated using all the bit positions
whose binary representation includes a 1 in the rightmost position.
The r2 bit is calculated using all bit positions with a 1 in the
second position, and so on.
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The parity for each combination is the value of the
corresponding r bit. The final 11-bit code is sent through
transmission line.
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Suppose data contains error.
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Error Detection- Reassemble the new parity values into a binary
number in the order of r position. (r8,r4,r2,r1). Error Correction-
Reverse the bit value and correct the error.