Shunting problems due to sub-micron pinholes in evaporated solid … · 2008-12-30 · Research...

Research

Shunting Problems Due to Sub-MicronPinholes in Evaporated Solid-PhaseCrystallised Poly-Si Thin-Film SolarCells on GlassO. Kunz1*,y, J. Wong1, J. Janssens1, J. Bauer2, O. Breitenstein2 and A.G. Aberle1,3

1Photovoltaics Centre of Excellence, The University of New South Wales, Sydney, NSW 2052, Australia2Max Planck Institute of Microstructure Physics, Weinberg 2, Halle D-06120, Germany3Now with at Solar Energy Research Institute of Singapore (SERIS), National University of Singapore, 4 Engineering Drive 3, Singapore 117576, Singapore

Recent progress in the metallisation of poly-silicon thin-film solar cells on glass, created by solid phase

crystallisation (SPC) of evaporated amorphous silicon (EVA), revealed that shunting through sub-micron

holes (density 100–200mmS2) in the films causes severe shunting problems when the air-side metal contact is

deposited onto these diodes, by creating effective shunting paths between the two highly doped layers of EVA

cells. We present evidence of these pinholes by optical transmission and focussed ion beam (FIB) microscopic

images and confirm the point-like pinhole shunts using lock-in thermographic images. The latter revealed

that the Al rear electrode induces strong ohmic shunts below the grid lines and a high density of weak non-

linear shunts away from the grid lines. Two distinctly different approaches are shown to reduce the shunting

problem to a negligible level: (i) to contact only a small fraction of the rear Si surface via a point contacting

scheme, whereby the metal layer needs to be thin (<1mm) and the fractional area coverage small (<5%), and

(ii) to deposit line contacts in a bifacial interdigitated scheme, whereby a thick layer of metal is deposited

followed by a wet-chemical etching step that effectively reduces shunting by preferentially etching away the

shunting paths. Test devices with an area of 1 cm2 achieve pseudo fill factors (pFF) of above 75% and diode

ideality factors of below 1�3, demonstrating that the proposed methods are well suited for the metallisation of

the rear surface of EVA solar cells. Copyright # 2008 John Wiley & Sons, Ltd.

key words: Thin-film solar cells; shunting; polycrystalline silicon; metallisation; solid-phase crystallisation; lock-in

thermography

Received 27 May 2008; Revised 6 September 2008

INTRODUCTION

Thin-film photovoltaics has been creating increasing

interest on the solar cell market over the last decade

since it has the potential of producing electricity at

significantly lower cost as compared to bulk Si

technologies. This is the case since the combination

of large-area deposition onto foreign substrates, more

streamlined processing, and monolithic cell intercon-

nection can lead to substantially lower fabrication cost,

while at the same time only a fraction of the expensive

Si raw material is needed.1–3 One of the most

PROGRESS IN PHOTOVOLTAICS: RESEARCH AND APPLICATIONS

Prog. Photovolt: Res. Appl. 2009; 17:35–46

Published online 21 October 2008 in Wiley InterScience (www.interscience.wiley.com) DOI: 10.1002/pip.866

*Correspondence to: O. Kunz, Photovoltaics Centre of Excellence,The University of New South Wales, Sydney, NSW 2052, Australia.yE-mail: [email protected]

Copyright # 2008 John Wiley & Sons, Ltd.

promising candidates for large-scale production of

thin-film solar cells is polycrystalline silicon (poly-Si)

on glass since it makes use of an abundant rawmaterial

and since it benefits from decades of expertise that was

gained with crystalline Si by the semiconductor

industry. Previously, solid-phase crystallised poly-Si

solar cells have proven to be capable of achieving

efficiencies of over 9% on steel substrates4 and more

recently over 10% efficiency have been demonstrated

on borosilicate glass superstrates.5,6

In order to make poly-Si on glass economically

competitive in the rapidly growing PV market, it is

desirable or even necessary to further improve its

efficiencies and to reduce the associated module

production cost.7 One way of achieving the latter could

be the replacement of the currently predominantly

used plasma-enhanced chemical vapour deposition

(PECVD) method for production of the a-Si precursor

diodes with e-beam evaporation which can be

deposited in an in-line process and is therefore

potentially both faster and cheaper.8,9 However, it

has yet to be shown that evaporated SPC poly-Si can

lead to diodes with similar material quality, i.e. that

similar solar cell efficiencies can potentially be

achieved with this deposition method. We have

recently come one step closer to this goal and made

significant progress in metallising evaporated SPC

poly-Si diodes on glass by solving a major shunting

problem that plagued our metallisation efforts up to

now: Shunting through sub- micron sized pinholes in

the thin films, forming highly effective shunting paths

between the top and bottom electrodes when metal is

deposited to form the air-side contact.

DEVICE STRUCTURE ANDINVESTIGATED METALLISATIONSCHEMES

EVA device structure

The devices investigated in this work are thin-film solar

cells obtained from solid phase crystallisation (SPC) of

evaporated a-Si precursor diodes. The a-Si diodes are

deposited via e-beam evaporation under non-ultrahigh

vacuum conditions (base pressure �2� 10�8 Torr,

deposition pressure �1–2� 10�7 Torr) onto 5�5 cm2

SiN-coated borosilicate glass superstrates from Schott

AG (Borofloat33, 3�3mm thick). The SiN layers serve

as both antireflection coating and barrier layer for

contaminants from the glass and are deposited by

PECVD. The dopants (boron and phosphorus) are

added in situ during the a-Si deposition process, using

high-temperature effusion cells from MBE Kompo-

nenten, Germany. Usually the cell structure is intended

for superstrate configuration, i.e. the sunlight enters the

solar cells through the glass. In this case the emitter is

located directly on top of the SiN antireflection coating.

For reasons of clarity we will restrict ourselves in this

work to this configuration and will term the highly

doped air-side layer the back surface field (BSF) and

the highly doped glass-side layer the emitter, respect-

ively. However, it has to be kept in mind that the inverse

structure, i.e. substrate configuration, with the emitter

located on the air side of the device, is also possible.

After SPC (at 6008C for at least 24 h) the poly-Si

diodes receive a rapid thermal anneal (RTA) at a

temperature of �9008C for �4min. This high-

temperature treatment activates dopants and anneals

point defects in the poly-Si films. The diode

fabrication process is terminated with a hydrogen

plasma treatment at plateau temperatures in the range

600–6508C for 15–20min, using a low-pressure

chemical vapour deposition (LPCVD) system with

an inductively coupled remote plasma source

(Advanced Energy, USA). Both post-deposition treat-

ments (RTA and hydrogenation) are essential processes

for achieving appreciable performance of SPC poly-Si

solar cells on glass.10 The total thickness of the poly-Si

films is in the order of 2mm. The structure of the

finished poly-Si diodes is schematically displayed in

Figure 1 and typical design parameters are summarised

in Table I.8

Since all three layers of the solar cells are deposited

without interruption, it is necessary to expose the

buried emitter layer for electrical measurements. In

this work we expose the emitter of the cells with two

different methods: (i) wet-chemical etching of a slope

at one (or more) corner(s) of the cell using a silicon

etch (CP4), subsequently referred to as ‘corner

etching’; (ii) photolithography with subsequent

plasma etching to remove the BSF and the base of

the solar cells. Both methods work well and allow

probing of the cells in order to do voltage-based

measurements.

Metallisation schemes

In order to efficiently extract current from our

evaporated thin-film solar cells, it is necessary to

contact both the BSF and the emitter layer with

sufficiently low series resistance and without introduc-

Copyright # 2008 John Wiley & Sons, Ltd. Prog. Photovolt: Res. Appl. 2009; 17:35–46

DOI: 10.1002/pip

36 O. KUNZ ET AL.

tion of significant shunting or recombination. In this

work we concentrate on the investigation of the

possibilities of forming good ohmic contact to the BSF.

Three different contacting schemes are investigated:

Method 1: Full-area coverage of thermally evapor-

ated Al onto the rear of the devices;

Method 2: Formation of Al point contacts onto the

BSF via photolithographic opening of holes in a

resist layer and subsequent thermal Al evaporation;

Method 3: Formation of Al line contacts through

patterning of a thermally evaporated blanket Al

layer via a photolithographic etch-back process.

The finished device structures and the differences of

these three approaches are schematically presented in

Figure 2.

RESULTS

Method 1: Full-area rear electrode

We have recently developed a metallisation scheme for

PECVD-deposited poly-Si thin-film solar cells

(PLASMA) of identical structure, whereby a blanket

Al layer is used to contact the highly doped air-side

layer of the diodes (Figure 2(a)). Good fill factors of

well over 70% are routinely obtained with this

metallisation scheme on PLASMA solar cells, proving

that such a contacting scheme is highly compatible

with this solar cell type.11 Somewhat surprisingly,

when trying to metallise EVA solar cells in the same

way we encounter severe shunting after the metal film

has been deposited onto the BSF layer. An example of

this is shown in Figure 3 whereby Suns-Voc12 was

measured (a) before and (b) after thermal evaporation

of a 640 nm thick Al layer.

In order to gain insight into the dominant

recombination mechanisms in our solar cells, we

routinely perform two-diode model fits to the Suns-Vocdata.13 Generally, an ideality factor of n1¼ 1 (dashed

line in Figure 3(a)) is associated with recombination in

the bulk and at the surfaces of the solar cells, whereas

an ideality factor of n2¼ 2 (dot-dashed line in

Figure 1. Schematic of an EVA solar cell in superstrate

configuration, i.e. with air-side BSF and glassside emitter.

Note that the glass thickness is not to scale

Table I. Typical design parameters of EVA solar cells in

superstrate configuration, i.e. with glass-side emitter and air-

side BSF

Parameter Details

Glass 3�3mm, borosilicate, planar or textured

AR coating �70 nm PECVD deposited SiN, n� 2�1Emitter �100 nm, pþ or nþ, �200–400V/sq

Base �1�8mm, n� or p�, �5� 1016 cm�3

SPC �24 h at 6008CBSF �100 nm, nþ or pþ, �500–1000V/sq

RTA 4min at �9008CHydrogenation 15–20min at �600–6508C, remote plasma

Figure 2. Schematics of the three different rear contacting methods explored in this work: (a) Method 1: Full-area contact;

(b) Method 2: Point contacts fabricated via photolithography; (c) Method 3: Line contacts. Note: In each case, the glass-side

layer was exposed either via wet-chemical etching (CP4) or plasma etching


DOI: 10.1002/pip

SHUNTING IN EVAPORATED THIN-FILM SOLAR CELLS 37

Figure 3(a)) corresponds to recombination in the p–n

junction region and at grain boundaries.14,15

As listed in Table II the open-circuit voltage dropped

from 429mV to 373mV due to the metal deposition

and a two-diode model fit with the standard ideality

factors (n1¼ 1 and n2¼ 2) could no longer be

performed after the metal was deposited (compare

solid line in Figure 3(b)). To obtain a satisfactory two-

diode model fit, the ideality factors had to be changed

to non-standard values (for the present cell to n1¼ 0�86and n2¼ 2�44). This, together with the fact that the

local ideality factor nloc has a hump at around 230mV

(compare filled triangles in Figure 3(b)), is an

indication of resistance-limited enhanced recombina-

tion distorting the I-V relationship at the p–n

junction.16

In addition, Table II shows that a significant shunt

resistance is introduced and that an unacceptable

decrease in pseudo fill factor (pFF) along with an

increase in effective ideality factor neff (determined

from the slope of the Suns-Voc curve between MPP and

Voc) result from the metal deposition step. Both pFF

and neff are good measures of the diode quality and are

directly deduced from the measured data, i.e. they are

independent of the two-diode model fit. This detri-

mental effect when a blanket layer of Al is deposited

onto the BSF layer of EVA solar cells is observed

consistently, and is independent of the doping polarity

(p- or n-type base) and the layer configuration (glass-

side or air-side emitter) of the three different layers of

the cell (emitter, base, BSF). From the literature it

appears that shunting can lead to significant degra-

dation of the performance of large area a-Si:H modules

where it has been related to substrate contamination

and airborne particulates17 but also that researchers

working with laser crystallisation of evaporated silicon

films on glass experience similar performance losses

when trying to metallise their solar cells.18,19 In the

latter case a comparative study would have to be

conducted to confirm that the source of this shunting

behaviour is the same in both cases.

Baking of the contact (2508C for 30min) can

sometimes reduce the local BSF shunting of EVA solar

cells somewhat, however, the Suns-Voc curves remain

severely distorted and the loss in pFF and Voc stays

unacceptably high. Additionally, after this temperature

treatment the Al film can no longer be etched off

completely by wet-chemical etching. Thus, a contact-

ing scheme creating significantly less shunting is

required for the BSF layer metallisation in order to

efficiently extract power from these solar cells.

The observed phenomenon can be explained by a

thin metal film covering (parts of) the steep sidewalls

of pinholes and other voids in the Si films (as

schematically illustrated in Figure 4(a)) and thereby

forming a conductive path between the two highly

doped layers on either side of the solar cells. The

simplified equivalent-circuit diagram in Figure 4(b)

demonstrates how the introduced pinhole shunts lead

to a shunting path between the air-side metal and the

highly doped glass-side layer (note that there may or

may not be a glass-side metal electrode present at this

stage) that adds to the shunt resistance Rsh,1 which is

intrinsically related to the solar cell. This additional

Figure 3. Suns-Voc curves (a) before and (b) after metal has

been deposited onto the rear of an EVA solar cell (method 1).

The filled triangles in (b) display the local ideality factor after

Al deposition

Table II. Suns-Voc results of the sample from Figure 3 before

and after full-area deposition of Al onto the rear surface

(method 1). Note that the determination of Rsh assumes a

light-induced current density of 10mA/cm2 since Suns-Vocmeasures voltage only

Sample

state

Voc(mV)

n1 n2 Rsh

(V cm2)

pFF (%) neff

Without Al 429 1�0 2�0 1003 66�4 1�93With Al 373 0�9 2�4 174 50�4 3�41


DOI: 10.1002/pip

38 O. KUNZ ET AL.

shunting path comprises four main components: (i) the

series resistance in the BSF layer Rs,BSF (this effect is

negligible for fully metallised rear surfaces), (ii) the

interface between the BSF layer and the air-side metal

consisting of the contact resistance Rc,BSF and a

Schottky barrier Dc,BSF, (iii) the resistance of the thin

metal film covering the sidewalls of the pinholes RAl,ph

and (iv) the interface between the BSF metal and the

emitter layer consisting of its ohmic and rectifying

components Rsh,2 and Dsh,2, respectively. The non-

linear parts of the metal- semiconductor interfaces

Dc,BSF and Dsh,2 can have an impact on the Suns-Vocand I-V characteristic of the cells which will be

addressed below. Additional details on the contact

properties between Al and evaporated SPC poly-Si

films can be found in Reference 20.

Method 2: Point-contacted rear electrode

In order to be able to metallise EVA solar cells despite

the identified shunting problem, we investigated how

reduction of the effective contact area of the air-side

electrode influences the shunting behaviour. We

therefore divided a 4�5� 4�5 cm2 diode into 12 separate

cells (�1 cm2 each) and deposited metal (�800 nm Al)

using a point contacting scheme as illustrated in

Figure 2(b). Photolithography was employed to open

�30mm wide holes in a photoresist layer, and the

spacing between these openings was varied to get

fractional contact areas of�0�5,�2�5,�10 and almost

100%, respectively. Figure 5(a) shows a micrograph of

the photomask with the hexagonal structure and the

point openings that were made via laser ablation of Al-

coated glass. In Figure 5(b) a camera image of the

finished device with the individual cells is presented. It

can be seen that the emitter layer was exposed on all

corners of the sample via CP4 etching in order to

enable Suns-Voc measurements. The cells are dis-

tributed such that no two cells with identical point

contact areas (there are three cells for each point

contact density) are adjacent to one another in order to

be able to get good statistical results that are

representative for the entire 4�5� 4�5 cm2 diode.

Then the performance of all cells was measured via

Suns-Voc and the averaged result for each dot density

was compared to the performance of the cells before Al

contact formation, i.e. with 0% metal coverage. The

measured average values of the open-circuit voltage

and of the pseudo FF are listed in Table III, together

with the fitted value of the shunt resistance. It is evident

that the performance remains basically unaffected in

the case of �0�5% contact area. For an effective

contact area of �2�5% the open-circuit voltage is

slightly reduced. This, however, is within the expected

deviation of the voltage differences of the individual

cells and can therefore not be seen as a statistically

significant performance drop. In contrast, for a

Figure 4. (a) Schematic of a pinhole with Al running down

the steep sidewall causing the observed shunting between the

highly doped layers; (b) Simplified equivalent-circuit model

of an EVA solar cell with indication of the additional

shunting path through R_AL,ph, R_sh,2 and D_sh,2) and

the associated parasitic current J_sh,2. The framed section on

the left-hand side corresponds to the virgin solar cell prior to

metallisation

Figure 5. (a) Optical microscope image (transmission

mode) of the photomask made by laser ablation of Al on

glass showing areas with three different point contact

densities (�0�25, �2�5, �10%). The dot size is approxi-

mately 30 mm; (b) camera image of the finished sample with

12 areas having different point contact densities (each of

these areas is about 1� 1 cm2). Note that the emitter layer has

been exposed at the four corners through corner etching


DOI: 10.1002/pip


contacted area of �10%, both the open-circuit voltage

and the pFF are clearly reduced and the fitted shunt

resistance is lower. For the latter, however, the

reduction is, again, within the range of uncertainty

of the experimental procedure. For the cells that had

almost 100% Al coverage the performance drop is

unacceptable and has the same order of magnitude as

in Table II. These results give the rule of thumb that, to

keep the shunt resistance at a reasonable level (i.e.

>1000Vcm2), the fractional contact area by a sub-

micron thick Al layer must not exceed �5%.

Method 3: Line-contacted rear electrode

Since efficient light trapping is crucial for the

performance of c-Si thin-film solar cells, and in order

to be compatible with different light trapping schemes

(back reflectors),21,22 we have also experimented with

a line contacting scheme as schematically displayed in

Figure 2(c). The design constraint of having less than

5% Al as air-side contact led to a BSF contact design

with finger width of 25mm at a finger spacing of 1mm,

whereby the contact pad contributes an additional 1%

to the total contact area. As expected, when an Al layer

with a thickness similar to that of the point-contacted

scheme was used, metallised test structures performed

well with respect to short-circuit current density (from

light I-V as well as EQE measurements) and shunt

resistance. However, the FF of these devices was very

low, mainly due to resistive losses in the rather thin

metal fingers. Increasing the metal thickness to

�1�6mm led to significantly reduced series resistance

but introduced severe shunting despite the small

fractional Al coverage of only about 5%. In Table IV

we compare the performance of the virgin cell (‘before

Al’) and after metal was deposited (‘0 s’). From this

comparison it is evident that Rsh, Voc and pFF dropped

drastically and that the effective ideality factor neffincreased to a value of almost 8. The detrimental effect

is hence even more pronounced as in the example

above (see Table II) and, again, can be attributed to

resistively limited enhanced recombination through

local shunts.

Since the source of this behaviour was identified to

be shunting through voids in the Si films, we performed

short etching steps in hot phosphoric acid (42�5%concentration, 65–708C, Al etch rate�200 nm/min) on

the metallised test structures. These etching steps were

intended to remove the outermost layer of the Al line

contacts. This etching procedure has a remarkable

effect on the Suns-Voc parameters, as can be seen from

Table IV. After only 60 s of etching the pFF and the

effective ideality factor neff have recovered completely,

and after 150 s of etching the formerly introduced

shunting is no longer detectable via Suns-Vocmeasurements (Rsh termed ‘Infinity’ in Table IV). At

this point pFF and neff have even improved as

compared to the virgin cell, whereas the open-circuit

voltage remains slightly reduced. This behaviour is

consistently observed when this BSF contacting

procedure is performed on EVA solar cells. The

improvement of pFF and neff as well as the fact that

the Voc does not fully recover to the non-metallised

value can be attributed to the introduction of a Schottky

barrier (compare schematic in Figure 4(b)) between the

BSF metal and the BSF when the Al line contacts are

formed. This Schottky interface is capable of introdu-

cing a light-induced voltage opposing that of the solar

cell and thereby reduces the local ideality factor and

the open-circuit voltage at higher illumination levels.23

The drastic performance improvement of our test

structures via this wet-chemical etching treatment can

be understood when looking at the schematic in

Figure 4(a). Evidently the metal running down the

Table III. Averaged Suns-Voc parameters (Voc, Rsh and pFF)

of cells with identical point contact densities (method 2)

Al coverage Voc (mV) Rsh (V cm2) pFF (%)

0% 459 1180 70�1�0�5% 460 1401 70�2�2�5% 454 1404 70�0�10% 447 902 62�5almost 100% 352 376 44�8

Table IV. Evolution of Suns-Voc parameters during the wet-

chemical etching procedure (method 3). Note that the values

in the top row refer to the cell before Al deposition and ‘0 s’

refers to the time just after the Al line contact formation. All

other rows refer to measurements taken after the indicated

etch times

Time (s) Voc (mV) Rsh (V cm2) pFF (%) neff

Before Al 459�3 Infinity 73�6 1�400 313�8 35 27�4 7�9620 394�2 61 36�4 6�4640 425�0 108 49�4 3�7860 449�5 1565 73�2 1�4180 453�3 3838 74�5 1�32110 454�4 4282 75�0 1�29150 454�5 Infinity 75�7 1�24


DOI: 10.1002/pip

40 O. KUNZ ET AL.

steep sidewalls of pinholes (and thereby creating a

shunting path between the highly doped layers) is

much thinner as compared to the Al film on the flat

surface (BSF) since thermal evaporation is a highly

directional deposition method. As a result of this

significant difference in layer thickness, the Al film

within the voids is completely removed long before the

much thicker Al layers on the flat part of the devices

vanish. Therefore we only have to thin down the BSF

line contacts by about 20–25% in order to completely

remove the void-related shunting that appears in our

films. Looking at Figure 4(b) this procedure drastically

increases the resistance value of the resistor between

the Al in the bottom of the pinholes and on top of the

BSF layer (resistor RAl,ph in the schematic). In order to

keep the resistive losses along the thin metal fingers

low, the initial Al layer has to be deposited

correspondingly thicker or, alternatively, the width

of the Al fingers has to be increased. Note that the

fractional Al coverage can be higher as compared to

method 2 due to the high effectiveness of the shunt

removal procedure.

The presence of pinholes and other microvoids in

thin amorphous Si or Ge films along with a method of

healing such defects using a specially developed

vacuum treatment is documented in Reference 24.

Microscopic investigation of pinholes

To further support our findings, we examined some of

our SPC crystallised evaporated poly-Si films with an

optical microscope and a focussed ion beam (FIB)

microscope. We found that relatively large pinholes

(about 5–20mm wide) exist at densities of about 0�1–1mm�2. This type of pinholes is related to small

particles in the films that cause film cracking during the

RTA process. Despite extensive studies we have not

been able to demonstrate a correlation between these

‘large’ pinholes and the observed shunting effect.

During our investigation of the BSF shunting, however,

we noticed that prolonged etching in hydrofluoric acid

(HF) produces dark circular patterns when observed in

the optical microscope in transmission mode. An

example of this is shown in Figure 6(a) whereby the

etching was done for 5min in diluted HF (concen-

tration �15%), leading to circles with a diameter of

about 10mm. Note that a longer etching time increases

the diameter of these circles, but their density stays

Figure 6. (a) Transmission microscopic image (5� magnification) of an EVA solar cell with dark circular features

distributed across the film’s surface. The insert (bottom right) is a close-up (50� magnification) of the framed region

showing four of the dark circles (diameter �10 mm) whereby the focus was adjusted to see the bright spots in the centre;

(b) FIB image (top view) of a submicron sized pinhole in an evaporated SPC poly-Si film on glass that is located close to a

BSF metal finger. The rectangular pattern was milled into the film using the FIB gallium ion beam; (c) crosssectional view of

the same pinhole (the trench was extended towards the pinhole). The insert at the bottom left shows a drop-like void etched

into the glass substrate during etching in diluted HF solution (�15%). 508� 370mm (150� 150 DPI)


DOI: 10.1002/pip


essentially unaffected. In Figure 6(a) it can be seen that

these circles are distributed across the film’s entire

surface. Under high magnification (50–100 times) and

when the focus is appropriately adjusted, one can see in

the optical microscope that each circle has a tiny bright

spot located exactly in the centre, indicating that we

are dealing with very small (sub-micron sized)

pinholes in the Si film that are oriented vertically to

the film’s surface since otherwise it would not be

possible to see the opening in our �2mm thick films.

The insert on the bottom right corner of Figure 6(a) is

an example of four of these pinholes located next to the

plasma-etched emitter grooves under 50�magnification.

Without etching in HF it is basically impossible to

see these pinholes in the optical microscope since:

(i) their size is at the resolution limit of the microscope

and (ii) the contrast in transmission mode is too low.

Note that in reflection mode these pinholes cannot be

distinguished from other features that exist in the film’s

surface. After employing the above-mentioned HF

etching procedure, these pinholes become clearly

visible through dark circles surrounding them. The

density of these sub-micron pinholes is typically of the

order of 100–200mm�2, i.e. at least two orders of

magnitude higher than the density of their larger

counterparts. Their diameter is usually between

200 and 500 nm, i.e. below one micron.

To improve our understanding of the nature of these

pinholes and the circles that form during extended HF

etching, we took FIB images of several of these sub-

micron pinholes. Figure 6(b) shows an FIB image (top

view) of one of them located next to a BSF grid line

with a cross-sectional cut through the poly-Si film and

through a small part of the Al line contact. The cut was

then extended towards the pinhole and images of the

cross-section were taken at various cutting depths.

Figure 6(c) shows the cross-sectional image taken

when the pinhole was best visible. Unfortunately, the

channel-like pinhole cannot be seen fully since it is

almost entirely filled with sputtering residues from the

FIB milling process. However, at the lower end of the

poly-Si layer we see that the SiN film is interrupted,

which corresponds to the bottom end of the pinhole.

This image confirms that, despite the small diameter of

these pinholes of only a fraction of a micron, they are

running vertically through the poly-Si film and are

therefore prone to be filled with Al during the metal

evaporation process.

FIB is not capable of imaging non-conductive

materials due to accumulation of surface charges. This

means that there is very little contrast between the

glass substrate and the cavity that was etched into the

glass by the HF acid. The insert in Figure 6(c) was

therefore taken after a thin layer of sputtering residues

was deposited onto the cross-sectional area in order to

conduct static charges away and to thereby obtain a

better contrast. It can be seen that there is a void in the

glass having a drop-like shape immediately beneath

the pinhole.

From both the optical and the FIB microscopic

images we therefore conclude that the dark circles

forming after extended HF etching are cavities that

were etched into the glass pane by HF acid penetrating

through pinholes in both the poly-Si film and the

underlying SiN layer.

To find the cause of these pinholes we also

performed the above etching treatment on our a-Si

thin films prior to furnace crystallisation. After solid-

phase crystallisation these films showed the same

circular patterns in transmission microscopic images

as the ones that were immersed in HF acid in their

crystalline state. This suggests that these sub-micron

pinholes are formed during the deposition process and

that they may be related to the morphology of the

substrate, e.g. pinholes in the SiN films. However, we

also experimented with two distinctly different depo-

sition recipes when depositing the SiN films and there

was no clear advantage of either of the resulting

antireflection layers with respect to solar cell shunting.

It should also be noted that pinholes in evaporated

films for optical coating filters are known to cause

delamination of the thin optical films25 and that the

presence of voids in thin evaporated films has been

related to the formation of columnar microstructures in

evaporated films resulting from the limited mobility of

the deposited vapour atoms upon arrival at the film’s

surface.26 If such a limited surface mobility is the

source of the sub-micron pinholes in our films then

altering the deposition conditions (in particular the

deposition temperature) may lead to a reduction in void

density. For the current work, however, we limited

ourselves to a deposition temperature in the range 200–

2508C since this was found to be the most beneficial

deposition temperature in order to achieve poly-Si

films of good crystal quality.27

We found the same sub-micron pinholes in

evaporated films deposited on textured glass pieces

but those pinholes are generally harder to detect due to

a reduced contrast in the microscopic images. So far

we have only investigated the elimination of shunts on

evaporated Si thin films deposited on planar glass

pieces but have little doubt that the elimination of


DOI: 10.1002/pip

42 O. KUNZ ET AL.

shunting paths through the outlined etching treatment

works in the same way for samples deposited on

textured glass.

Shunt detection via lock-in thermography

To obtain a better insight into the shunting mechanisms

in our solar cells, we examined finished test structures

using lock-in thermography (LIT).28 LIT is a highly

sensitive imaging technique that is particularly suited

for shunt detection. It exploits the fact that the parasitic

currents flowing through shunting paths locally heat up

the device under test.28–30 LIT is capable of resolving

temperature differences well below 1mK at a spatial

resolution that is limited to about 5–10mm mainly by

thermal diffusion of the heat during the excitation

period used in the measurement (usually in the order of

tens or hundreds of ms). Figure 7(d) displays a

schematic (top view) of a line-contacted test structure

that was used for LIT investigation. The emitter was

contacted with Al line contacts (black lines) of 40mmwidth located in 160mm wide plasma-etched grooves

(grey lines). The BSF contacts have a line width of

about 20mm and are spaced 1mm apart (compare

Figure 7 (c, e)). The Al thickness for both the emitter

and the BSF contact was 550 nm, the total size of the

test structure is 1�25� 0�8 cm2. The sample was

examined twice via LIT in the dark (DLIT), which

means that a pulsed voltage, according to the lock-in

frequency, was applied to the sample28:

(i) Directly after the BSF and the emitter contact were

defined as illustrated in Figure 7 (a, b), and

(ii) after etching in hot diluted phosphoric acid

solution (42�5%, 40 s at �658C) as displayed in

Figure 7(c).

The etching step was performed in accordance with

our earlier finding that removal of a small fraction of

the BSF metal reduces the shunting drastically

(compare Table IV).

Figure 7(a) displays a dark lock-in amplitude image

of the test structure taken at a lock-in frequency of

10Hz and a forward bias voltage of 600mV. The total

current at this bias voltage was 13mA. The tempera-

ture scale is 10mK. Several strong point-like shunts

can be seen but also a high number of weaker shunts

distributed randomly over the entire cell area. To

examine the nature of the shunts we also took DLIT

Figure 7. (a) DLIT image of an EVA test structure after metal deposition and grid finger definition; (b) DLIT close-up of the

framed section in (a); (c) DLIT image of the same region after a short phosphoric acid etch; (d) schematic of the used test

structures (total area 1 cm2); (e) optical microscope images of two grid line shunts (100� magnification, transmission and

reflection mode, respectively) from (b) directly after phosphoric acid etching (‘before HF’), and after extended etching in

15% HF (‘after HF’), respectively; (f) cross-sectional FIB image of the shunt from (b) and from the left column of (e) after

plasma etching and second Al deposition


DOI: 10.1002/pip


images at a reverse bias of 600mV. The current

decreased for these measurements to 5mA and it could

be noted that essentially all of the strong point-like

shunts are linear, whereas all other shunts (in particular

those distributed randomly over the cell’s surface) are

non-linear, i.e. they disappeared under reverse bias

condition. A high-resolution DLIT image of the

framed section of Figure 7(a) is displayed in

Figure 7(b). To obtain an improved spatial resolution

the lock-in frequency was increased to 30Hz. The

temperature scale in this image is 6mK. It is apparent

that most of the large shunts are related to BSF grid

lines (compare labels in Figure 7(c)). Additionally to

the grid line shunts, numerous weaker point-like shunts

exist and also a single large shunt related to the edge of

the cell (on the very right). We also compared

Figure 7(b) with a high-resolution DLIT image of

the same area investigated under 600mV reverse bias.

It was found that under reverse bias condition only the

grid-line shunts remain visible. This indicates that the

grid-line shunts are linear whereas all other shunts are

non-linear (even the strong shunt related to the edge of

the cell). Comparison with DLIT images of other cells

shows that essentially all linear shunts present in our

line-contacted samples are related to the BSF metal

grid.

We then performed a short etching step in hot

phosphoric acid (42�5%, 40 s at �658C) to remove a

fraction of the grid line metal (� 150 nm) as outlined in

‘Method 3: Line -contracted rear electrode’. A DLIT

amplitude image taken with the same measurement

parameters as in Figure 7(b) (lock-in frequency 30Hz,

bias voltage 600mV, scale 6mK) is displayed in

Figure 7(c). Due to the phosphoric acid etch the dark

forward current decreased from originally 13 to 9mA.

More remarkably, it appears that all strong shunts

(linear as well as non-linear) were completely removed

and only two of the numerous weak (non-linear) shunts

remained. The fact that the phosphoric acid etching

procedure was effective on both the grid line shunts

and the shunts away from the grid lines suggests that

the latter are also metal induced. Most likely, these

shunts result fromAl residues in pinholes creating non-

linear (Schottky type) shunting paths between the

emitter and the lightly doped base of the cells.

Since DLIT shows the location of the grid line

shunts with high accuracy we observed the grid lines

after the phosphoric acid etching procedure under the

optical microscope. In all cases we found evidence of

small point-like non-uniformities in both transmission

and reflection mode when observing the shunt

locations previously determined via DLIT. It was also

apparent that the exact location of the shunts on the

grid lines (right, centre, left) was related to the spatial

distribution of the thermal DLIT amplitude image, i.e.

shunts that had a stronger thermal amplitude on the left

side of the grid finger were also located in the left part

of the grid line. As an example the shunt with

symmetric heat distribution around the metal finger as

indicated in Figure 7(b) is imaged in the optical

microscope as shown in the left column of Figure 7(e)

in both transmission and reflection mode, respectively.

In transmission mode under 100� magnification, a

small bright spot is visible located exactly in the centre

of the grid line, whereas in reflection mode the same

spot appears dark.

In order to see whether the point-like shunts as

determined via DLIT are, in fact, the cause of the dark

circles seen in Figure 6(a), we immersed the sample in

HF solution. Note that we performed a short plasma

etch using the Al grid lines as etch mask to make the

grid line edge remain visible after removal of the Al by

the HF. The resulting microscope images (transmission

and reflection, 100� magnification) of one of the

shunts are presented in the right column of Figure 7(e).

Two features of these images are worth being noted:

(i) the former shunt from Figure 7(b) is now

surrounded by a circular structure comparable to that

of Figure 6(a) and; (ii) from both the reflection as well

as the transmission image it appears that the shunt is

located on the left hand side of the grid line, which

agrees with the thermal heat distribution of the DLIT

amplitude image Figure 7(b).

Finally we evaporated Al onto the sample and took

FIB images of the shunts from Figure 7(b). Figure 7(f)

shows the same shunt as in the left column of Figure 7(e)

whereby a trench was cut in order to get a cross-sectional

image of the pinhole region. As a point of clarification

there are two Al layers stacked on top of one another

resulting from a two-step Al evaporation. From this

image it can be seen that a nearly spherical cavity was

etched into the glass pane during the HF etching

procedure. The size of the pinhole is significantly larger

than that fromFigure 6(b, c) but this enlargementmay be

the result of the plasma etching step. It is not clear

whether the shape and size of the pinhole was altered by

the processing steps; however, the sidewalls are clearly

covered byAl that is reaching from the back surface field

to the emitter layer thereby demonstrating the formation

of a shunting path. Some of the evaporated Al penetrated

through the pinhole and got deposited onto the bottom of

the glass cavity.


DOI: 10.1002/pip

44 O. KUNZ ET AL.

CONCLUSIONS

Evaporated solar cells fabricated on glass by SPC of a-

Si precursor diodes suffer from severe shunting when a

blanket air-side electrode is deposited. As a result of

this, the p–n junction’s I-V characteristics becomes

severely distorted which can effectively be demon-

strated via Suns-Voc measurements. The source of this

‘BSF shunting’ is metal from the air-side electrode that

forms conductive paths between the highly doped

layers (emitter and BSF) through sub-micron sized

pinholes that seem to be inherently present in

evaporated SPC poly-Si thin-films on glass. The

density of these pinholes is rather high (100–

200mm�2) and they are distributed over the film’s

entire surface. Two separate techniques for over-

coming this detrimental effect are (i) the deposition of

a thin (<1mm) layer of metal via a point contacting

scheme and (ii) the deposition of thick (�1mm) Al line

contacts followed by a wet-chemical etching step that

effectively removes the shunting paths that were

created during metal deposition. We support these

findings with lock-in thermographic images, optical

micrographs and focussed ion beam images. The LIT

images reveal that essentially all strong shunts are

point-like, ohmic and related to BSF grid lines and

that, additionally, a large number of non-linear point-

like shunts exist that are also metal induced but located

away from the grid lines. The Suns-Voc results

presented in this work confirm that both of these

metallisation techniques successfully maintain the

solar cell performance and that they are thus well

suited for the formation of the air-side electrode of

EVA solar cells.

Acknowledgements

O. Kunz and J. Wong acknowledge their PhD scholar-

ships from the University of New South Wales

(UNSW). The Photovoltaics Centre of Excellence at

UNSW is one of the Centres of Excellence established

and supported by the Australian Research Council

(ARC).

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